blob: 65e417817e19436b7478131f4e7464cef9dc6635 [file] [log] [blame]
Jonny Svärd3a0d3f22021-03-18 15:31:50 +01001/*
2 * Copyright (c) 2020-2021 Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19#include <stdint.h>
20#include <timing_adapter.h>
21
22// Register offsets
23#define TA_MAXR 0x00
24#define TA_MAXW 0x04
25#define TA_MAXRW 0x08
26#define TA_RLATENCY 0x0C
27#define TA_WLATENCY 0x10
28#define TA_PULSE_ON 0x14
29#define TA_PULSE_OFF 0x18
30#define TA_BWCAP 0x1C
31#define TA_PERFCTRL 0x20
32#define TA_PERFCNT 0x24
33#define TA_MODE 0x28
34#define TA_MAXPENDING 0x2C
35#define TA_HISTBIN 0x30
36#define TA_HISTCNT 0x34
37#define TA_VERSION 0x38
38
39// Register masks
40#define TA_MAXR_MASK 0x0000003F
41#define TA_MAXW_MASK 0x0000003F
42#define TA_MAXRW_MASK 0x0000003F
43#define TA_RLATENCY_MASK 0x00000FFF
44#define TA_WLATENCY_MASK 0x00000FFF
45#define TA_PULSE_ON_MASK 0x0000FFFF
46#define TA_PULSE_OFF_MASK 0x0000FFFF
47#define TA_BWCAP_MASK 0x0000FFFF
48#define TA_PERFCTRL_MASK 0x0000003F
49#define TA_PERFCNT_MASK 0xFFFFFFFF
50#define TA_MODE_MASK 0x00000FFF
51#define TA_MAXPENDING_MASK 0xFFFFFFFF
52#define TA_HISTBIN_MASK 0x0000000F
53#define TA_HISTCNT_MASK 0xFFFFFFFF
54
55#define TA_VERSION_SUPPORTED 0x1117
56
57int ta_init(struct timing_adapter *ta, uintptr_t base_addr) {
58 ta->base_addr = base_addr;
59
60 if (ta_get_version(ta) != TA_VERSION_SUPPORTED) {
61 return -1;
62 }
63 return 0;
64}
65
66void ta_uninit(struct timing_adapter *ta) {
67 ta->base_addr = 0;
68}
69
70// -- Set API --------------------------------------
71void ta_set_all(struct timing_adapter *ta, struct timing_adapter_settings *in) {
72 ta_set_maxr(ta, in->maxr);
73 ta_set_maxw(ta, in->maxw);
74 ta_set_maxrw(ta, in->maxrw);
75 ta_set_rlatency(ta, in->rlatency);
76 ta_set_wlatency(ta, in->wlatency);
77 ta_set_pulse_on(ta, in->pulse_on);
78 ta_set_pulse_off(ta, in->pulse_off);
79 ta_set_bwcap(ta, in->bwcap);
80 ta_set_perfctrl(ta, in->perfctrl);
81 ta_set_perfcnt(ta, in->perfcnt);
82 ta_set_mode(ta, in->mode);
83 ta_set_histbin(ta, in->histbin);
84 ta_set_histcnt(ta, in->histcnt);
85}
86
87void ta_set_maxr(struct timing_adapter *ta, uint32_t val) {
88 *(volatile uint32_t *)(ta->base_addr + TA_MAXR) = val & TA_MAXR_MASK;
89};
90
91void ta_set_maxw(struct timing_adapter *ta, uint32_t val) {
92 *(volatile uint32_t *)(ta->base_addr + TA_MAXW) = val & TA_MAXW_MASK;
93};
94
95void ta_set_maxrw(struct timing_adapter *ta, uint32_t val) {
96 *(volatile uint32_t *)(ta->base_addr + TA_MAXRW) = val & TA_MAXRW_MASK;
97};
98
99void ta_set_rlatency(struct timing_adapter *ta, uint32_t val) {
100 *(volatile uint32_t *)(ta->base_addr + TA_RLATENCY) = val & TA_RLATENCY_MASK;
101};
102
103void ta_set_wlatency(struct timing_adapter *ta, uint32_t val) {
104 *(volatile uint32_t *)(ta->base_addr + TA_WLATENCY) = val & TA_WLATENCY_MASK;
105};
106
107void ta_set_pulse_on(struct timing_adapter *ta, uint32_t val) {
108 *(volatile uint32_t *)(ta->base_addr + TA_PULSE_ON) = val & TA_PULSE_ON_MASK;
109};
110
111void ta_set_pulse_off(struct timing_adapter *ta, uint32_t val) {
112 *(volatile uint32_t *)(ta->base_addr + TA_PULSE_OFF) = val & TA_PULSE_OFF_MASK;
113};
114
115void ta_set_bwcap(struct timing_adapter *ta, uint32_t val) {
116 *(volatile uint32_t *)(ta->base_addr + TA_BWCAP) = val & TA_BWCAP_MASK;
117};
118
119void ta_set_perfctrl(struct timing_adapter *ta, uint32_t val) {
120 *(volatile uint32_t *)(ta->base_addr + TA_PERFCTRL) = val & TA_PERFCTRL_MASK;
121};
122
123void ta_set_perfcnt(struct timing_adapter *ta, uint32_t val) {
124 *(volatile uint32_t *)(ta->base_addr + TA_PERFCNT) = val & TA_PERFCNT_MASK;
125};
126
127void ta_set_mode(struct timing_adapter *ta, uint32_t val) {
128 *(volatile uint32_t *)(ta->base_addr + TA_MODE) = val & TA_MODE_MASK;
129};
130
131void ta_set_histbin(struct timing_adapter *ta, uint32_t val) {
132 *(volatile uint32_t *)(ta->base_addr + TA_HISTBIN) = val & TA_HISTBIN_MASK;
133};
134
135void ta_set_histcnt(struct timing_adapter *ta, uint32_t val) {
136 *(volatile uint32_t *)(ta->base_addr + TA_HISTCNT) = val & TA_HISTCNT_MASK;
137};
138
139// -- Get API --------------------------------------
140void ta_get_all(struct timing_adapter *ta, struct timing_adapter_settings *out) {
141 out->maxr = ta_get_maxr(ta);
142 out->maxw = ta_get_maxw(ta);
143 out->maxrw = ta_get_maxrw(ta);
144 out->rlatency = ta_get_rlatency(ta);
145 out->wlatency = ta_get_wlatency(ta);
146 out->pulse_on = ta_get_pulse_on(ta);
147 out->pulse_off = ta_get_pulse_off(ta);
148 out->bwcap = ta_get_bwcap(ta);
149 out->perfctrl = ta_get_perfctrl(ta);
150 out->perfcnt = ta_get_perfcnt(ta);
151 out->mode = ta_get_mode(ta);
152 out->maxpending = ta_get_maxpending(ta);
153 out->histbin = ta_get_histbin(ta);
154 out->histcnt = ta_get_histcnt(ta);
155}
156
157uint32_t ta_get_maxr(struct timing_adapter *ta) {
158 return *(volatile uint32_t *)(ta->base_addr + TA_MAXR) & TA_MAXR_MASK;
159};
160
161uint32_t ta_get_maxw(struct timing_adapter *ta) {
162 return *(volatile uint32_t *)(ta->base_addr + TA_MAXW) & TA_MAXW_MASK;
163};
164
165uint32_t ta_get_maxrw(struct timing_adapter *ta) {
166 return *(volatile uint32_t *)(ta->base_addr + TA_MAXRW) & TA_MAXRW_MASK;
167};
168
169uint32_t ta_get_rlatency(struct timing_adapter *ta) {
170 return *(volatile uint32_t *)(ta->base_addr + TA_RLATENCY) & TA_RLATENCY_MASK;
171};
172
173uint32_t ta_get_wlatency(struct timing_adapter *ta) {
174 return *(volatile uint32_t *)(ta->base_addr + TA_WLATENCY) & TA_WLATENCY_MASK;
175};
176
177uint32_t ta_get_pulse_on(struct timing_adapter *ta) {
178 return *(volatile uint32_t *)(ta->base_addr + TA_PULSE_ON) & TA_PULSE_ON_MASK;
179};
180
181uint32_t ta_get_pulse_off(struct timing_adapter *ta) {
182 return *(volatile uint32_t *)(ta->base_addr + TA_PULSE_OFF) & TA_PULSE_OFF_MASK;
183};
184
185uint32_t ta_get_bwcap(struct timing_adapter *ta) {
186 return *(volatile uint32_t *)(ta->base_addr + TA_BWCAP) & TA_BWCAP_MASK;
187};
188
189uint32_t ta_get_perfctrl(struct timing_adapter *ta) {
190 return *(volatile uint32_t *)(ta->base_addr + TA_PERFCTRL) & TA_PERFCTRL_MASK;
191};
192
193uint32_t ta_get_perfcnt(struct timing_adapter *ta) {
194 return *(volatile uint32_t *)(ta->base_addr + TA_PERFCNT) & TA_PERFCNT_MASK;
195};
196
197uint32_t ta_get_mode(struct timing_adapter *ta) {
198 return *(volatile uint32_t *)(ta->base_addr + TA_MODE) & TA_MODE_MASK;
199};
200
201uint32_t ta_get_maxpending(struct timing_adapter *ta) {
202 return *(volatile uint32_t *)(ta->base_addr + TA_MAXPENDING) & TA_MAXPENDING_MASK;
203};
204
205uint32_t ta_get_histbin(struct timing_adapter *ta) {
206 return *(volatile uint32_t *)(ta->base_addr + TA_HISTBIN) & TA_HISTBIN_MASK;
207};
208
209uint32_t ta_get_histcnt(struct timing_adapter *ta) {
210 return *(volatile uint32_t *)(ta->base_addr + TA_HISTCNT) & TA_HISTCNT_MASK;
211};
212
213uint32_t ta_get_version(struct timing_adapter *ta) {
214 return *(volatile uint32_t *)(ta->base_addr + TA_VERSION);
215};