Kristofer Jonsson | 02eef5b | 2022-09-06 14:38:10 +0200 | [diff] [blame] | 1 | /* |
| 2 | * SPDX-FileCopyrightText: Copyright 2022 Arm Limited and/or its affiliates <open-source-office@arm.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * @file generic/cortexm/sys.c |
| 9 | * @brief cortex m system primitives implementation. |
| 10 | */ |
| 11 | |
| 12 | #include <metal/io.h> |
| 13 | #include <metal/sys.h> |
| 14 | #include <metal/utilities.h> |
| 15 | #include <stdint.h> |
| 16 | |
| 17 | void sys_irq_restore_enable(unsigned int flags) |
| 18 | { |
| 19 | metal_unused(flags); |
| 20 | /* we disable/enable all IRQs */ |
| 21 | __enable_irq(); |
| 22 | } |
| 23 | |
| 24 | unsigned int sys_irq_save_disable(void) |
| 25 | { |
| 26 | /* we disable/enable all IRQs */ |
| 27 | __disable_irq(); |
| 28 | return 0; |
| 29 | } |
| 30 | |
| 31 | void sys_irq_enable(unsigned int vector) |
| 32 | { |
| 33 | NVIC_EnableIRQ(vector); |
| 34 | } |
| 35 | |
| 36 | void sys_irq_disable(unsigned int vector) |
| 37 | { |
| 38 | NVIC_DisableIRQ(vector); |
| 39 | } |
| 40 | |
| 41 | void metal_machine_cache_flush(void *addr, unsigned int len) |
| 42 | { |
| 43 | #if (defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)) |
| 44 | SCB_CleanDCache_by_Addr(addr, len); |
| 45 | #else |
| 46 | metal_unused(addr); |
| 47 | metal_unused(len); |
| 48 | #endif |
| 49 | } |
| 50 | |
| 51 | void metal_machine_cache_invalidate(void *addr, unsigned int len) |
| 52 | { |
| 53 | #if (defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)) |
| 54 | SCB_InvalidateDCache_by_Addr(addr, len); |
| 55 | #else |
| 56 | metal_unused(addr); |
| 57 | metal_unused(len); |
| 58 | #endif |
| 59 | } |
| 60 | |
| 61 | void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa, |
| 62 | size_t size, unsigned int flags) |
| 63 | { |
| 64 | metal_unused(pa); |
| 65 | metal_unused(size); |
| 66 | metal_unused(flags); |
| 67 | |
| 68 | return va; |
| 69 | } |