commit f8ae5e1f5ca090b37a701f9dd75ee57106d30dc8
author Per Åstrand <per.astrand@arm.com> Tue Oct 20 10:26:17 2020 +0200
committer Kristofer Jonsson <kristofer.jonsson@arm.com> Tue Oct 20 13:41:59 2020 +0000
tree d5181ca6cb84061a32d52e1d20ea24a9db9d1d01
parent b25695a00f3536d38c5ca24b406ec4d2e6d5b563

Update example mailbox.dtsi for MHUv2

Change-Id: I1cfc62ad9a2d24f9b354ca9b7b97b4e65a1f9d34

mailbox/mailbox.dtsi

diff --git a/mailbox/mailbox.dtsi b/mailbox/mailbox.dtsi
index 900326f..7774abf 100644
--- a/mailbox/mailbox.dtsi
+++ b/mailbox/mailbox.dtsi
@@ -1,5 +1,5 @@
 /*
- * (C) COPYRIGHT 2020 ARM Limited. All rights reserved.
+ * (C) COPYRIGHT 2020 Arm Limited. All rights reserved.
  *
  * This program is free software and is provided to you under the terms of the
  * GNU General Public License version 2 as published by the Free Software
@@ -17,24 +17,42 @@
  *
  * SPDX-License-Identifier: GPL-2.0-only
  */
- 
- /* Example for mailbox driver dts entries */
+
+ /* Example for mailbox driver dts entries for mhuv2 */
 
 /{
-       ethosu_mailbox: mhu@6ca00000 {
-               compatible = "arm,mini_mhu", "arm,primecell";
-               reg = <0x0 0x6ca00000 0x0 0x1000>;
-               interrupts = <0 168 4>;
-               interrupt-names = "mhu_npu_rx";
-               #mbox-cells = <1>;
-               clocks = <&soc_refclk100mhz>;
-               clock-names = "apb_pclk";
+      npu_mhuv2_0: mhuv2@50040000 {
+              compatible = "arm,primecell";
+              reg = <0x0 0x50040000 0x0 0x1000>,
+                    <0x0 0x50050000 0x0 0x1000>;
+              clocks = <&clk_apb>;
+              clock-names = "apb_pclk";
+              #mbox-cells = <2>;
+              interrupts = <0 195 4>;
+              interrupt-names = "mhu_rx";
        };
 
-       mailbox_test {
-               compatible      = "mailbox-test";
-               reg             = <0x0 0x84000000 0x0 0x10000>, <0x0 0x84010000 0x0 0x10000>;
-               mboxes          = <&ethosu_mailbox 0>, <&ethosu_mailbox 0>;
-               mbox-names      = "tx", "rx";
-       };
+      ethosu@0x50000000 {
+              #address-cells = <2>;
+              #size-cells = <2>;
+              #interrupt-cells = <3>;
+              compatible = "arm,ethosu";
+              reg = <0 0x84000000 0 0x00010000>,
+                        <0 0x84010000 0 0x00010000>,
+                        <0 0x84020000 0 0x00010000>;
+              reg-names = "in_queue", "out_queue", "print_queue";
+              memory-region = <&ethosu_reserved>;
+              ranges = <>;
+              mboxes = <&npu_mhuv2_0 0>, <&npu_mhuv2_0 0>;
+              mbox-names = "tx", "rx";
+              dma-ranges = <0 0x60000000 0 0x80000000 0 0x20000000>;
+      };
+
+      mailbox_mhu_test@0x84000000 {
+              compatible      = "mailbox-test";
+              reg             = <0x0 0x84000000 0x0 0x10000>, <0x0 0x84010000 0x0 0x10000>;
+              mboxes          = <&npu_mhuv2_0 0>, <&npu_mhuv2_0 0>;
+              mbox-names      = "tx", "rx";
+      };
 };
+