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Tim Hall79d07d22020-04-27 18:20:16 +01001# Copyright (C) 2020 Arm Limited or its affiliates. All rights reserved.
2#
3# SPDX-License-Identifier: Apache-2.0
4#
5# Licensed under the Apache License, Version 2.0 (the License); you may
6# not use this file except in compliance with the License.
7# You may obtain a copy of the License at
8#
9# www.apache.org/licenses/LICENSE-2.0
10#
11# Unless required by applicable law or agreed to in writing, software
12# distributed under the License is distributed on an AS IS BASIS, WITHOUT
13# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14# See the License for the specific language governing permissions and
15# limitations under the License.
Tim Hall79d07d22020-04-27 18:20:16 +010016# Description:
17# Serialises and packs an NPU subgraph into tensors.
Diego Russoea6111a2020-04-14 18:41:58 +010018import struct
19
20import numpy as np
21
22from . import driver_actions
Tim Hall79d07d22020-04-27 18:20:16 +010023from .data_type import DataType
Diego Russoe8a10452020-04-21 17:39:10 +010024from .nn_graph import PassPlacement
25from .operation import Operation
26from .tensor import MemArea
Patrik Gustavssoneca2e952020-05-27 09:15:11 +020027from .tensor import MemType
Diego Russoe8a10452020-04-21 17:39:10 +010028from .tensor import Tensor
29from .tensor import TensorFormat
30from .tensor import TensorPurpose
Tim Hall79d07d22020-04-27 18:20:16 +010031
32
Patrik Gustavssoneca2e952020-05-27 09:15:11 +020033def make_memory_tensor(name, mem_area, mem_type, sz, want_values, arch):
Tim Hall79d07d22020-04-27 18:20:16 +010034 tens = Tensor([sz], DataType.uint8, name)
35 tens.mem_area = mem_area
Patrik Gustavssoneca2e952020-05-27 09:15:11 +020036 tens.mem_type = mem_type
Tim Hall79d07d22020-04-27 18:20:16 +010037 tens.purpose = TensorPurpose.FeatureMap
38 tens.set_format(TensorFormat.NHWC, arch)
39 if want_values:
40 tens.values = np.zeros(tens.shape, np.uint8)
41 return tens
42
43
44def copy_compressed_values_to_memory_tensor(memory_tensor, src_tensor):
45 start_addr = src_tensor.address
46 for compressed_values in src_tensor.compressed_values:
47 end_addr = start_addr + len(compressed_values)
48 memory_tensor.values[start_addr:end_addr] = compressed_values
49 start_addr = end_addr
50
Tim Hallc30f4952020-06-15 20:47:35 +010051
Charles Xu78792222020-05-13 10:15:26 +020052def copy_ifm_values_to_memory_tensor(memory_tensor, src_tensor):
53 start_addr = src_tensor.address
54 end_addr = start_addr + src_tensor.quant_values.size
55 memory_tensor.values[start_addr:end_addr] = src_tensor.quant_values
Tim Hall79d07d22020-04-27 18:20:16 +010056
Tim Hallc30f4952020-06-15 20:47:35 +010057
Patrik Gustavsson3ab94522020-06-29 17:36:55 +020058def serialise_npu_subgraph_into_tensors(nng, sg, arch, scratch_tens, scratch_fast_tens, flash_tens):
Tim Hall79d07d22020-04-27 18:20:16 +010059 if sg.placement != PassPlacement.Npu:
Patrik Gustavsson3ab94522020-06-29 17:36:55 +020060 return scratch_tens, scratch_fast_tens, flash_tens
Tim Hall79d07d22020-04-27 18:20:16 +010061
62 flash_area = arch.permanent_storage_mem_area
Patrik Gustavssoneca2e952020-05-27 09:15:11 +020063 scratch_area = arch.feature_map_storage_mem_area
Patrik Gustavsson3ab94522020-06-29 17:36:55 +020064 scratch_fast_area = arch.fast_storage_mem_area
Tim Hall79d07d22020-04-27 18:20:16 +010065
66 flash_size = sg.memory_used.get(flash_area, 0)
67 scratch_size = sg.memory_used.get(scratch_area, 0)
68
69 # Prepare driver actions for this command tensor
70 da_list = []
71 driver_actions.emit_fourcc(da_list, "COP1")
72 driver_actions.emit_config(da_list, 0, 1, arch)
73 driver_actions.emit_cmd_stream_header(da_list, len(sg.register_command_stream))
74
75 # Append command stream words
76 da_list.extend(sg.register_command_stream)
77
78 # Convert to bytes
79 payload_bytes = struct.pack("<{0}I".format(len(da_list)), *da_list)
80
81 command_stream_size_bytes = len(payload_bytes)
82
83 # Adjust the bits per element calculation to exclude metadata generated by Vela
84 nng.total_size[flash_area] = nng.total_size.get(flash_area, 0) - flash_size - command_stream_size_bytes
85 nng.total_elements[flash_area] = nng.total_elements.get(flash_area, 0) - flash_size - command_stream_size_bytes
86 nng.total_size[scratch_area] = nng.total_size.get(scratch_area, 0) - scratch_size
87 nng.total_elements[scratch_area] = nng.total_elements.get(scratch_area, 0) - scratch_size
88
Patrik Gustavsson3ab94522020-06-29 17:36:55 +020089 if scratch_area != scratch_fast_area:
90 nng.total_size[scratch_fast_area] = nng.total_size.get(scratch_fast_area, 0)
91 nng.total_elements[scratch_fast_area] = nng.total_elements.get(scratch_fast_area, 0)
92
Diego Russoea6111a2020-04-14 18:41:58 +010093 if flash_tens == scratch_tens is None:
Tim Hall79d07d22020-04-27 18:20:16 +010094 # First Npu subgraph, create scratch and flash tensors
Patrik Gustavssoneca2e952020-05-27 09:15:11 +020095 sg.scratch_tensor = make_memory_tensor(
96 sg.name + "_scratch", scratch_area, MemType.Scratch, scratch_size, False, arch
97 )
Tim Hall79d07d22020-04-27 18:20:16 +010098 sg.scratch_tensor.purpose = TensorPurpose.Scratch
Patrik Gustavssoneca2e952020-05-27 09:15:11 +020099 sg.flash_tensor = make_memory_tensor(
100 sg.name + "_flash", flash_area, MemType.Permanent_CPU, flash_size, True, arch
101 )
Patrik Gustavsson3ab94522020-06-29 17:36:55 +0200102 # Scratch fast tensor size set to 0. This forces a minimal allocation in the tensor arena
103 # which causes a slot in the basep registers to be reserved, so that the scratch fast tensor
104 # address can be overridden.
105 sg.scratch_fast_tensor = make_memory_tensor(
106 sg.name + "_scratch_fast", scratch_fast_area, MemType.Scratch, 0, False, arch
107 )
108 sg.scratch_fast_tensor.purpose = TensorPurpose.Scratch
Tim Hall79d07d22020-04-27 18:20:16 +0100109 else:
110 sg.scratch_tensor = scratch_tens
111 sg.scratch_tensor.shape[0] += scratch_size
112 sg.flash_tensor = flash_tens
113 sg.flash_tensor.shape[0] += flash_size
114
Patrik Gustavsson3ab94522020-06-29 17:36:55 +0200115 sg.scratch_fast_tensor = scratch_fast_tens
116 sg.scratch_fast_tensor.shape[0] = 0
117
Tim Hall79d07d22020-04-27 18:20:16 +0100118 for cps in sg.cascaded_passes:
119 for ps in cps.passes:
Charles Xu78792222020-05-13 10:15:26 +0200120 if ps.placement == PassPlacement.Npu:
Tim Hallc30f4952020-06-15 20:47:35 +0100121 if ps.weight_tensor is not None:
Charles Xu78792222020-05-13 10:15:26 +0200122 # For DMA ops, ps.weight_tensor is referring to the SRAM weight tensor and therefore the address
123 # is pointing at the destination address of where the weights should be placed in SRAM.
124 # This ensures that the Flash weight tensor is used instead and thus gets the correct address.
125 if ps.weight_tensor.ops[0].type == "DMA":
126 copy_compressed_values_to_memory_tensor(sg.flash_tensor, ps.weight_tensor.ops[0].inputs[0])
127 else:
128 copy_compressed_values_to_memory_tensor(sg.flash_tensor, ps.weight_tensor)
Tim Hall79d07d22020-04-27 18:20:16 +0100129
Charles Xu78792222020-05-13 10:15:26 +0200130 copy_compressed_values_to_memory_tensor(sg.flash_tensor, ps.scale_tensor)
131
Patrik Gustavssoneca2e952020-05-27 09:15:11 +0200132 if ps.ifm_tensor is not None and ps.ifm_tensor.mem_type not in (MemType.Scratch, MemType.Scratch_fast):
Charles Xu78792222020-05-13 10:15:26 +0200133 copy_ifm_values_to_memory_tensor(sg.flash_tensor, ps.ifm_tensor)
Patrik Gustavssoneca2e952020-05-27 09:15:11 +0200134 if ps.ifm2_tensor is not None and (
135 ps.ifm2_tensor.mem_type not in (MemType.Scratch, MemType.Scratch_fast)
136 ):
Charles Xu78792222020-05-13 10:15:26 +0200137 copy_ifm_values_to_memory_tensor(sg.flash_tensor, ps.ifm2_tensor)
Tim Hall79d07d22020-04-27 18:20:16 +0100138
139 sg.command_stream_tensor = make_memory_tensor(
Patrik Gustavssoneca2e952020-05-27 09:15:11 +0200140 sg.name + "_command_stream", flash_area, MemType.Permanent_CPU, command_stream_size_bytes, True, arch
Tim Hall79d07d22020-04-27 18:20:16 +0100141 )
142 sg.command_stream_tensor.values = np.frombuffer(payload_bytes, dtype=np.uint8)
143
Patrik Gustavsson3ab94522020-06-29 17:36:55 +0200144 return sg.scratch_tensor, sg.scratch_fast_tensor, sg.flash_tensor
Tim Hall79d07d22020-04-27 18:20:16 +0100145
146
147def add_const_tens_to_startup_cascaded_pass(startup_cps, tens):
148 op = Operation("Const", tens.name + "_const")
149 op.outputs = [tens]
150 tens.ops = [op]
151 startup_cps.passes[0].ops.insert(0, op)
152 startup_cps.passes[0].outputs.insert(0, tens)
153 startup_cps.outputs.insert(0, tens)
154
155
156def rewrite_npu_call_ops(nng, sg, arch):
157 if sg.placement != PassPlacement.Cpu:
158 return
159
160 startup_cps = sg.cascaded_passes[0]
161
162 for idx, cps in enumerate(sg.cascaded_passes):
163 for ps in cps.passes:
164 for op in ps.ops:
165 if op.type == "NpuOp":
166 callee = op.attrs["subgraph"]
Tim Hallc8310b12020-06-17 14:53:11 +0100167 op.attrs["custom_type"] = op.type
Tim Hall79d07d22020-04-27 18:20:16 +0100168
169 sz = 0
Patrik Gustavsson3ab94522020-06-29 17:36:55 +0200170 for tens in [
171 callee.scratch_fast_tensor,
172 callee.scratch_tensor,
173 callee.flash_tensor,
174 callee.command_stream_tensor,
175 ]:
Tim Hall79d07d22020-04-27 18:20:16 +0100176 op.inputs.insert(0, tens)
177 ps.inputs.insert(0, tens)
178 cps.inputs.insert(0, tens)
Patrik Gustavsson3ab94522020-06-29 17:36:55 +0200179 if tens != callee.scratch_tensor and tens != callee.scratch_fast_tensor:
Tim Hall79d07d22020-04-27 18:20:16 +0100180 add_const_tens_to_startup_cascaded_pass(startup_cps, tens)
181 sz += tens.storage_size()
182
183 for prev_cps in sg.cascaded_passes[: idx + 1]:
184 prev_cps.sram_used += sz
185
186 if callee.scratch_tensor is not None:
Patrik Gustavssoneca2e952020-05-27 09:15:11 +0200187 if callee.scratch_tensor.mem_area == MemArea.Sram:
188 cps.sram_used += callee.scratch_tensor.storage_size()
Patrik Gustavsson3ab94522020-06-29 17:36:55 +0200189
190 if callee.scratch_fast_tensor is not None:
191 if callee.scratch_fast_tensor.mem_area == MemArea.Sram:
192 cps.sram_used += callee.scratch_fast_tensor.storage_size()