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Tim Hall79d07d22020-04-27 18:20:16 +01001# Copyright (C) 2020 Arm Limited or its affiliates. All rights reserved.
2#
3# SPDX-License-Identifier: Apache-2.0
4#
5# Licensed under the Apache License, Version 2.0 (the License); you may
6# not use this file except in compliance with the License.
7# You may obtain a copy of the License at
8#
9# www.apache.org/licenses/LICENSE-2.0
10#
11# Unless required by applicable law or agreed to in writing, software
12# distributed under the License is distributed on an AS IS BASIS, WITHOUT
13# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14# See the License for the specific language governing permissions and
15# limitations under the License.
Tim Hall79d07d22020-04-27 18:20:16 +010016# Description:
17# Writes out per-pass and summary performance statistics to CSV files.
Tim Hall79d07d22020-04-27 18:20:16 +010018import csv
Tim Hall79d07d22020-04-27 18:20:16 +010019import sys
20
Diego Russoea6111a2020-04-14 18:41:58 +010021import numpy as np
22
Diego Russoea6111a2020-04-14 18:41:58 +010023from .nn_graph import PassPlacement
Diego Russoe8a10452020-04-21 17:39:10 +010024from .npu_performance import BandwidthDirection
Diego Russoe8a10452020-04-21 17:39:10 +010025from .npu_performance import PassCycles
Diego Russoea6111a2020-04-14 18:41:58 +010026from .numeric_util import round_up_to_int
Louis Verhaardaee5d752020-09-30 09:01:52 +020027from .operation import Op
Diego Russoe8a10452020-04-21 17:39:10 +010028from .tensor import MemArea
29from .tensor import TensorPurpose
Diego Russoea6111a2020-04-14 18:41:58 +010030
Tim Hall79d07d22020-04-27 18:20:16 +010031
Louis Verhaard0265f402020-09-29 13:57:21 +020032def mem_areas_to_report():
33 # Exclude SHRAM, as the SHRAM performance numbers only cover LUT usage
34 return [area for area in MemArea.all() if area != MemArea.Shram]
35
36
Tim Hall79d07d22020-04-27 18:20:16 +010037def write_summary_metrics_csv(nng, summary_filename, arch):
38 with open(summary_filename, "w") as f:
39 writer = csv.writer(f)
Louis Verhaard0265f402020-09-29 13:57:21 +020040 mem_areas = mem_areas_to_report()
Tim Hall79d07d22020-04-27 18:20:16 +010041
42 labels = [
43 "experiment",
44 "network",
45 ]
46
47 labels += (
Tim Hall1bd531d2020-11-01 20:59:36 +000048 ["accelerator_configuration", "system_config", "memory_mode", "core_clock", "sram_size"]
Louis Verhaard0265f402020-09-29 13:57:21 +020049 + [area.identifier_name() + "_bandwidth" for area in mem_areas]
Tim Hall79d07d22020-04-27 18:20:16 +010050 + ["weights_storage_area", "feature_map_storage_area"]
51 )
52
53 labels += [
54 "inferences_per_second",
55 "batch_size",
56 "inference_time",
57 "passes_before_fusing",
58 "passes_after_fusing",
59 ]
Louis Verhaard0265f402020-09-29 13:57:21 +020060 labels += [area.identifier_name() + "_memory_used" for area in mem_areas]
Tim Hall79d07d22020-04-27 18:20:16 +010061 labels += ["on_chip_flash_bits_per_element", "off_chip_flash_bits_per_element"]
62
Louis Verhaard0265f402020-09-29 13:57:21 +020063 for mem_area in mem_areas:
Tim Hall79d07d22020-04-27 18:20:16 +010064 labels += [
65 mem_area.identifier_name() + "_feature_map_read_bytes",
66 mem_area.identifier_name() + "_feature_map_write_bytes",
67 mem_area.identifier_name() + "_weight_read_bytes",
68 mem_area.identifier_name() + "_weight_write_bytes",
69 mem_area.identifier_name() + "_total_bytes",
70 ]
71
Diqing Zhong69aadd02020-12-08 13:08:48 +010072 labels += ["nn_macs", "nn_tops"]
Tim Hall79d07d22020-04-27 18:20:16 +010073
74 labels += ["cycles_" + kind.identifier_name() for kind in PassCycles.all()]
75
76 writer.writerow(labels)
77
78 data_items = [
79 "default",
80 nng.name,
81 ]
82
83 if arch:
84 data_items += (
Tim Hall1bd531d2020-11-01 20:59:36 +000085 [
86 arch.accelerator_config.name,
87 arch.system_config,
88 arch.memory_mode,
89 arch.core_clock,
90 arch.sram_size / 1024,
91 ]
Louis Verhaard0265f402020-09-29 13:57:21 +020092 + [arch.memory_bandwidths_per_second[mem_area] / 1000.0 / 1000 / 1000 for mem_area in mem_areas]
Tim Hall79d07d22020-04-27 18:20:16 +010093 + [
94 arch.tensor_storage_mem_area[TensorPurpose.Weights].display_name(),
95 arch.tensor_storage_mem_area[TensorPurpose.FeatureMap].display_name(),
96 ]
97 )
98
Tim Hall1bd531d2020-11-01 20:59:36 +000099 midpoint_inference_time = nng.cycles[PassCycles.Total] / arch.core_clock
Michael McGeaghb4249742020-07-30 14:36:40 +0100100 if midpoint_inference_time > 0:
101 midpoint_fps = 1 / midpoint_inference_time
102 else:
103 midpoint_fps = np.nan
Tim Hall79d07d22020-04-27 18:20:16 +0100104
105 n_passes = sum(len(sg.passes) for sg in nng.subgraphs)
106 n_cascaded_passes = sum(len(sg.cascaded_passes) for sg in nng.subgraphs)
107
108 data_items += [midpoint_fps, nng.batch_size, midpoint_inference_time, n_passes, n_cascaded_passes]
Louis Verhaard0265f402020-09-29 13:57:21 +0200109 data_items += [nng.memory_used.get(mem_area, 0) / 1024.0 for mem_area in mem_areas]
Tim Hall79d07d22020-04-27 18:20:16 +0100110
111 data_items += [
112 nng.bits_per_element.get(MemArea.OnChipFlash, 0.0),
113 nng.bits_per_element.get(MemArea.OffChipFlash, 0.0),
114 ]
115
Louis Verhaard0265f402020-09-29 13:57:21 +0200116 for mem_area in mem_areas:
Tim Hall79d07d22020-04-27 18:20:16 +0100117 bws = nng.bandwidths[mem_area]
118 total_bw = np.sum(bws)
119 weight_bws = bws[TensorPurpose.Weights]
120 fm_bws = bws[TensorPurpose.FeatureMap]
121 data_items += [
122 fm_bws[BandwidthDirection.Read],
123 fm_bws[BandwidthDirection.Write],
124 weight_bws[BandwidthDirection.Read],
125 weight_bws[BandwidthDirection.Write],
126 total_bw,
127 ]
128
129 data_items += [
Diqing Zhong69aadd02020-12-08 13:08:48 +0100130 nng.macs,
131 nng.macs * 2 * midpoint_fps / 1e12,
Tim Hall79d07d22020-04-27 18:20:16 +0100132 ]
133
134 data_items += [nng.cycles[kind] for kind in PassCycles.all()]
135
136 writer.writerow(data_items)
137
138
139def write_pass_metrics_csv(nng, pass_filename):
140
141 with open(pass_filename, "w") as f:
142 writer = csv.writer(f)
143
144 purpose_list = (
145 ("total", (TensorPurpose.Weights, TensorPurpose.FeatureMap)),
146 ("weights", (TensorPurpose.Weights,)),
147 ("feature_map", (TensorPurpose.FeatureMap,)),
148 )
149
150 direction_list = (
151 ("total", (BandwidthDirection.Read, BandwidthDirection.Write)),
152 ("read", (BandwidthDirection.Read,)),
153 ("write", (BandwidthDirection.Write,)),
154 )
155 bandwidth_names = []
156 bandwidth_indices = []
Louis Verhaard0265f402020-09-29 13:57:21 +0200157 for mem_area in mem_areas_to_report():
Tim Hall79d07d22020-04-27 18:20:16 +0100158 for purpose, purpose_candidates in purpose_list:
159 for direction, direction_candidates in direction_list:
Diqing Zhong42e833d2020-10-02 13:18:42 +0200160 label = "bytes_{}_{}_{}".format(mem_area.identifier_name(), purpose, direction)
Tim Hall79d07d22020-04-27 18:20:16 +0100161 bandwidth_names.append(label)
162 bandwidth_indices.append((mem_area, purpose_candidates, direction_candidates))
163
Tim Hall79d07d22020-04-27 18:20:16 +0100164 all_cycles = (
165 PassCycles.Total,
Diqing Zhong42e833d2020-10-02 13:18:42 +0200166 PassCycles.Npu,
Tim Hall79d07d22020-04-27 18:20:16 +0100167 PassCycles.SramAccess,
168 PassCycles.DramAccess,
169 PassCycles.OnChipFlashAccess,
170 PassCycles.OffChipFlashAccess,
171 )
172 writer.writerow(
173 [
174 "name",
175 "operators",
176 "placement",
177 "streaming_strategy",
178 "block_config_height",
179 "block_config_width",
180 "block_config_input_channels",
181 "block_config_output_channels",
Tim Hall79d07d22020-04-27 18:20:16 +0100182 ]
183 + ["cycles_" + v.identifier_name() for v in all_cycles]
Diqing Zhong69aadd02020-12-08 13:08:48 +0100184 + ["nn_macs"]
Tim Hall79d07d22020-04-27 18:20:16 +0100185 + bandwidth_names
186 + ["sram_used"]
187 )
188
189 def write_subgraph(sg):
190 for cps in sg.cascaded_passes:
191 if cps.placement == PassPlacement.StartupInit:
192 continue # skip the dummy init pass
193
194 for ps in cps.passes:
Louis Verhaardaee5d752020-09-30 09:01:52 +0200195 if len(ps.ops) == 1 and ps.ops[0].type == Op.CustomNpuOp:
Tim Hall79d07d22020-04-27 18:20:16 +0100196 # just treat this as a call, unroll it
197 write_subgraph(ps.ops[0].attrs["subgraph"])
198 continue
Louis Verhaardaee5d752020-09-30 09:01:52 +0200199 stats = [ps.name, " ".join(op.type.name for op in ps.ops)]
Tim Hall79d07d22020-04-27 18:20:16 +0100200 stats += [ps.placement.name]
201 stats += [cps.strategy.name]
202 stats += list(ps.block_config)
Tim Hall79d07d22020-04-27 18:20:16 +0100203 stats += [round_up_to_int(ps.cycles[v]) for v in all_cycles]
Diqing Zhong69aadd02020-12-08 13:08:48 +0100204 stats += [round_up_to_int(ps.macs)]
Tim Hall79d07d22020-04-27 18:20:16 +0100205 for indices in bandwidth_indices:
206 res = 0
207 i = indices[0]
208 for j in indices[1]:
209 for k in indices[2]:
210 res += round_up_to_int(ps.bandwidths[i, j, k])
211 stats.append(res)
Patrik Gustavssoneca2e952020-05-27 09:15:11 +0200212 try:
213 stats += [ps.sram_used]
214 except AttributeError:
215 stats += [0]
Tim Hall79d07d22020-04-27 18:20:16 +0100216
217 writer.writerow(stats)
218
219 write_subgraph(nng.get_root_subgraph())
220
221
222def print_performance_metrics_for_strat(
223 arch,
224 name,
225 cycles,
226 macs,
227 bandwidths,
228 batch_size,
229 memory_used,
230 num_passes,
231 num_cascaded_passes,
232 n_operations=0,
Michael McGeagh6f725262020-12-03 15:21:36 +0000233 cpu_operations=None,
Tim Hall79d07d22020-04-27 18:20:16 +0100234 bits_per_element=None,
235 show_cpu_operations=False,
236 f=sys.stdout,
237):
238
Louis Verhaard0265f402020-09-29 13:57:21 +0200239 orig_mem_areas_labels = [(v, v.display_name()) for v in mem_areas_to_report()]
Tim Hall79d07d22020-04-27 18:20:16 +0100240
Tim Hall1bd531d2020-11-01 20:59:36 +0000241 midpoint_inference_time = cycles[PassCycles.Total] / arch.core_clock
Michael McGeaghb4249742020-07-30 14:36:40 +0100242 if midpoint_inference_time > 0:
243 midpoint_fps = 1 / midpoint_inference_time
244 else:
245 midpoint_fps = np.nan
Tim Hall79d07d22020-04-27 18:20:16 +0100246
247 mem_area_labels = [
248 (mem_area, label) for mem_area, label in orig_mem_areas_labels if np.sum(bandwidths[mem_area]) > 0
249 ]
250
251 if name:
252 print("", file=f)
Diqing Zhong69aadd02020-12-08 13:08:48 +0100253 print(f"Network summary for {name}", file=f)
254 print(f"Accelerator configuration {arch.accelerator_config.name:>20}", file=f)
255 print(f"System configuration {arch.system_config:>20}", file=f)
256 print(f"Memory mode {arch.memory_mode:>20}", file=f)
257 print(f"Accelerator clock {int(arch.core_clock / 1e6):12d} MHz", file=f)
Tim Hall79d07d22020-04-27 18:20:16 +0100258 for mem_area, label in mem_area_labels:
Diqing Zhong69aadd02020-12-08 13:08:48 +0100259 label += " bandwidth"
260 bandwidth = arch.memory_bandwidths_per_second[mem_area] / 1000.0 / 1000 / 1000
Tim Hall79d07d22020-04-27 18:20:16 +0100261 print(
Diqing Zhong69aadd02020-12-08 13:08:48 +0100262 f"Design peak {label:25} {bandwidth:12.2f} GB/s", file=f,
Tim Hall79d07d22020-04-27 18:20:16 +0100263 )
Tim Hall79d07d22020-04-27 18:20:16 +0100264 print(file=f)
265 for mem_area, label in mem_area_labels:
Diego Russoea6111a2020-04-14 18:41:58 +0100266 if mem_area not in memory_used:
Tim Hall79d07d22020-04-27 18:20:16 +0100267 continue
268
269 aug_label = label + " used"
270
271 extra = ""
272 if (mem_area == MemArea.OnChipFlash or mem_area == MemArea.OffChipFlash) and bits_per_element is not None:
Diqing Zhong69aadd02020-12-08 13:08:48 +0100273 extra = f" ({bits_per_element[mem_area]:.2f} bits per element)"
Tim Hall79d07d22020-04-27 18:20:16 +0100274
Diqing Zhong69aadd02020-12-08 13:08:48 +0100275 print(f"Total {aug_label:25} {memory_used[mem_area] / 1024.0:12.2f} KiB{extra}", file=f)
Tim Hall79d07d22020-04-27 18:20:16 +0100276
277 print(file=f)
Diqing Zhong69aadd02020-12-08 13:08:48 +0100278 print(f"{num_passes:d} passes fused into {num_cascaded_passes:d}", file=f)
Tim Hall79d07d22020-04-27 18:20:16 +0100279
Michael McGeagh6f725262020-12-03 15:21:36 +0000280 if cpu_operations is None:
281 cpu_operations = []
282
Tim Hall79d07d22020-04-27 18:20:16 +0100283 n_cpu_operations = len(cpu_operations)
284 if n_operations > 0:
285 print(
Diqing Zhong69aadd02020-12-08 13:08:48 +0100286 f"{n_cpu_operations:d}/{n_operations:d}"
287 f" ({n_cpu_operations / n_operations * 100:4.1%}) operations falling back to the CPU",
Tim Hall79d07d22020-04-27 18:20:16 +0100288 file=f,
289 )
290
291 if show_cpu_operations:
292 for op in cpu_operations:
293
294 def format_tens_list(lst):
295 return " ".join(str(list(tens.shape)) for tens in lst)
296
297 print(
Diqing Zhong69aadd02020-12-08 13:08:48 +0100298 f"CPU operation: {op.type}"
299 f" inputs {format_tens_list(op.inputs)}, outputs {format_tens_list(op.outputs)}",
Tim Hall79d07d22020-04-27 18:20:16 +0100300 file=f,
301 )
302
303 print("", file=f)
304
305 for mem_area, label in mem_area_labels:
306 bws = bandwidths[mem_area]
307 total_bw = np.sum(bws)
308 weight_bws = bws[TensorPurpose.Weights]
309 fm_bws = bws[TensorPurpose.FeatureMap]
310 aug_label = label + " bandwidth"
311 print(
Diqing Zhong69aadd02020-12-08 13:08:48 +0100312 f"Average {aug_label:25} {total_bw * midpoint_fps / 1000.0 / 1000.0 / 1000.0:12.2f} GB/s", file=f,
Tim Hall79d07d22020-04-27 18:20:16 +0100313 )
314 print(
Diqing Zhong69aadd02020-12-08 13:08:48 +0100315 f"Input {aug_label:25} {np.sum(fm_bws[BandwidthDirection.Read]) / 1000.0 / 1000.0:12.2f} MB/batch",
Tim Hall79d07d22020-04-27 18:20:16 +0100316 file=f,
317 )
Diqing Zhong69aadd02020-12-08 13:08:48 +0100318 print(f"Weight {aug_label:25} {np.sum(weight_bws) / 1000.0 / 1000.0:12.2f} MB/batch", file=f)
Tim Hall79d07d22020-04-27 18:20:16 +0100319 print(
Diqing Zhong69aadd02020-12-08 13:08:48 +0100320 f"Output {aug_label:25} "
321 f"{np.sum(fm_bws[BandwidthDirection.Write]) / 1000.0 / 1000.0:12.2f} MB/batch",
Tim Hall79d07d22020-04-27 18:20:16 +0100322 file=f,
323 )
Diqing Zhong69aadd02020-12-08 13:08:48 +0100324 print(f"Total {aug_label:25} {total_bw / 1000.0 / 1000.0:12.2f} MB/batch", file=f)
Tim Hall79d07d22020-04-27 18:20:16 +0100325 print(
Diqing Zhong69aadd02020-12-08 13:08:48 +0100326 f"Total {aug_label:25} per input "
327 f"{total_bw / 1000.0 / 1000.0 / batch_size:9.2f} MB/inference (batch size {batch_size:d})",
Tim Hall79d07d22020-04-27 18:20:16 +0100328 file=f,
329 )
330 print(file=f)
331
Tim Hall79d07d22020-04-27 18:20:16 +0100332 print(
Diqing Zhong69aadd02020-12-08 13:08:48 +0100333 f"Neural network macs {int(macs):12d} MACs/batch", file=f,
Tim Hall79d07d22020-04-27 18:20:16 +0100334 )
335 print(
Diqing Zhong69aadd02020-12-08 13:08:48 +0100336 f"Network Tops/s {macs * 2 * midpoint_fps / 1e12:12.2f} Tops/s", file=f,
Tim Hall79d07d22020-04-27 18:20:16 +0100337 )
338 print(file=f)
339
340 for kind in PassCycles.all():
341 aug_label = kind.display_name() + " cycles"
342 cyc = cycles[kind]
Diqing Zhong69aadd02020-12-08 13:08:48 +0100343 print(f"{aug_label:30} {int(cyc):12d} cycles/batch", file=f)
Tim Hall79d07d22020-04-27 18:20:16 +0100344 print(file=f)
345
346 print(
Diqing Zhong69aadd02020-12-08 13:08:48 +0100347 f"Batch Inference time {midpoint_inference_time * 1000:7.2f} ms,"
348 f" {midpoint_fps:7.2f} inferences/s (batch size {batch_size:d})",
Tim Hall79d07d22020-04-27 18:20:16 +0100349 file=f,
350 )
351 print(file=f)
352
353
354def print_performance_metrics(nng, arch, show_cpu_operations=False, f=sys.stdout):
355 n_passes = sum(len(sg.passes) for sg in nng.subgraphs)
356 n_cascaded_passes = sum(len(sg.cascaded_passes) for sg in nng.subgraphs)
357 n_operations = sum(len(ps.ops) for sg in nng.subgraphs for ps in sg.passes)
358 cpu_operations = sum((ps.ops for sg in nng.subgraphs for ps in sg.passes if ps.placement == PassPlacement.Cpu), [])
359 return print_performance_metrics_for_strat(
360 arch,
361 nng.name,
362 nng.cycles,
363 nng.macs,
364 nng.bandwidths,
365 nng.batch_size,
366 nng.memory_used,
367 n_passes,
368 n_cascaded_passes,
369 n_operations,
370 cpu_operations,
371 nng.bits_per_element,
372 show_cpu_operations,
373 f,
374 )
375
376
377def write_human_friendly_metrics(nng, arch, filename):
378 f = open(filename, "w")
379 print_performance_metrics(nng, arch, f=f)