MLECO-2919: Restructuring to standardise HAL APIs
* LCD module component created (removed from individual
platform packs).
* retarget.c moved out into its own component that wraps
the uart module. It also have the native stub for
GetLine => paved the way for removing data_acq module
from profiles.
* shortened names for components' dir for npu and ta
* remove peripheral_memmap and peripheral_irqs headers
from platform_drivers.h. There should be no need for
these to be included in the top level now. These should
be private headers.
* cmsis_device moved in as a component.
* Pyenv created by set_up_default_resource.py will also
install packages that CMake's source generator needs.
TODO's:
* Remove timer from profiles (MLECO-3096)
Change-Id: I9d6ea2f4f291788f40a16ed507019563c8d7f205
diff --git a/source/hal/source/components/cmsis_device/CMakeLists.txt b/source/hal/source/components/cmsis_device/CMakeLists.txt
new file mode 100644
index 0000000..dcaeff5
--- /dev/null
+++ b/source/hal/source/components/cmsis_device/CMakeLists.txt
@@ -0,0 +1,89 @@
+#----------------------------------------------------------------------------
+# Copyright (c) 2022 Arm Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#----------------------------------------------------------------------------
+
+#########################################################
+# Generic CMSIS Start up library for Cortex-M targets #
+#########################################################
+cmake_minimum_required(VERSION 3.15.6)
+
+set(CMSIS_DEVICE_TARGET cmsis_device)
+set(CPU_HEADER_TARGET cmsis_device_cpu_header)
+
+project(${CMSIS_DEVICE_TARGET}
+ DESCRIPTION "Generic CMSIS start up file for Cortex-M targets"
+ LANGUAGES C CXX ASM)
+
+# 1. We should be cross-compiling (non-native target)
+if (NOT ${CMAKE_CROSSCOMPILING})
+ message(FATAL_ERROR "No ${CMSIS_DEVICE_TARGET} support for this target.")
+endif()
+
+# 2. Check if CMSIS sources have been defined
+if (NOT DEFINED CMSIS_SRC_PATH)
+ message(FATAL_ERROR "CMSIS_SRC_PATH path should be defined for ${CMSIS_DEVICE_TARGET}.")
+endif()
+
+# 3.1 Create an interface library for CPU header only
+add_library(${CPU_HEADER_TARGET} INTERFACE)
+
+## Interface include directories:
+target_include_directories(${CPU_HEADER_TARGET}
+ INTERFACE
+ include
+ ${CMSIS_SRC_PATH}/CMSIS/Core/Include
+ ${CMSIS_SRC_PATH}/Device/ARM/${ARM_CPU}/Include
+ ${CMSIS_SRC_PATH}/Device/ARM/${ARM_CPU}/Include/Template)
+
+# 3.2 Create static library
+add_library(${CMSIS_DEVICE_TARGET} STATIC)
+
+## Sources - public
+target_sources(${CMSIS_DEVICE_TARGET}
+ PUBLIC
+ source/handlers.c)
+
+## Sources - private
+target_sources(${CMSIS_DEVICE_TARGET}
+ PRIVATE
+ ${CMSIS_SRC_PATH}/Device/ARM/${ARM_CPU}/Source/system_${ARM_CPU}.c
+ ${CMSIS_SRC_PATH}/Device/ARM/${ARM_CPU}/Source/startup_${ARM_CPU}.c)
+
+# Device definition needs to be set, is checked in source files to include correct header
+target_compile_definitions(${CMSIS_DEVICE_TARGET} PUBLIC ${ARM_CPU})
+
+# Tell linker that reset interrupt handler is our entry point
+target_link_options(
+ ${CMSIS_DEVICE_TARGET}
+ INTERFACE
+ --entry Reset_Handler)
+
+# Link libraries
+target_link_libraries(${CMSIS_DEVICE_TARGET}
+ PUBLIC
+ ${CPU_HEADER_TARGET})
+
+# Check if semihosting configuration is available
+if (COMMAND configure_semihosting)
+ configure_semihosting(${CMSIS_DEVICE_TARGET} OFF)
+endif()
+
+# 4 Display status:
+message(STATUS "CMAKE_CURRENT_SOURCE_DIR: " ${CMAKE_CURRENT_SOURCE_DIR})
+message(STATUS "*******************************************************")
+message(STATUS "Library : " ${CMSIS_DEVICE_TARGET})
+message(STATUS "CMAKE_SYSTEM_PROCESSOR : " ${CMAKE_SYSTEM_PROCESSOR})
+message(STATUS "*******************************************************")
diff --git a/source/hal/source/components/cmsis_device/include/RTE_Components.h b/source/hal/source/components/cmsis_device/include/RTE_Components.h
new file mode 100644
index 0000000..8988e9b
--- /dev/null
+++ b/source/hal/source/components/cmsis_device/include/RTE_Components.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+#if defined(CPU_HEADER_FILE)
+#include CPU_HEADER_FILE /* Cortex M system header file from CMSIS. */
+#endif /* CPU_HEADER_FILE */
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/source/hal/source/components/cmsis_device/source/handlers.c b/source/hal/source/components/cmsis_device/source/handlers.c
new file mode 100644
index 0000000..a3119e6
--- /dev/null
+++ b/source/hal/source/components/cmsis_device/source/handlers.c
@@ -0,0 +1,152 @@
+/*
+ * Copyright (c) 2021 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "RTE_Components.h"
+
+#include <stdio.h>
+#include <inttypes.h>
+
+/**
+ * @brief Dump core registers on stdout
+ */
+static void LogCoreCPURegisters(void)
+{
+ printf("CTRL : 0x%08" PRIx32 "\n", __get_CONTROL());
+ printf("IPSR : 0x%08" PRIx32 "\n", __get_IPSR());
+ printf("APSR : 0x%08" PRIx32 "\n", __get_APSR());
+ printf("xPSR : 0x%08" PRIx32 "\n", __get_xPSR());
+ printf("PSP : 0x%08" PRIx32 "\n", __get_PSP());
+ printf("MSP : 0x%08" PRIx32 "\n", __get_MSP());
+ printf("PRIMASK : 0x%08" PRIx32 "\n", __get_PRIMASK());
+ printf("BASEPRI : 0x%08" PRIx32 "\n", __get_BASEPRI());
+ printf("FAULTMSK: 0x%08" PRIx32 "\n", __get_FAULTMASK());
+}
+
+/**
+ * @brief Default interrupt handler - an infinite loop.
+ **/
+__attribute__((noreturn)) static void DefaultHandler(void)
+{
+ LogCoreCPURegisters();
+ while (1) {
+ /* Without the following line, armclang may optimize away the
+ * infinite loop because it'd be without side effects and thus
+ * undefined behaviour. */
+ __ASM volatile("");
+ }
+}
+
+#define DEFAULT_HANDLER_CALL(type) \
+ do { \
+ printf("\n"); \
+ printf("%s caught by function %s\n", \
+ type, __FUNCTION__); \
+ DefaultHandler(); \
+ } while (0)
+
+#define DEFAULT_ERROR_HANDLER_CALL() \
+ DEFAULT_HANDLER_CALL("Exception")
+
+#define DEFAULT_IRQ_HANDLER_CALL() \
+ DEFAULT_HANDLER_CALL("Interrupt")
+
+/**
+ * Placeholder Exception Handlers for core interrupts.
+ *
+ * Weak definitions provided to be used if the user chooses not
+ * to override them.
+ **/
+
+/**
+ * @brief Non maskable interrupt handler.
+ **/
+__attribute__((weak)) void NMI_Handler(void)
+{
+ DEFAULT_ERROR_HANDLER_CALL();
+}
+
+/**
+ * @brief Hardfault interrupt handler.
+ **/
+__attribute__((weak)) void HardFault_Handler(void)
+{
+ DEFAULT_ERROR_HANDLER_CALL();
+}
+
+/**
+ * @brief Memory management interrupt handler.
+ **/
+__attribute__((weak)) void MemManage_Handler(void)
+{
+ DEFAULT_IRQ_HANDLER_CALL();
+}
+
+/**
+ * @brief Bus fault interrupt handler.
+ **/
+__attribute__((weak)) void BusFault_Handler(void)
+{
+ DEFAULT_ERROR_HANDLER_CALL();
+}
+
+/**
+ * @brief Usage fault interrupt handler.
+ **/
+__attribute__((weak)) void UsageFault_Handler(void)
+{
+ DEFAULT_ERROR_HANDLER_CALL();
+}
+
+/**
+ * @brief Secure access fault interrupt handler.
+ **/
+__attribute__((weak)) void SecureFault_Handler(void)
+{
+ DEFAULT_ERROR_HANDLER_CALL();
+}
+
+/**
+ * @brief Supervisor call interrupt handler.
+ **/
+__attribute__((weak)) void SVC_Handler(void)
+{
+ DEFAULT_IRQ_HANDLER_CALL();
+}
+
+/**
+ * @brief Debug monitor interrupt handler.
+ **/
+__attribute__((weak)) void DebugMon_Handler(void)
+{
+ DEFAULT_IRQ_HANDLER_CALL();
+}
+
+/**
+ * @brief Pending SV call interrupt handler.
+ */
+__attribute__((weak)) void PendSV_Handler(void)
+{
+ DEFAULT_IRQ_HANDLER_CALL();
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/source/hal/source/components/lcd/CMakeLists.txt b/source/hal/source/components/lcd/CMakeLists.txt
new file mode 100644
index 0000000..7378713
--- /dev/null
+++ b/source/hal/source/components/lcd/CMakeLists.txt
@@ -0,0 +1,90 @@
+#----------------------------------------------------------------------------
+# Copyright (c) 2022 Arm Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#----------------------------------------------------------------------------
+
+#########################################################
+# LCD library #
+#########################################################
+
+cmake_minimum_required(VERSION 3.15.6)
+
+project(lcd_component
+ DESCRIPTION "LCD support library"
+ LANGUAGES C CXX ASM)
+
+# Add top level interface library
+set(LCD_IFACE_TARGET lcd_iface)
+add_library(${LCD_IFACE_TARGET} INTERFACE)
+target_include_directories(${LCD_IFACE_TARGET} INTERFACE include)
+
+# Create static library for MPS3 LCD
+set(LCD_MPS3_COMPONENT_TARGET lcd_mps3)
+add_library(${LCD_MPS3_COMPONENT_TARGET} STATIC)
+
+set(CLCD_CONFIG_BASE "0x4930A000" CACHE STRING "LCD configuration base address")
+
+## Include directories - private
+target_include_directories(${LCD_MPS3_COMPONENT_TARGET}
+ PRIVATE
+ source)
+
+## Component sources
+target_sources(${LCD_MPS3_COMPONENT_TARGET}
+ PRIVATE
+ source/glcd_mps3/glcd_mps3.c
+ source/lcd_img.c)
+
+# Compile definitions
+target_compile_definitions(${LCD_MPS3_COMPONENT_TARGET}
+ PRIVATE
+ CLCD_CONFIG_BASE=${CLCD_CONFIG_BASE})
+
+## Add dependencies
+target_link_libraries(${LCD_MPS3_COMPONENT_TARGET} PUBLIC
+ ${LCD_IFACE_TARGET}
+ log)
+
+# Display status
+message(STATUS "CMAKE_CURRENT_SOURCE_DIR: " ${CMAKE_CURRENT_SOURCE_DIR})
+message(STATUS "*******************************************************")
+message(STATUS "Library : " ${LCD_MPS3_COMPONENT_TARGET})
+message(STATUS "*******************************************************")
+
+# Create static library for LCD Stubs
+set(LCD_STUBS_COMPONENT_TARGET lcd_stubs)
+add_library(${LCD_STUBS_COMPONENT_TARGET} STATIC)
+
+## Include directories - private
+target_include_directories(${LCD_STUBS_COMPONENT_TARGET}
+ PRIVATE
+ source)
+
+## Component sources
+target_sources(${LCD_STUBS_COMPONENT_TARGET}
+ PRIVATE
+ source/glcd_stubs/glcd_stubs.c
+ source/lcd_img.c)
+
+## Add dependencies
+target_link_libraries(${LCD_STUBS_COMPONENT_TARGET} PUBLIC
+ ${LCD_IFACE_TARGET}
+ log)
+
+# Display status
+message(STATUS "CMAKE_CURRENT_SOURCE_DIR: " ${CMAKE_CURRENT_SOURCE_DIR})
+message(STATUS "*******************************************************")
+message(STATUS "Library : " ${LCD_STUBS_COMPONENT_TARGET})
+message(STATUS "*******************************************************")
\ No newline at end of file
diff --git a/source/hal/source/components/lcd/include/lcd_img.h b/source/hal/source/components/lcd/include/lcd_img.h
new file mode 100644
index 0000000..b447767
--- /dev/null
+++ b/source/hal/source/components/lcd/include/lcd_img.h
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2021-2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef LCD_IMG_H
+#define LCD_IMG_H
+
+#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+
+/**
+ * @brief Initialise the LCD
+ * @return 0 if successful, error code otherwise.
+ **/
+int lcd_init(void);
+
+/**
+ * @brief Display a given image on the LCD. This allows displaying 8 bit
+ * single or multi-channel images on the LCD.
+ * @param[in] data Pointer to start of the image.
+ * @param[in] width Width of this image.
+ * @param[in] height Image height.
+ * @param[in] channels Number of channels.
+ * @param[in] pos_x Screen position x co-ordinate.
+ * @param[in] pos_y Screen position y co-ordinate.
+ * @param[in] downsample_factor Factor by which the image needs to be
+ * downsampled.
+ * @return 0 if successful, non-zero otherwise.
+ **/
+int lcd_display_image(const uint8_t* data, const uint32_t width,
+ const uint32_t height, const uint32_t channels,
+ const uint32_t pos_x, const uint32_t pos_y,
+ const uint32_t downsample_factor);
+
+/**
+ * @brief Display a given image on the LCD. This allows displaying 8 bit
+ * single or multi-channel images on the LCD.
+ * @param[in] str Pointer to a null terminated string.
+ * @param[in] str_sz Length of the string.
+ * @param[in] pos_x Screen position x co-ordinate.
+ * @param[in] pos_y Screen position y co-ordinate.
+ * @param[in] allow_multiple_lines The function will try and spread
+ * the string into multiple lines if
+ * they don't fit in one.
+ * @return 0 if successful, non-zero otherwise.
+ **/
+int lcd_display_text(const char* str, const size_t str_sz,
+ const uint32_t pos_x, const uint32_t pos_y,
+ const bool allow_multiple_lines);
+
+/**
+ * @brief Display a box with given color on LCD.
+ * @param[in] pos_x Screen position x co-ordinate.
+ * @param[in] pos_y Screen position y co-ordinate.
+ * @param[in] width Width.
+ * @param[in] height Height.
+ * @param[in] color Fill color.
+ * @return 0 if successful, non-zero otherwise.
+ **/
+int lcd_display_box(const uint32_t pos_x, const uint32_t pos_y,
+ const uint32_t width, const uint32_t height, const uint16_t color);
+
+/**
+ * @brief Clear LCD.
+ * @param[in] color Fill color.
+ * @return 0 if successful, non-zero otherwise.
+ **/
+int lcd_clear(const uint16_t color);
+
+/**
+ * @brief Set text color.
+ * @param[in] color Fill color.
+ * @return 0 if successful, non-zero otherwise.
+ **/
+int lcd_set_text_color(const uint16_t color);
+
+#endif /* LCD_IMG_H */
diff --git a/source/hal/source/components/lcd/source/glcd.h b/source/hal/source/components/lcd/source/glcd.h
new file mode 100644
index 0000000..a54c6d0
--- /dev/null
+++ b/source/hal/source/components/lcd/source/glcd.h
@@ -0,0 +1,202 @@
+/*
+ * Copyright (c) 2021-2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef GLCD_H
+#define GLCD_H
+
+#include <stdint.h>
+
+/******************************************************************************
+ Color coding
+ GLCD is coded: 15..11 red, 10..5 green, 4..0 blue (unsigned short)
+ GLCD_R5, GLCD_G6, GLCD_B5
+ original coding: 17..12 red, 11..6 green, 5..0 blue
+ ORG_R6, ORG_G6, ORG_B6
+
+ ORG_R1..5 = GLCD_R0..4, ORG_R0 = GLCD_R4
+ ORG_G0..5 = GLCD_G0..5,
+ ORG_B1..5 = GLCD_B0..4, ORG_B0 = GLCD_B4
+
+ GLCD RGB color definitions
+******************************************************************************/
+#define Black 0x0000 /* 0, 0, 0 */
+#define Navy 0x000F /* 0, 0, 128 */
+#define DarkGreen 0x03E0 /* 0, 128, 0 */
+#define DarkCyan 0x03EF /* 0, 128, 128 */
+#define Maroon 0x7800 /* 128, 0, 0 */
+#define Purple 0x780F /* 128, 0, 128 */
+#define Olive 0x7BE0 /* 128, 128, 0 */
+#define LightGrey 0xC618 /* 192, 192, 192 */
+#define DarkGrey 0x7BEF /* 128, 128, 128 */
+#define Blue 0x001F /* 0, 0, 255 */
+#define Green 0x07E0 /* 0, 255, 0 */
+#define Cyan 0x07FF /* 0, 255, 255 */
+#define Red 0xF800 /* 255, 0, 0 */
+#define Magenta 0xF81F /* 255, 0, 255 */
+#define Yellow 0xFFE0 /* 255, 255, 0 */
+#define White 0xFFFF /* 255, 255, 255 */
+
+/************************** Orientation configuration ************************/
+#ifndef LANDSCAPE
+#define LANDSCAPE 1 /* 1 for landscape, 0 for portrait. */
+#endif
+#ifndef ROTATE180
+#define ROTATE180 1 /* 1 to rotate the screen for 180 deg. */
+#endif
+
+/*------------------------- Speed dependent settings -------------------------*/
+
+/* If processor works on high frequency delay has to be increased, it can be
+ increased by factor 2^N by this constant. */
+#define DELAY_2N 8
+
+/*---------------------- Graphic LCD size definitions ------------------------*/
+#if (LANDSCAPE == 1)
+ #define GLCD_WIDTH 320 /* Screen Width (in pixels). */
+ #define GLCD_HEIGHT 240 /* Screen Height (in pixels). */
+#else
+ #define GLCD_WIDTH 240 /* Screen Width (in pixels). */
+ #define GLCD_HEIGHT 320 /* Screen Height (in pixels). */
+#endif
+
+#define BPP 16 /* Bits per pixel. */
+#define BYPP ((BPP+7)/8) /* Bytes per pixel. */
+
+
+/**
+ * @brief Initialize the Himax LCD with HX8347-D LCD Controller.
+ */
+void GLCD_Initialize(void);
+
+/**
+ * @brief Set draw window region to whole screen.
+ */
+void GLCD_WindowMax(void);
+
+/**
+ * @brief Set draw window region.
+ * @param[in] x Horizontal position.
+ * @param[in] y Vertical position.
+ * @param[in] w Window width in pixel.
+ * @param[in] h Window height in pixels.
+ */
+void GLCD_SetWindow(unsigned int x, unsigned int y,
+ unsigned int w, unsigned int h);
+
+/**
+ * @brief Set foreground color.
+ * @param[in] color Foreground color.
+ */
+void GLCD_SetTextColor(unsigned short color);
+
+/**
+ * @brief Set background color.
+ * @param[in] color Background color.
+ */
+void GLCD_SetBackColor(unsigned short color);
+
+/**
+ * @brief Clear display.
+ * @param[in] color Display clearing color.
+ *
+ */
+void GLCD_Clear(unsigned short color);
+
+/**
+ * @brief Draw character on given position.
+ * @param[in] x Horizontal position.
+ * @param[in] y Vertical position.
+ * @param[in] cw Character width in pixel.
+ * @param[in] ch Character height in pixels.
+ * @param[in] c Pointer to character bitmap.
+ *
+ */
+void GLCD_DrawChar(unsigned int x, unsigned int y,
+ unsigned int cw, unsigned int ch,
+ unsigned char *c);
+
+/**
+ * @brief Display character on given line.
+ * @param[in] ln Line number.
+ * @param[in] col Column number.
+ * @param[in] fi Font index (0 = 9x15).
+ * @param[in] c ASCII character.
+ */
+void GLCD_DisplayChar(unsigned int ln, unsigned int col,
+ unsigned char fi, unsigned char c);
+
+
+/**
+ * @brief Display string on given line.
+ * @param[in] ln Line number.
+ * @param[in] col Column number.
+ * @param[in] fi Font index (0 = 9x15).
+ * @param[in] s Pointer to string.
+ */
+void GLCD_DisplayString(unsigned int ln, unsigned int col,
+ unsigned char fi, char *s);
+
+/**
+ * @brief Clear given line.
+ * @param[in] ln: Line number.
+ * @param[in] fi Font index (0 = 9x15).
+ */
+void GLCD_ClearLn(unsigned int ln, unsigned char fi);
+
+/**
+ * @brief Display graphical bitmap image at position x horizontally and y
+ * vertically. This function is optimized for 16 bits per pixel
+ * format, it has to be adapted for any other format.
+ * @param[in] x Horizontal position.
+ * @param[in] y Vertical position.
+ * @param[in] w Width of bitmap.
+ * @param[in] h Height of bitmap.
+ * @param[in] bitmap Address at which the bitmap data resides.
+ */
+void GLCD_Bitmap(unsigned int x, unsigned int y,
+ unsigned int w, unsigned int h,
+ unsigned short *bitmap);
+
+/**
+ * @brief Displays an 8 bit image, conversion to the LCD's
+ * 16 bit codec is done on the fly.
+ * @param[in] data Pointer to the full sized image data.
+ * @param[in] width Image width.
+ * @param[in] height Image height.
+ * @param[in] channels Number of channels in the image.
+ * @param[in] pos_x Start x position for the LCD.
+ * @param[in] pos_y Start y position for the LCD.
+ * @param[in] downsample_factor Factor by which the image
+ * is downsampled by.
+ */
+void GLCD_Image(const void *data, const uint32_t width,
+ const uint32_t height, const uint32_t channels,
+ const uint32_t pos_x, const uint32_t pos_y,
+ const uint32_t downsample_factor);
+
+/**
+ * @brief Draw box filled with color.
+ * @param[in] x Horizontal position.
+ * @param[in] y Vertical position.
+ * @param[in] w Window width in pixels.
+ * @param[in] h Window height in pixels.
+ * @param[in] color Box color.
+ */
+void GLCD_Box(unsigned int x, unsigned int y,
+ unsigned int w, unsigned int h,
+ unsigned short color);
+
+#endif /* GLCD_H */
diff --git a/source/hal/source/components/lcd/source/glcd_mps3/font_9x15_h.h b/source/hal/source/components/lcd/source/glcd_mps3/font_9x15_h.h
new file mode 100644
index 0000000..bbfb930
--- /dev/null
+++ b/source/hal/source/components/lcd/source/glcd_mps3/font_9x15_h.h
@@ -0,0 +1,128 @@
+/*
+ * Copyright (c) 2021 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+//Font Generated by MikroElektronika GLCD Font Creator 1.2.0.0
+//MikroElektrnika 2011
+//http://www.mikroe.com
+
+//GLCD FontName : Lucida_Console9x15
+//GLCD FontSize : 9x15
+
+#ifndef FONT_9x15_H_H
+#define FONT_9x15_H_H
+
+const unsigned short Font_9x15_h[] = {
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* Code for char num 32. */
+ 0x00,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x10,0x10,0x00,0x00,0x00, /* Code for char num 33. */
+ 0x44,0x44,0x44,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* Code for char num 34. */
+ 0x00,0x12,0x12,0x24,0x7F,0x24,0x28,0x48,0xFE,0x48,0x90,0x90,0x00,0x00,0x00, /* Code for char num 35. */
+ 0x10,0x7C,0x16,0x12,0x12,0x1C,0x38,0x70,0x50,0x50,0x52,0x3E,0x10,0x00,0x00, /* Code for char num 36. */
+ 0x00,0x8C,0x92,0x52,0x52,0x2C,0x10,0x08,0x68,0x94,0x92,0x92,0x62,0x00,0x00, /* Code for char num 37. */
+ 0x00,0x18,0x24,0x24,0x34,0x18,0x0C,0x12,0xB2,0xE2,0xC2,0xBC,0x00,0x00,0x00, /* Code for char num 38. */
+ 0x08,0x08,0x08,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* Code for char num 39. */
+ 0xC0,0x60,0x10,0x10,0x08,0x08,0x08,0x08,0x08,0x08,0x10,0x10,0x60,0xC0,0x00, /* Code for char num 40. */
+ 0x0C,0x18,0x20,0x20,0x40,0x40,0x40,0x40,0x40,0x40,0x20,0x20,0x18,0x0C,0x00, /* Code for char num 41. */
+ 0x00,0x10,0x92,0xEE,0x18,0x28,0x28,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* Code for char num 42. */
+ 0x00,0x00,0x00,0x00,0x10,0x10,0x10,0x10,0xFE,0x10,0x10,0x10,0x00,0x00,0x00, /* Code for char num 43. */
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x10,0x08,0x00, /* Code for char num 44. */
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7C,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* Code for char num 45. */
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00, /* Code for char num 46. */
+ 0x80,0x40,0x40,0x60,0x20,0x20,0x10,0x10,0x08,0x08,0x0C,0x04,0x04,0x02,0x00, /* Code for char num 47. */
+ 0x00,0x38,0x44,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x44,0x38,0x00,0x00,0x00, /* Code for char num 48. */
+ 0x00,0x10,0x1E,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0xFE,0x00,0x00,0x00, /* Code for char num 49. */
+ 0x00,0x3E,0x42,0x40,0x40,0x40,0x20,0x10,0x08,0x04,0x02,0x7E,0x00,0x00,0x00, /* Code for char num 50. */
+ 0x00,0x3C,0x40,0x40,0x40,0x60,0x38,0x40,0x40,0x40,0x40,0x3C,0x00,0x00,0x00, /* Code for char num 51. */
+ 0x00,0x20,0x30,0x28,0x24,0x24,0x22,0x21,0x7F,0x20,0x20,0x20,0x00,0x00,0x00, /* Code for char num 52. */
+ 0x00,0x7C,0x04,0x04,0x04,0x1C,0x20,0x40,0x40,0x40,0x20,0x3C,0x00,0x00,0x00, /* Code for char num 53. */
+ 0x00,0x78,0x04,0x04,0x02,0x3A,0x46,0x82,0x82,0x82,0x44,0x38,0x00,0x00,0x00, /* Code for char num 54. */
+ 0x00,0xFE,0x80,0x40,0x20,0x20,0x10,0x10,0x08,0x08,0x04,0x04,0x00,0x00,0x00, /* Code for char num 55. */
+ 0x00,0x3C,0x42,0x42,0x42,0x24,0x1C,0x62,0x42,0x42,0x42,0x3C,0x00,0x00,0x00, /* Code for char num 56. */
+ 0x00,0x38,0x44,0x82,0x82,0x82,0xC4,0xB8,0x80,0x40,0x40,0x3C,0x00,0x00,0x00, /* Code for char num 57. */
+ 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00, /* Code for char num 58. */
+ 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x18,0x18,0x10,0x08,0x00, /* Code for char num 59. */
+ 0x00,0x00,0x00,0x00,0x80,0x60,0x10,0x0C,0x0C,0x10,0x60,0x80,0x00,0x00,0x00, /* Code for char num 60. */
+ 0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x00,0x00,0xFE,0x00,0x00,0x00,0x00,0x00, /* Code for char num 61. */
+ 0x00,0x00,0x00,0x00,0x02,0x0C,0x10,0x60,0x60,0x10,0x0C,0x02,0x00,0x00,0x00, /* Code for char num 62. */
+ 0x00,0x3E,0x42,0x42,0x40,0x20,0x10,0x08,0x08,0x00,0x08,0x08,0x00,0x00,0x00, /* Code for char num 63. */
+ 0x00,0x78,0x84,0xE2,0x92,0x8A,0x8A,0xCA,0xCA,0xB2,0xA6,0x3C,0x00,0x00,0x00, /* Code for char num 64. */
+ 0x00,0x00,0x10,0x38,0x28,0x28,0x44,0x44,0xFE,0x82,0x82,0x82,0x00,0x00,0x00, /* Code for char num 65. */
+ 0x00,0x00,0x3E,0x42,0x42,0x22,0x1E,0x22,0x42,0x42,0x42,0x3E,0x00,0x00,0x00, /* Code for char num 66. */
+ 0x00,0x00,0xF8,0x06,0x02,0x01,0x01,0x01,0x01,0x02,0x06,0xF8,0x00,0x00,0x00, /* Code for char num 67. */
+ 0x00,0x00,0x3E,0x42,0x82,0x82,0x82,0x82,0x82,0x82,0x42,0x3E,0x00,0x00,0x00, /* Code for char num 68. */
+ 0x00,0x00,0xFE,0x02,0x02,0x02,0x02,0x7E,0x02,0x02,0x02,0xFE,0x00,0x00,0x00, /* Code for char num 69. */
+ 0x00,0x00,0xFE,0x02,0x02,0x02,0x02,0x7E,0x02,0x02,0x02,0x02,0x00,0x00,0x00, /* Code for char num 70. */
+ 0x00,0x00,0xF8,0x06,0x02,0x01,0x01,0xE1,0x81,0x82,0x86,0xF8,0x00,0x00,0x00, /* Code for char num 71. */
+ 0x00,0x00,0x42,0x42,0x42,0x42,0x42,0x7E,0x42,0x42,0x42,0x42,0x00,0x00,0x00, /* Code for char num 72. */
+ 0x00,0x00,0xFE,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0xFE,0x00,0x00,0x00, /* Code for char num 73. */
+ 0x00,0x00,0x3C,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x1E,0x00,0x00,0x00, /* Code for char num 74. */
+ 0x00,0x00,0x42,0x22,0x12,0x0A,0x06,0x0A,0x12,0x22,0x42,0x82,0x00,0x00,0x00, /* Code for char num 75. */
+ 0x00,0x00,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0xFE,0x00,0x00,0x00, /* Code for char num 76. */
+ 0x00,0x00,0x63,0x63,0x63,0x55,0x55,0x55,0x4D,0x49,0x41,0x41,0x00,0x00,0x00, /* Code for char num 77. */
+ 0x00,0x00,0x82,0x86,0x8A,0x8A,0x92,0x92,0xA2,0xA2,0xC2,0x82,0x00,0x00,0x00, /* Code for char num 78. */
+ 0x00,0x00,0x3C,0x42,0x81,0x81,0x81,0x81,0x81,0x81,0x42,0x3C,0x00,0x00,0x00, /* Code for char num 79. */
+ 0x00,0x00,0x3E,0x42,0x42,0x42,0x62,0x1E,0x02,0x02,0x02,0x02,0x00,0x00,0x00, /* Code for char num 80. */
+ 0x00,0x00,0x3C,0x42,0x81,0x81,0x81,0x81,0x81,0x81,0x42,0x3C,0x60,0x80,0x00, /* Code for char num 81. */
+ 0x00,0x00,0x3E,0x42,0x42,0x42,0x22,0x1E,0x12,0x22,0x42,0x82,0x00,0x00,0x00, /* Code for char num 82. */
+ 0x00,0x00,0x7C,0x42,0x02,0x06,0x1C,0x20,0x40,0x40,0x42,0x3E,0x00,0x00,0x00, /* Code for char num 83. */
+ 0x00,0x00,0xFE,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,0x00, /* Code for char num 84. */
+ 0x00,0x00,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x44,0x3C,0x00,0x00,0x00, /* Code for char num 85. */
+ 0x00,0x00,0x82,0x82,0x82,0x82,0x44,0x44,0x28,0x28,0x38,0x10,0x00,0x00,0x00, /* Code for char num 86. */
+ 0x00,0x00,0x82,0x82,0x92,0x92,0xAA,0xAA,0xAA,0xAA,0x64,0x44,0x00,0x00,0x00, /* Code for char num 87. */
+ 0x00,0x00,0x82,0x82,0x44,0x28,0x10,0x10,0x28,0x44,0x82,0x82,0x00,0x00,0x00, /* Code for char num 88. */
+ 0x00,0x00,0x82,0x82,0x44,0x44,0x28,0x10,0x10,0x10,0x10,0x10,0x00,0x00,0x00, /* Code for char num 89. */
+ 0x00,0x00,0xFF,0x80,0x40,0x20,0x10,0x08,0x04,0x02,0x01,0xFF,0x00,0x00,0x00, /* Code for char num 90. */
+ 0xF8,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0xF8,0x00, /* Code for char num 91. */
+ 0x02,0x04,0x04,0x04,0x08,0x08,0x10,0x10,0x20,0x20,0x20,0x40,0x40,0x80,0x00, /* Code for char num 92. */
+ 0x3E,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x3E,0x00, /* Code for char num 93. */
+ 0x00,0x10,0x10,0x10,0x28,0x28,0x44,0x44,0x44,0x82,0x00,0x00,0x00,0x00,0x00, /* Code for char num 94. */
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x00,0x00, /* Code for char num 95. */
+ 0x10,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* Code for char num 96. */
+ 0x00,0x00,0x00,0x00,0x3C,0x40,0x40,0x78,0x44,0x42,0x62,0xDC,0x00,0x00,0x00, /* Code for char num 97. */
+ 0x02,0x02,0x02,0x02,0x7A,0x46,0x82,0x82,0x82,0x82,0x46,0x3A,0x00,0x00,0x00, /* Code for char num 98. */
+ 0x00,0x00,0x00,0x00,0xF8,0x04,0x02,0x02,0x02,0x02,0x04,0xF8,0x00,0x00,0x00, /* Code for char num 99. */
+ 0x80,0x80,0x80,0x80,0xB8,0xC4,0x82,0x82,0x82,0x82,0xC4,0xBC,0x00,0x00,0x00, /* Code for char num 100. */
+ 0x00,0x00,0x00,0x00,0x38,0x44,0x42,0x7E,0x02,0x02,0x04,0x78,0x00,0x00,0x00, /* Code for char num 101. */
+ 0xF0,0x08,0x08,0x08,0xFE,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x00,0x00,0x00, /* Code for char num 102. */
+ 0x00,0x00,0x00,0x00,0xB8,0xC4,0x82,0x82,0x82,0x82,0xC4,0xBC,0x80,0x40,0x3C, /* Code for char num 103. */
+ 0x02,0x02,0x02,0x02,0x3A,0x46,0x42,0x42,0x42,0x42,0x42,0x42,0x00,0x00,0x00, /* Code for char num 104. */
+ 0x18,0x18,0x00,0x00,0x1E,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,0x00, /* Code for char num 105. */
+ 0x30,0x30,0x00,0x00,0x3C,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x1E, /* Code for char num 106. */
+ 0x02,0x02,0x02,0x02,0x42,0x22,0x12,0x0E,0x0A,0x12,0x22,0x42,0x00,0x00,0x00, /* Code for char num 107. */
+ 0x1E,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,0x00, /* Code for char num 108. */
+ 0x00,0x00,0x00,0x00,0xDA,0xB6,0x92,0x92,0x92,0x92,0x92,0x92,0x00,0x00,0x00, /* Code for char num 109. */
+ 0x00,0x00,0x00,0x00,0x3A,0x46,0x42,0x42,0x42,0x42,0x42,0x42,0x00,0x00,0x00, /* Code for char num 110. */
+ 0x00,0x00,0x00,0x00,0x38,0x44,0x82,0x82,0x82,0x82,0x44,0x38,0x00,0x00,0x00, /* Code for char num 111. */
+ 0x00,0x00,0x00,0x00,0x7A,0x46,0x82,0x82,0x82,0x82,0x46,0x3A,0x02,0x02,0x02, /* Code for char num 112. */
+ 0x00,0x00,0x00,0x00,0xB8,0xC4,0x82,0x82,0x82,0x82,0xC4,0xBC,0x80,0x80,0x80, /* Code for char num 113. */
+ 0x00,0x00,0x00,0x00,0xF4,0x8C,0x04,0x04,0x04,0x04,0x04,0x04,0x00,0x00,0x00, /* Code for char num 114. */
+ 0x00,0x00,0x00,0x00,0x7C,0x02,0x02,0x0C,0x30,0x40,0x42,0x3E,0x00,0x00,0x00, /* Code for char num 115. */
+ 0x00,0x00,0x08,0x08,0xFE,0x08,0x08,0x08,0x08,0x08,0x08,0xF0,0x00,0x00,0x00, /* Code for char num 116. */
+ 0x00,0x00,0x00,0x00,0x42,0x42,0x42,0x42,0x42,0x42,0x62,0x5C,0x00,0x00,0x00, /* Code for char num 117. */
+ 0x00,0x00,0x00,0x00,0x82,0x82,0x82,0x44,0x44,0x28,0x28,0x10,0x00,0x00,0x00, /* Code for char num 118. */
+ 0x00,0x00,0x00,0x00,0x82,0x92,0xAA,0xAA,0xAA,0xAA,0x44,0x44,0x00,0x00,0x00, /* Code for char num 119. */
+ 0x00,0x00,0x00,0x00,0x82,0x44,0x28,0x10,0x10,0x28,0x44,0x82,0x00,0x00,0x00, /* Code for char num 120. */
+ 0x00,0x00,0x00,0x00,0x82,0x82,0x82,0x44,0x44,0x28,0x28,0x10,0x10,0x0C,0x00, /* Code for char num 121. */
+ 0x00,0x00,0x00,0x00,0xFE,0x80,0x40,0x20,0x10,0x08,0x04,0xFE,0x00,0x00,0x00, /* Code for char num 122. */
+ 0xE0,0x10,0x10,0x10,0x10,0x10,0x10,0x0C,0x10,0x10,0x10,0x10,0x10,0xE0,0x00, /* Code for char num 123. */
+ 0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00, /* Code for char num 124. */
+ 0x0E,0x10,0x10,0x10,0x10,0x10,0x10,0x60,0x10,0x10,0x10,0x10,0x10,0x0E,0x00, /* Code for char num 125. */
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x62,0x92,0x8C,0x00,0x00,0x00,0x00,0x00,0x00, /* Code for char num 126. */
+ 0x00,0x00,0x00,0x07,0x05,0x05,0x05,0x05,0x05,0x05,0x07,0x00,0x00,0x00,0x00 /* Code for char num 127. */
+};
+
+
+#endif /* FONT_9x15_H_H */
diff --git a/source/hal/source/components/lcd/source/glcd_mps3/glcd_mps3.c b/source/hal/source/components/lcd/source/glcd_mps3/glcd_mps3.c
new file mode 100644
index 0000000..c67483e
--- /dev/null
+++ b/source/hal/source/components/lcd/source/glcd_mps3/glcd_mps3.c
@@ -0,0 +1,474 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "glcd.h"
+
+#include "log_macros.h"
+#include "font_9x15_h.h"
+
+#define CLCD_CS_Pos 0
+#define CLCD_CS_Msk (1UL<<CLCD_CS_Pos)
+#define SHIELD_0_nCS_Pos 1
+#define SHIELD_0_nCS_Msk (1UL<<SHIELD_0_nCS_Pos)
+#define SHIELD_1_nCS_Pos 2
+#define SHIELD_1_nCS_Msk (1UL<<SHIELD_1_nCS_Pos)
+#define CLCD_RESET_Pos 3
+#define CLCD_RESET_Msk (1UL<<CLCD_RESET_Pos)
+#define CLCD_RS_Pos 4
+#define CLCD_RS_Msk (1UL<<CLCD_RS_Pos)
+#define CLCD_RD_Pos 5
+#define CLCD_RD_Msk (1UL<<CLCD_RD_Pos)
+#define CLCD_BL_Pos 6
+#define CLCD_BL_Msk (1UL<<CLCD_BL_Pos)
+
+/*-------------- CLCD Controller Internal Register addresses ----------------*/
+#define CHAR_COM ((volatile unsigned int *)(CLCD_CONFIG_BASE + 0x000))
+#define CHAR_DAT ((volatile unsigned int *)(CLCD_CONFIG_BASE + 0x004))
+#define CHAR_RD ((volatile unsigned int *)(CLCD_CONFIG_BASE + 0x008))
+#define CHAR_RAW ((volatile unsigned int *)(CLCD_CONFIG_BASE + 0x00C))
+#define CHAR_MASK ((volatile unsigned int *)(CLCD_CONFIG_BASE + 0x010))
+#define CHAR_STAT ((volatile unsigned int *)(CLCD_CONFIG_BASE + 0x014))
+#define CHAR_MISC ((volatile unsigned int *)(CLCD_CONFIG_BASE + 0x04C))
+
+/*--------------- Graphic LCD interface hardware definitions -----------------*/
+/* Pin CS setting to 0 or 1 */
+#define LCD_CS(x) ((x) ? (*CHAR_MISC |= CLCD_CS_Msk) : (*CHAR_MISC &= ~CLCD_CS_Msk))
+#define LCD_RST(x) ((x) ? (*CHAR_MISC |= CLCD_RESET_Msk) : (*CHAR_MISC &= ~CLCD_RESET_Msk))
+#define LCD_BL(x) ((x) ? (*CHAR_MISC |= CLCD_BL_Msk) : (*CHAR_MISC &= ~CLCD_BL_Msk))
+
+#define BG_COLOR 0 /* Background colour */
+#define TXT_COLOR 1 /* Text colour */
+
+/**
+* Text and background colour
+*/
+static volatile unsigned short Color[2] = {Black, White};
+
+/**
+ * @brief Delay in while loop cycles.
+ * @param[in] cnt Number of while cycles to delay.
+ **/
+static void delay (int cnt)
+{
+ cnt <<= DELAY_2N;
+ while (cnt != 0) {
+ --cnt;
+ }
+}
+
+/**
+ * @brief Write a command the LCD controller.
+ * @param[in] cmd Command to be written.
+ */
+static __inline void wr_cmd(unsigned char cmd)
+{
+ LCD_CS(0);
+ *CHAR_COM = cmd;
+ LCD_CS(1);
+}
+
+/**
+ * @brief Start of data writing to the LCD controller.
+ */
+static __inline void wr_dat_start (void)
+{
+ LCD_CS(0);
+}
+
+/**
+ * @brief Stop of data writing to the LCD controller.
+ */
+static __inline void wr_dat_stop (void)
+{
+ LCD_CS(1);
+}
+
+/**
+ * @brief Data writing to the LCD controller.
+ * @param[in] dat Data to be written.
+ */
+static __inline void wr_dat_only(unsigned short dat)
+{
+ *CHAR_DAT = (dat >> 8); /* Write D8..D15 */
+ *CHAR_DAT = (dat & 0xFF); /* Write D0..D7 */
+}
+
+/**
+ * @brief Write a value to the to LCD register.
+ * @param[in] reg Register to be written.
+ * @param[in] val Value to write to the register.
+ */
+static __inline void wr_reg(unsigned char reg, unsigned short val)
+{
+ LCD_CS(0);
+ *CHAR_COM = reg;
+ wr_dat_only(val);
+ LCD_CS(1);
+}
+
+/**
+ * @brief Converts a gray value to RGB565 representation.
+ * @param[in] src_uchar Pointer to the source pixel.
+ * @return 16 bit RGB565 value.
+ */
+static inline uint16_t _GLCD_Gray8_to_RGB565(uint8_t *src_uchar)
+{
+ uint16_t val_r = (*src_uchar >> 3);
+ uint16_t val_g = (*src_uchar >> 2);
+ return ((val_r << 11) | (val_g << 5) | val_r);
+}
+
+/**
+ * @brief Converts an RGB888 value to RGB565 representation.
+ * @param[in] src_uchar Pointer to the source pixel for R (assumed to
+ * be RGB format).
+ * @return 16 bit RGB565 value.
+ */
+static inline uint16_t _GLCD_RGB888_to_RGB565(uint8_t *src_uchar)
+{
+ uint16_t val_r = (*src_uchar >> 3) & 0x1F;
+ uint16_t val_g = (*(src_uchar+1) >> 2) & 0x3F;
+ uint16_t val_b = (*(src_uchar+2) >> 3) & 0x1F;
+ return ((val_r << 11) | (val_g << 5) | val_b);
+}
+
+/* Helper typedef to encapsulate the colour conversion function
+ * signatures */
+typedef uint16_t (* std_clr_2_lcd_clr_fn)(uint8_t *src_uchar);
+
+void GLCD_SetWindow(unsigned int x, unsigned int y, unsigned int w, unsigned int h) {
+ unsigned int xe, ye;
+
+ xe = x+w-1;
+ ye = y+h-1;
+
+ wr_reg(0x02, x >> 8); /* Column address start MSB */
+ wr_reg(0x03, x & 0xFF); /* Column address start LSB */
+ wr_reg(0x04, xe >> 8); /* Column address end MSB */
+ wr_reg(0x05, xe & 0xFF); /* Column address end LSB */
+
+ wr_reg(0x06, y >> 8); /* Row address start MSB */
+ wr_reg(0x07, y & 0xFF); /* Row address start LSB */
+ wr_reg(0x08, ye >> 8); /* Row address end MSB */
+ wr_reg(0x09, ye & 0xFF); /* Row address end LSB */
+}
+
+void GLCD_WindowMax(void)
+{
+ GLCD_SetWindow (0, 0, GLCD_WIDTH, GLCD_HEIGHT);
+}
+
+void GLCD_SetTextColor(unsigned short color)
+{
+ Color[TXT_COLOR] = color;
+}
+
+void GLCD_SetBackColor(unsigned short color)
+{
+ Color[BG_COLOR] = color;
+}
+
+void GLCD_Clear(unsigned short color)
+{
+ unsigned int i;
+
+ GLCD_WindowMax();
+ wr_cmd(0x22);
+ wr_dat_start();
+
+ for(i = 0; i < (GLCD_WIDTH*GLCD_HEIGHT); ++i) {
+ wr_dat_only(color);
+ }
+ wr_dat_stop();
+}
+
+
+void GLCD_DrawChar(
+ unsigned int x, unsigned int y,
+ unsigned int cw, unsigned int ch,
+ unsigned char *c)
+{
+ unsigned int i, j, k, pixs;
+
+ /* Sanity check: out of bounds? */
+ if ((x + cw) > GLCD_WIDTH || (y + ch) > GLCD_HEIGHT) {
+ return;
+ }
+
+ GLCD_SetWindow(x, y, cw, ch);
+
+ wr_cmd(0x22);
+ wr_dat_start();
+
+ k = (cw + 7)/8;
+
+ if (k == 1) {
+ for (j = 0; j < ch; ++j) {
+ pixs = *(unsigned char *)c;
+ c += 1;
+
+ for (i = 0; i < cw; ++i) {
+ wr_dat_only (Color[(pixs >> i) & 1]);
+ }
+ }
+ }
+ else if (k == 2) {
+ for (j = 0; j < ch; ++j) {
+ pixs = *(unsigned short *)c;
+ c += 2;
+
+ for (i = 0; i < cw; ++i) {
+ wr_dat_only (Color[(pixs >> i) & 1]);
+ }
+ }
+ }
+ wr_dat_stop();
+}
+
+void GLCD_DisplayChar(
+ unsigned int ln, unsigned int col,
+ unsigned char fi, unsigned char c)
+{
+ c -= 32;
+ switch (fi) {
+ case 0: /* Font 9 x 15. */
+ GLCD_DrawChar(col * 9, ln * 15, 9, 15,
+ (unsigned char *)&Font_9x15_h[c * 15]);
+ break;
+ }
+}
+
+void GLCD_DisplayString(
+ unsigned int ln, unsigned int col,
+ unsigned char fi, char *s)
+{
+ while (*s) {
+ GLCD_DisplayChar(ln, col++, fi, *s++);
+ }
+}
+
+
+
+void GLCD_ClearLn(unsigned int ln, unsigned char fi)
+{
+ unsigned char i;
+ char buf[60];
+
+ GLCD_WindowMax();
+ switch (fi) {
+ case 0: /* Font 9x15*/
+ for (i = 0; i < (GLCD_WIDTH+8)/9; ++i) {
+ buf[i] = ' ';
+ }
+ buf[i+1] = 0;
+ break;
+ }
+ GLCD_DisplayString (ln, 0, fi, buf);
+}
+
+void GLCD_Bitmap(unsigned int x, unsigned int y,
+ unsigned int w, unsigned int h,
+ unsigned short *bitmap)
+{
+ unsigned int i;
+ unsigned short *bitmap_ptr = bitmap;
+
+ GLCD_SetWindow (x, y, w, h);
+
+ wr_cmd(0x22);
+ wr_dat_start();
+
+ for (i = 0; i < (w*h); ++i) {
+ wr_dat_only (bitmap_ptr[i]);
+ }
+ wr_dat_stop();
+}
+
+void GLCD_Image(const void *data, const uint32_t width,
+ const uint32_t height, const uint32_t channels,
+ const uint32_t pos_x, const uint32_t pos_y,
+ const uint32_t downsample_factor)
+{
+ uint32_t i, j = 0; /* for loops */
+ const uint32_t x_incr = channels * downsample_factor; /* stride. */
+ const uint32_t y_incr = channels * width * (downsample_factor - 1); /* skip rows. */
+ uint8_t* src_unsigned = (uint8_t *)data; /* temporary pointer. */
+ std_clr_2_lcd_clr_fn cvt_clr_fn = 0; /* colour conversion function. */
+
+ /* Based on number of channels, we decide which of the above functions to use. */
+ switch (channels) {
+ case 1:
+ cvt_clr_fn = _GLCD_Gray8_to_RGB565;
+ break;
+
+ case 3:
+ cvt_clr_fn = _GLCD_RGB888_to_RGB565;
+ break;
+
+ default:
+ printf_err("number of channels not supported by display\n");
+ return;
+ }
+
+ /* Set the window position expected. Note: this is integer div. */
+ GLCD_SetWindow(pos_x, pos_y,
+ width/downsample_factor, height/downsample_factor);
+ wr_cmd(0x22);
+ wr_dat_start();
+
+ /* Loop over the image. */
+ for (j = height; j != 0; j -= downsample_factor) {
+ for (i = width; i != 0; i -= downsample_factor) {
+ wr_dat_only(cvt_clr_fn(src_unsigned));
+ src_unsigned += x_incr;
+ }
+
+ /* Skip rows if needed. */
+ src_unsigned += y_incr;
+ }
+
+ wr_dat_stop();
+}
+
+void GLCD_Box(
+ unsigned int x, unsigned int y,
+ unsigned int w, unsigned int h,
+ unsigned short color)
+{
+ unsigned int i;
+
+ GLCD_SetWindow (x, y, w, h);
+
+ wr_cmd(0x22);
+ wr_dat_start();
+ for(i = 0; i < (w*h); ++i){
+ wr_dat_only (color);
+ }
+ wr_dat_stop();
+}
+
+
+void GLCD_Initialize (void)
+{
+ /* CLCD screen setup (Default CLCD screen interface state) ------------- */
+ LCD_CS(1); /* deassert nCS0. */
+ LCD_RST(1); /* deassert Reset. */
+ LCD_BL(0); /* switch off backlight. */
+
+ /* Reset CLCD screen --------------------------------------------------- */
+ LCD_RST(0); /* assert Reset. */
+ delay(1);
+ LCD_RST(1); /* deassert Reset. */
+ delay(10);
+
+ /* Driving ability settings ----------------------------------------------*/
+ wr_reg(0xEA, 0x00); /* Power control internal used (1). */
+ wr_reg(0xEB, 0x20); /* Power control internal used (2). */
+ wr_reg(0xEC, 0x0C); /* Source control internal used (1). */
+ wr_reg(0xED, 0xC7); /* Source control internal used (2). */
+ wr_reg(0xE8, 0x38); /* Source output period Normal mode. */
+ wr_reg(0xE9, 0x10); /* Source output period Idle mode. */
+ wr_reg(0xF1, 0x01); /* RGB 18-bit interface ;0x0110. */
+ wr_reg(0xF2, 0x10);
+
+ /* Adjust the Gamma Curve ------------------------------------------------*/
+ wr_reg(0x40, 0x01);
+ wr_reg(0x41, 0x00);
+ wr_reg(0x42, 0x00);
+ wr_reg(0x43, 0x10);
+ wr_reg(0x44, 0x0E);
+ wr_reg(0x45, 0x24);
+ wr_reg(0x46, 0x04);
+ wr_reg(0x47, 0x50);
+ wr_reg(0x48, 0x02);
+ wr_reg(0x49, 0x13);
+ wr_reg(0x4A, 0x19);
+ wr_reg(0x4B, 0x19);
+ wr_reg(0x4C, 0x16);
+
+ wr_reg(0x50, 0x1B);
+ wr_reg(0x51, 0x31);
+ wr_reg(0x52, 0x2F);
+ wr_reg(0x53, 0x3F);
+ wr_reg(0x54, 0x3F);
+ wr_reg(0x55, 0x3E);
+ wr_reg(0x56, 0x2F);
+ wr_reg(0x57, 0x7B);
+ wr_reg(0x58, 0x09);
+ wr_reg(0x59, 0x06);
+ wr_reg(0x5A, 0x06);
+ wr_reg(0x5B, 0x0C);
+ wr_reg(0x5C, 0x1D);
+ wr_reg(0x5D, 0xCC);
+
+ /* Power voltage setting -------------------------------------------------*/
+ wr_reg(0x1B, 0x1B);
+ wr_reg(0x1A, 0x01);
+ wr_reg(0x24, 0x2F);
+ wr_reg(0x25, 0x57);
+ wr_reg(0x23, 0x88);
+
+ /* Power on setting ------------------------------------------------------*/
+ wr_reg(0x18, 0x36); /* Internal oscillator frequency adj. */
+ wr_reg(0x19, 0x01); /* Enable internal oscillator. */
+ wr_reg(0x01, 0x00); /* Normal mode, no scroll. */
+ wr_reg(0x1F, 0x88); /* Power control 6 - DDVDH Off. */
+ delay(20);
+ wr_reg(0x1F, 0x82); /* Power control 6 - Step-up: 3 x VCI. */
+ delay(5);
+ wr_reg(0x1F, 0x92); /* Power control 6 - Step-up: On. */
+ delay(5);
+ wr_reg(0x1F, 0xD2); /* Power control 6 - VCOML active. */
+ delay(5);
+
+ /* Color selection -------------------------------------------------------*/
+ wr_reg(0x17, 0x55); /* RGB, System interface: 16 Bit/Pixel. */
+ wr_reg(0x00, 0x00); /* Scrolling off, no standby. */
+
+ /* Interface config ------------------------------------------------------*/
+ wr_reg(0x2F, 0x11); /* LCD Drive: 1-line inversion. */
+ wr_reg(0x31, 0x00);
+ wr_reg(0x32, 0x00); /* DPL=0, HSPL=0, VSPL=0, EPL=0. */
+
+ /* Display on setting ----------------------------------------------------*/
+ wr_reg(0x28, 0x38); /* PT(0,0) active, VGL/VGL. */
+ delay(20);
+ wr_reg(0x28, 0x3C); /* Display active, VGL/VGL. */
+
+#if (LANDSCAPE == 1)
+#if (ROTATE180 == 0)
+ wr_reg (0x16, 0xA8);
+#else /* (ROTATE180 == 0) */
+ wr_reg (0x16, 0x68);
+#endif /* (ROTATE180 == 0) */
+#else /* (LANDSCAPE == 1) */
+#if (ROTATE180 == 0)
+ wr_reg (0x16, 0x08);
+#else /* (ROTATE180 == 0) */
+ wr_reg (0x16, 0xC8);
+#endif /* (ROTATE180 == 0) */
+#endif /* (LANDSCAPE == 1) */
+
+ /* Display scrolling settings --------------------------------------------*/
+ wr_reg(0x0E, 0x00); /* TFA MSB */
+ wr_reg(0x0F, 0x00); /* TFA LSB */
+ wr_reg(0x10, 320 >> 8); /* VSA MSB */
+ wr_reg(0x11, 320 & 0xFF); /* VSA LSB */
+ wr_reg(0x12, 0x00); /* BFA MSB */
+ wr_reg(0x13, 0x00); /* BFA LSB */
+
+ LCD_BL(1); /* turn on backlight */
+}
diff --git a/source/hal/source/components/lcd/source/glcd_stubs/glcd_stubs.c b/source/hal/source/components/lcd/source/glcd_stubs/glcd_stubs.c
new file mode 100644
index 0000000..5df1522
--- /dev/null
+++ b/source/hal/source/components/lcd/source/glcd_stubs/glcd_stubs.c
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2021-2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "glcd.h"
+#include "log_macros.h"
+
+#include <inttypes.h>
+
+void GLCD_Initialize(void) {}
+
+void GLCD_Bitmap(unsigned int x, unsigned int y,
+ unsigned int w, unsigned int h, unsigned short *bitmap)
+{
+ UNUSED(x);
+ UNUSED(y);
+ UNUSED(w);
+ UNUSED(h);
+ UNUSED(bitmap);
+}
+
+void GLCD_Image(const void *data, const uint32_t width,
+ const uint32_t height, const uint32_t channels,
+ const uint32_t pos_x, const uint32_t pos_y,
+ const uint32_t downsample_factor)
+{
+ UNUSED(data);
+ UNUSED(pos_x);
+ UNUSED(pos_y);
+ UNUSED(width);
+ UNUSED(height);
+ UNUSED(channels);
+ UNUSED(downsample_factor);
+ debug("image display: (x, y, w, h) = "
+ "(%" PRIu32 ", %" PRIu32 ", %" PRIu32 ", %" PRIu32 ")\n",
+ pos_x, pos_y, width, height);
+ debug("image display: channels = %" PRIu32 ", downsample factor = %" PRIu32 "\n",
+ channels, downsample_factor);
+}
+
+void GLCD_Clear(unsigned short color)
+{
+ UNUSED(color);
+}
+
+void GLCD_SetTextColor(unsigned short color)
+{
+ UNUSED(color);
+}
+
+void GLCD_DisplayChar (unsigned int ln, unsigned int col, unsigned char fi,
+ unsigned char c)
+{
+ UNUSED(ln);
+ UNUSED(col);
+ UNUSED(fi);
+ UNUSED(c);
+}
+
+void GLCD_DisplayString(unsigned int ln, unsigned int col, unsigned char fi,
+ char *s)
+{
+ UNUSED(ln);
+ UNUSED(col);
+ UNUSED(fi);
+ UNUSED(s);
+ debug("text display: %s\n", s);
+}
+
+void GLCD_Box(unsigned int x, unsigned int y, unsigned int w, unsigned int h,
+ unsigned short color)
+{
+ UNUSED(x);
+ UNUSED(y);
+ UNUSED(w);
+ UNUSED(h);
+ UNUSED(color);
+}
diff --git a/source/hal/source/components/lcd/source/lcd_img.c b/source/hal/source/components/lcd/source/lcd_img.c
new file mode 100644
index 0000000..e3921a9
--- /dev/null
+++ b/source/hal/source/components/lcd/source/lcd_img.c
@@ -0,0 +1,160 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "lcd_img.h"
+
+#include "log_macros.h"
+#include "glcd.h"
+
+#include <string.h>
+#include <assert.h>
+
+static int show_title(void)
+{
+ char title[128];
+ int status = 0;
+
+ /* LCD title string */
+#if defined(CPU_CORTEX_M55)
+ const char* cpu_name = "Arm Cortex-M55";
+#else /* defined(CPU_CORTEX_M55) */
+ const char* cpu_name = "Arm CPU";
+#endif /* defined(CPU_CORTEX_M55) */
+
+ lcd_set_text_color(White);
+
+ /* First line */
+ snprintf(title, sizeof(title), "Arm ML embedded code samples");
+
+ if (0 != (status = lcd_display_text(
+ title, strlen(title), 10, 0, false))) {
+ return status;
+ }
+
+ /* Second line */
+#if defined (ARM_NPU)
+ snprintf(title, sizeof(title), "%s + Arm Ethos-U NPU", cpu_name);
+#else /* defined (ARM_NPU) */
+ snprintf(title, sizeof(title), "%s", cpu_name);
+#endif /* defined (ARM_NPU) */
+
+ return lcd_display_text(title, strlen(title), 10, 20, false);
+}
+
+int lcd_init(void)
+{
+ GLCD_Initialize();
+ GLCD_Clear(Black);
+ return show_title();
+}
+
+int lcd_display_image(const uint8_t* data, const uint32_t width,
+ const uint32_t height, const uint32_t channels,
+ const uint32_t pos_x, const uint32_t pos_y,
+ const uint32_t downsample_factor)
+{
+ /* Sanity checks */
+ assert(data);
+ if ((pos_x + width/downsample_factor > GLCD_WIDTH) ||
+ (pos_y + height/downsample_factor > GLCD_HEIGHT)) {
+ printf_err("Invalid image size for given location!\n");
+ return 1;
+ }
+
+ if (1 == channels || 3 == channels) {
+ GLCD_Image(data, width, height, channels, pos_x, pos_y,
+ downsample_factor);
+ } else {
+ printf_err("Only single and three channel images are supported!\n");
+ return 1;
+ }
+
+ return 0;
+}
+
+int lcd_display_text(const char* str, const size_t str_sz,
+ const uint32_t pos_x, const uint32_t pos_y,
+ const bool allow_multiple_lines)
+{
+ /* We use a font 0 which is 9x15. */
+ const uint32_t x_span = 9; /* Each character is this 9 pixels "wide". */
+ const uint32_t y_span = 15; /* Each character is this 15 pixels "high". */
+
+ if (str_sz == 0) {
+ return 1;
+ }
+
+ /* If not within the LCD bounds, return error. */
+ if (pos_x + x_span > GLCD_WIDTH || pos_y + y_span > GLCD_HEIGHT) {
+ return 1;
+ } else {
+ const unsigned char font_idx = 0; /* We are using the custom font = 0 */
+
+ const uint32_t col = pos_x/x_span;
+ const uint32_t max_cols = GLCD_WIDTH/x_span - 1;
+ const uint32_t max_lines = GLCD_HEIGHT/y_span - 1;
+
+ uint32_t i = 0;
+ uint32_t current_line = pos_y/y_span;
+ uint32_t current_col = col;
+
+ /* Display the string on the LCD. */
+ for (i = 0; i < str_sz; ++i) {
+
+ if (allow_multiple_lines) {
+
+ /* If the next character won't fit. */
+ if (current_col > max_cols) {
+ current_col = col;
+
+ /* If the next line won't fit. */
+ if (++current_line > max_lines) {
+ return 1;
+ }
+ }
+ }
+
+ GLCD_DisplayChar(current_line, current_col++, font_idx, str[i]);
+ }
+ }
+ return 0;
+}
+
+int lcd_display_box(const uint32_t pos_x, const uint32_t pos_y,
+ const uint32_t width, const uint32_t height, const uint16_t color)
+{
+ /* If not within the LCD bounds, return error. */
+ if (pos_x > GLCD_WIDTH || pos_y > GLCD_HEIGHT) {
+ return 1;
+ }
+ else {
+ GLCD_Box(pos_x, pos_y, width, height, color);
+ }
+ return 0;
+}
+
+int lcd_clear(const uint16_t color)
+{
+ GLCD_Clear(color);
+ GLCD_SetTextColor(White);
+ return show_title();
+}
+
+int lcd_set_text_color(const uint16_t color)
+{
+ GLCD_SetTextColor(color);
+ return 0;
+}
diff --git a/source/hal/source/components/npu/CMakeLists.txt b/source/hal/source/components/npu/CMakeLists.txt
new file mode 100644
index 0000000..804fb45
--- /dev/null
+++ b/source/hal/source/components/npu/CMakeLists.txt
@@ -0,0 +1,106 @@
+#----------------------------------------------------------------------------
+# Copyright (c) 2022 Arm Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#----------------------------------------------------------------------------
+
+#########################################################
+# Ethos-U NPU initialization library #
+#########################################################
+
+cmake_minimum_required(VERSION 3.15.6)
+set(ETHOS_U_NPU_INIT_COMPONENT ethos_u_npu)
+project(${ETHOS_U_NPU_INIT_COMPONENT}
+ DESCRIPTION "Ethos-U NPU initialization library"
+ LANGUAGES C CXX ASM)
+
+if (NOT DEFINED ETHOS_U_NPU_DRIVER_SRC_PATH)
+ message(FATAL_ERROR "ETHOS_U_NPU_DRIVER_SRC_PATH should"
+ " be defined when ETHOS_U_NPU_ENABLED=${ETHOS_U_NPU_ENABLED}")
+endif()
+
+# For the driver, we need to provide the CMSIS_PATH variable
+set(CMSIS_PATH ${CMSIS_SRC_PATH} CACHE PATH "Path to CMSIS directory")
+
+# Driver needs to know what MAC configuration to build for.
+if(ETHOS_U_NPU_CONFIG_ID MATCHES "^[A-Z]([0-9]+$)")
+ set(ETHOSU_MACS ${CMAKE_MATCH_1})
+else()
+ message(FATAL_ERROR "Couldn't work out Ethos-U number of MACS from ${ETHOS_U_NPU_CONFIG_ID}")
+endif()
+set(ETHOSU_TARGET_NPU_CONFIG
+ "ethos-${ETHOS_U_NPU_ID}-${ETHOSU_MACS}" CACHE STRING "Target Ethos-U configuration for driver.")
+
+## Memory mode target definition
+if (NOT DEFINED ETHOS_U_NPU_ID)
+ set(ETHOS_U_NPU_ID U55)
+endif()
+
+if (NOT DEFINED ETHOS_U_NPU_MEMORY_MODE)
+ set(ETHOS_U_NPU_MEMORY_MODE Shared_Sram)
+endif()
+
+if (ETHOS_U_NPU_MEMORY_MODE STREQUAL Sram_Only)
+ if (ETHOS_U_NPU_ID STREQUAL U55)
+ set(ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEM_MODE_SRAM_ONLY")
+ else ()
+ message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode and processor ${ETHOS_U_NPU_MEMORY_MODE} - ${ETHOS_U_NPU_ID}. `sram_only` can be used only for Ethos-U55.")
+ endif ()
+elseif (ETHOS_U_NPU_MEMORY_MODE STREQUAL Shared_Sram)
+ # Shared Sram can be used for Ethos-U55 and Ethos-U65
+ set(ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM")
+elseif (ETHOS_U_NPU_MEMORY_MODE STREQUAL Dedicated_Sram)
+ # Dedicated Sram is used only for Ethos-U65
+ if (ETHOS_U_NPU_ID STREQUAL U65)
+ list(APPEND ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM" "-DETHOS_U_NPU_CACHE_SIZE=${ETHOS_U_NPU_CACHE_SIZE}")
+ else ()
+ message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode and processor ${ETHOS_U_NPU_MEMORY_MODE} - ${ETHOS_U_NPU_ID}. `dedicated_sram` can be used only for Ethos-U65.")
+ endif ()
+else ()
+ message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode ${ETHOS_U_NPU_MEMORY_MODE}")
+endif ()
+
+add_subdirectory(${ETHOS_U_NPU_DRIVER_SRC_PATH} ${CMAKE_BINARY_DIR}/ethos-u-driver)
+
+# Create static library
+add_library(${ETHOS_U_NPU_INIT_COMPONENT} STATIC)
+
+## Include directories - public
+target_include_directories(${ETHOS_U_NPU_INIT_COMPONENT}
+ PUBLIC
+ include
+ ${SOURCE_GEN_DIR})
+
+## Component sources
+target_sources(${ETHOS_U_NPU_INIT_COMPONENT}
+ PRIVATE
+ ethosu_npu_init.c
+ ethosu_cpu_cache.c)
+
+## Add dependencies:
+target_link_libraries(${ETHOS_U_NPU_INIT_COMPONENT} PUBLIC
+ cmsis_device_cpu_header
+ ethosu_core_driver
+ log)
+
+target_compile_definitions(${ETHOS_U_NPU_INIT_COMPONENT}
+ PUBLIC
+ ARM_NPU
+ ${ETHOS_U_NPU_MEMORY_MODE_FLAG})
+
+# Display status
+message(STATUS "CMAKE_CURRENT_SOURCE_DIR: " ${CMAKE_CURRENT_SOURCE_DIR})
+message(STATUS "*******************************************************")
+message(STATUS "Library : " ${ETHOS_U_NPU_INIT_COMPONENT})
+message(STATUS "*******************************************************")
diff --git a/source/hal/source/components/npu/ethosu_cpu_cache.c b/source/hal/source/components/npu/ethosu_cpu_cache.c
new file mode 100644
index 0000000..13f6f0a
--- /dev/null
+++ b/source/hal/source/components/npu/ethosu_cpu_cache.c
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ethosu_cpu_cache.h"
+
+#include "RTE_Components.h" /* For CPU related defintiions */
+#include "ethosu_driver.h" /* Arm Ethos-U driver header */
+#include "log_macros.h" /* Logging macros */
+
+void ethosu_flush_dcache(uint32_t *p, size_t bytes)
+{
+#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+ if (SCB->CCR & SCB_CCR_DC_Msk) {
+ if (p) {
+ SCB_CleanDCache_by_Addr((void *) p, (int32_t) bytes);
+ } else {
+ SCB_CleanDCache();
+ }
+ }
+#else
+ UNUSED(p);
+ UNUSED(bytes);
+#endif /* defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) */
+}
+
+void ethosu_invalidate_dcache(uint32_t *p, size_t bytes)
+{
+#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+ if (SCB->CCR & SCB_CCR_DC_Msk) {
+ if (p) {
+ SCB_InvalidateDCache_by_Addr((void *) p, (int32_t) bytes);
+ } else {
+ SCB_InvalidateDCache();
+ }
+ }
+#else
+ UNUSED(p);
+ UNUSED(bytes);
+#endif /* defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) */
+}
diff --git a/source/hal/source/components/npu/ethosu_npu_init.c b/source/hal/source/components/npu/ethosu_npu_init.c
new file mode 100644
index 0000000..9ccd887
--- /dev/null
+++ b/source/hal/source/components/npu/ethosu_npu_init.c
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ethosu_npu_init.h"
+
+#include "RTE_Components.h" /* For CPU related defintiions */
+#include "peripheral_memmap.h" /* Peripheral memory map definitions. */
+#include "peripheral_irqs.h" /* IRQ numbers for this platform. */
+#include "log_macros.h" /* Logging functions */
+
+#include "ethosu_mem_config.h" /* Arm Ethos-U memory config */
+#include "ethosu_driver.h" /* Arm Ethos-U driver header */
+
+struct ethosu_driver ethosu_drv; /* Default Ethos-U device driver */
+
+#if defined(ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0)
+static uint8_t cache_arena[ETHOS_U_CACHE_BUF_SZ] CACHE_BUF_ATTRIBUTE;
+#else /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */
+static uint8_t *cache_arena = NULL;
+#endif /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */
+
+static uint8_t *get_cache_arena()
+{
+ return cache_arena;
+}
+
+static size_t get_cache_arena_size()
+{
+#if defined(ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0)
+ return sizeof(cache_arena);
+#else /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */
+ return 0;
+#endif /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */
+}
+
+/**
+ * @brief Defines the Ethos-U interrupt handler: just a wrapper around the default
+ * implementation.
+ **/
+static void arm_ethosu_npu_irq_handler(void)
+{
+ /* Call the default interrupt handler from the NPU driver */
+ ethosu_irq_handler(ðosu_drv);
+}
+
+/**
+ * @brief Initialises the NPU IRQ
+ **/
+static void arm_ethosu_npu_irq_init(void)
+{
+ const IRQn_Type ethosu_irqnum = (IRQn_Type)EthosU_IRQn;
+
+ /* Register the EthosU IRQ handler in our vector table.
+ * Note, this handler comes from the EthosU driver */
+ NVIC_SetVector(ethosu_irqnum, (uint32_t)arm_ethosu_npu_irq_handler);
+
+ /* Enable the IRQ */
+ NVIC_EnableIRQ(ethosu_irqnum);
+
+ debug("EthosU IRQ#: %u, Handler: 0x%p\n",
+ ethosu_irqnum, arm_ethosu_npu_irq_handler);
+}
+
+int arm_ethosu_npu_init(void)
+{
+ int err = 0;
+
+ /* Initialise the IRQ */
+ arm_ethosu_npu_irq_init();
+
+ /* Initialise Ethos-U device */
+ const void *ethosu_base_address = (void *)(SEC_ETHOS_U_NPU_BASE);
+
+ if (0 != (err = ethosu_init(
+ ðosu_drv, /* Ethos-U driver device pointer */
+ ethosu_base_address, /* Ethos-U NPU's base address. */
+ get_cache_arena(), /* Pointer to fast mem area - NULL for U55. */
+ get_cache_arena_size(), /* Fast mem region size. */
+ 1, /* Security enable. */
+ 1))) /* Privilege enable. */
+ {
+ printf_err("failed to initialise Ethos-U device\n");
+ return err;
+ }
+
+ info("Ethos-U device initialised\n");
+
+ /* Get Ethos-U version */
+ struct ethosu_driver_version driver_version;
+ struct ethosu_hw_info hw_info;
+
+ ethosu_get_driver_version(&driver_version);
+ ethosu_get_hw_info(ðosu_drv, &hw_info);
+
+ info("Ethos-U version info:\n");
+ info("\tArch: v%" PRIu32 ".%" PRIu32 ".%" PRIu32 "\n",
+ hw_info.version.arch_major_rev,
+ hw_info.version.arch_minor_rev,
+ hw_info.version.arch_patch_rev);
+ info("\tDriver: v%" PRIu8 ".%" PRIu8 ".%" PRIu8 "\n",
+ driver_version.major,
+ driver_version.minor,
+ driver_version.patch);
+ info("\tMACs/cc: %" PRIu32 "\n", (uint32_t)(1 << hw_info.cfg.macs_per_cc));
+ info("\tCmd stream: v%" PRIu32 "\n", hw_info.cfg.cmd_stream_version);
+
+ return 0;
+}
diff --git a/source/hal/source/components/npu/include/ethosu_cpu_cache.h b/source/hal/source/components/npu/include/ethosu_cpu_cache.h
new file mode 100644
index 0000000..9f21acf
--- /dev/null
+++ b/source/hal/source/components/npu/include/ethosu_cpu_cache.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef ETHOSU_CPU_CACHE
+#define ETHOSU_CPU_CACHE
+
+#include <stdint.h>
+#include <stddef.h>
+
+/**
+ * @brief Flush/clean the data cache by address and size. Passing NULL as p argument
+ * expects the whole cache to be flushed.
+ * @param[in] p Pointer to the start address.
+ * @param[in] bytes Number of bytes to flush beginning at start address.
+ */
+void ethosu_flush_dcache(uint32_t *p, size_t bytes);
+
+/**
+ * @brief Invalidate the data cache by address and size. Passing NULL as p argument
+ * expects the whole cache to be invalidated.
+ * @param[in] p Pointer to the start address.
+ * @param[in] bytes Number of bytes to flush beginning at start address.
+ */
+void ethosu_invalidate_dcache(uint32_t *p, size_t bytes);
+
+#endif /* ETHOSU_CPU_CACHE */
diff --git a/source/hal/source/components/npu/include/ethosu_mem_config.h b/source/hal/source/components/npu/include/ethosu_mem_config.h
new file mode 100644
index 0000000..aa0cfda
--- /dev/null
+++ b/source/hal/source/components/npu/include/ethosu_mem_config.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef ETHOS_U_NPU_MEM_CONFIG_H
+#define ETHOS_U_NPU_MEM_CONFIG_H
+
+#define ETHOS_U_NPU_MEMORY_MODE_SRAM_ONLY 0
+#define ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM 1
+#define ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM 2
+
+#define ETHOS_U_MEM_BYTE_ALIGNMENT 16
+
+#ifndef ETHOS_U_NPU_MEMORY_MODE
+ #define ETHOS_U_NPU_MEMORY_MODE ETHOS_U_MEMORY_MODE_SHARED_SRAM
+#endif /* ETHOS_U_NPU_MEMORY_MODE */
+
+#if (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM)
+ #ifndef ETHOS_U_NPU_CACHE_SIZE
+ #define ETHOS_U_CACHE_BUF_SZ (393216U) /* See vela doc for reference */
+ #else
+ #define ETHOS_U_CACHE_BUF_SZ ETHOS_U_NPU_CACHE_SIZE
+ #endif /* ETHOS_U_NPU_CACHE_SIZE */
+#else
+ #define ETHOS_U_CACHE_BUF_SZ (0U)
+#endif /* CACHE_BUF_SZ */
+
+/**
+ * Activation buffer aka tensor arena section name
+ * We have to place the tensor arena in different region based on the memory config.
+ **/
+#if (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM)
+ #define ACTIVATION_BUF_SECTION section(".bss.NoInit.activation_buf_sram")
+ #define ACTIVATION_BUF_SECTION_NAME ("SRAM")
+#elif (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_SRAM_ONLY)
+ #define ACTIVATION_BUF_SECTION section(".bss.NoInit.activation_buf_sram")
+ #define ACTIVATION_BUF_SECTION_NAME ("SRAM")
+#elif (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM)
+ #define ACTIVATION_BUF_SECTION section("activation_buf_dram")
+ #define CACHE_BUF_SECTION section(".bss.NoInit.ethos_u_cache")
+ #define ACTIVATION_BUF_SECTION_NAME ("DDR/DRAM")
+ #define CACHE_BUF_ATTRIBUTE __attribute__((aligned(ETHOS_U_MEM_BYTE_ALIGNMENT), CACHE_BUF_SECTION))
+#endif
+
+#endif /* ETHOS_U_NPU_MEM_CONFIG_H */
diff --git a/source/hal/source/components/npu/include/ethosu_npu_init.h b/source/hal/source/components/npu/include/ethosu_npu_init.h
new file mode 100644
index 0000000..c562f6c
--- /dev/null
+++ b/source/hal/source/components/npu/include/ethosu_npu_init.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef ETHOS_U_NPU_INIT_H
+#define ETHOS_U_NPU_INIT_H
+
+#if defined(ARM_NPU)
+
+/**
+ * @brief Initialises the Arm Ethos-U NPU
+ * @return 0 if successful, error code otherwise
+ **/
+int arm_ethosu_npu_init(void);
+
+#endif /* ARM_NPU */
+
+#endif /* ETHOS_U_NPU_INIT_H */
diff --git a/source/hal/source/components/npu_ta/CMakeLists.txt b/source/hal/source/components/npu_ta/CMakeLists.txt
new file mode 100644
index 0000000..fdda723
--- /dev/null
+++ b/source/hal/source/components/npu_ta/CMakeLists.txt
@@ -0,0 +1,77 @@
+#----------------------------------------------------------------------------
+# Copyright (c) 2022 Arm Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#----------------------------------------------------------------------------
+
+#########################################################
+# Ethos-U NPU timing adapter initialization library #
+#########################################################
+
+# Timing adapter component is only available on certain implementations
+# on FPGA and FVP where it is necessary to run bandwidth and latency
+# sweeps on the Arm Ethos-U NPUs. The wrapper library here provides an
+# easy way to add initialisation of the timing adapter block.
+
+cmake_minimum_required(VERSION 3.15.6)
+set(ETHOS_U_NPU_TA_COMPONENT ethos_u_ta)
+project(${ETHOS_U_NPU_TA_COMPONENT}
+ DESCRIPTION "Ethos-U NPU timing adapter initialization library"
+ LANGUAGES C CXX ASM)
+
+# Checks
+## If a TA config file is provided, we generate a settings file
+if (DEFINED TA_CONFIG_FILE)
+ include(${TA_CONFIG_FILE})
+ set(TA_SETTINGS_TEMPLATE ${CMAKE_CURRENT_SOURCE_DIR}/cmake/templates/timing_adapter_settings.template)
+ configure_file("${TA_SETTINGS_TEMPLATE}" "${SOURCE_GEN_DIR}/timing_adapter_settings.h")
+endif()
+
+## Timing adapter Source path check
+if (NOT DEFINED ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH)
+ message(FATAL_ERROR "ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH should"
+ " be defined when ETHOS_U_NPU_ENABLED=${ETHOS_U_NPU_ENABLED}")
+endif()
+
+add_subdirectory(${ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH} ${CMAKE_BINARY_DIR}/timing_adapter)
+
+# Create static library
+add_library(${ETHOS_U_NPU_TA_COMPONENT} STATIC)
+
+## Include directories - public
+target_include_directories(${ETHOS_U_NPU_TA_COMPONENT}
+ PUBLIC
+ include
+ ${SOURCE_GEN_DIR})
+
+## Component sources
+target_sources(${ETHOS_U_NPU_TA_COMPONENT}
+ PRIVATE
+ ethosu_ta_init.c)
+
+## Compile definitions
+target_compile_definitions(${ETHOS_U_NPU_TA_COMPONENT}
+ PUBLIC
+ ETHOS_U_NPU_TIMING_ADAPTER_ENABLED)
+
+## Add dependencies
+target_link_libraries(${ETHOS_U_NPU_TA_COMPONENT} PUBLIC
+ timing_adapter
+ log)
+
+# Display status
+message(STATUS "CMAKE_CURRENT_SOURCE_DIR: " ${CMAKE_CURRENT_SOURCE_DIR})
+message(STATUS "*******************************************************")
+message(STATUS "Library : " ${ETHOS_U_NPU_TA_COMPONENT})
+message(STATUS "*******************************************************")
diff --git a/source/hal/source/components/npu_ta/cmake/templates/timing_adapter_settings.template b/source/hal/source/components/npu_ta/cmake/templates/timing_adapter_settings.template
new file mode 100644
index 0000000..5b6c43d
--- /dev/null
+++ b/source/hal/source/components/npu_ta/cmake/templates/timing_adapter_settings.template
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2021 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+// Auto-generated file
+// ** DO NOT EDIT **
+
+#ifndef TIMING_ADAPTER_SETTINGS_H
+#define TIMING_ADAPTER_SETTINGS_H
+
+#cmakedefine TA0_BASE (@TA0_BASE@)
+#cmakedefine TA1_BASE (@TA1_BASE@)
+
+/* Timing adapter settings for AXI0 */
+#if defined(TA0_BASE)
+
+#define TA0_MAXR (@TA0_MAXR@)
+#define TA0_MAXW (@TA0_MAXW@)
+#define TA0_MAXRW (@TA0_MAXRW@)
+#define TA0_RLATENCY (@TA0_RLATENCY@)
+#define TA0_WLATENCY (@TA0_WLATENCY@)
+#define TA0_PULSE_ON (@TA0_PULSE_ON@)
+#define TA0_PULSE_OFF (@TA0_PULSE_OFF@)
+#define TA0_BWCAP (@TA0_BWCAP@)
+#define TA0_PERFCTRL (@TA0_PERFCTRL@)
+#define TA0_PERFCNT (@TA0_PERFCNT@)
+#define TA0_MODE (@TA0_MODE@)
+#define TA0_HISTBIN (@TA0_HISTBIN@)
+#define TA0_HISTCNT (@TA0_HISTCNT@)
+
+#endif /* defined(TA0_BASE) */
+
+/* Timing adapter settings for AXI1 */
+#if defined(TA1_BASE)
+
+#define TA1_MAXR (@TA1_MAXR@)
+#define TA1_MAXW (@TA1_MAXW@)
+#define TA1_MAXRW (@TA1_MAXRW@)
+#define TA1_RLATENCY (@TA1_RLATENCY@)
+#define TA1_WLATENCY (@TA1_WLATENCY@)
+#define TA1_PULSE_ON (@TA1_PULSE_ON@)
+#define TA1_PULSE_OFF (@TA1_PULSE_OFF@)
+#define TA1_BWCAP (@TA1_BWCAP@)
+#define TA1_PERFCTRL (@TA1_PERFCTRL@)
+#define TA1_PERFCNT (@TA1_PERFCNT@)
+#define TA1_MODE (@TA1_MODE@)
+#define TA1_HISTBIN (@TA1_HISTBIN@)
+#define TA1_HISTCNT (@TA1_HISTCNT@)
+
+#endif /* defined(TA1_BASE) */
+
+#endif /* TIMING_ADAPTER_SETTINGS_H */
diff --git a/source/hal/source/components/npu_ta/ethosu_ta_init.c b/source/hal/source/components/npu_ta/ethosu_ta_init.c
new file mode 100644
index 0000000..323ab73
--- /dev/null
+++ b/source/hal/source/components/npu_ta/ethosu_ta_init.c
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ethosu_ta_init.h"
+
+#include "log_macros.h" /* Logging functions */
+
+#include "timing_adapter.h" /* Arm Ethos-U timing adapter driver header */
+#include "timing_adapter_settings.h" /* Arm Ethos-U timing adapter settings */
+
+int arm_ethosu_timing_adapter_init(void)
+{
+#if defined(TA0_BASE)
+ struct timing_adapter ta_0;
+ struct timing_adapter_settings ta_0_settings = {
+ .maxr = TA0_MAXR,
+ .maxw = TA0_MAXW,
+ .maxrw = TA0_MAXRW,
+ .rlatency = TA0_RLATENCY,
+ .wlatency = TA0_WLATENCY,
+ .pulse_on = TA0_PULSE_ON,
+ .pulse_off = TA0_PULSE_OFF,
+ .bwcap = TA0_BWCAP,
+ .perfctrl = TA0_PERFCTRL,
+ .perfcnt = TA0_PERFCNT,
+ .mode = TA0_MODE,
+ .maxpending = 0, /* This is a read-only parameter */
+ .histbin = TA0_HISTBIN,
+ .histcnt = TA0_HISTCNT};
+
+ if (0 != ta_init(&ta_0, TA0_BASE))
+ {
+ printf_err("TA0 initialisation failed\n");
+ return 1;
+ }
+
+ ta_set_all(&ta_0, &ta_0_settings);
+#endif /* defined (TA0_BASE) */
+
+#if defined(TA1_BASE)
+ struct timing_adapter ta_1;
+ struct timing_adapter_settings ta_1_settings = {
+ .maxr = TA1_MAXR,
+ .maxw = TA1_MAXW,
+ .maxrw = TA1_MAXRW,
+ .rlatency = TA1_RLATENCY,
+ .wlatency = TA1_WLATENCY,
+ .pulse_on = TA1_PULSE_ON,
+ .pulse_off = TA1_PULSE_OFF,
+ .bwcap = TA1_BWCAP,
+ .perfctrl = TA1_PERFCTRL,
+ .perfcnt = TA1_PERFCNT,
+ .mode = TA1_MODE,
+ .maxpending = 0, /* This is a read-only parameter */
+ .histbin = TA1_HISTBIN,
+ .histcnt = TA1_HISTCNT};
+
+ if (0 != ta_init(&ta_1, TA1_BASE))
+ {
+ printf_err("TA1 initialisation failed\n");
+ return 1;
+ }
+
+ ta_set_all(&ta_1, &ta_1_settings);
+#endif /* defined (TA1_BASE) */
+
+ return 0;
+}
diff --git a/source/hal/source/components/npu_ta/include/ethosu_ta_init.h b/source/hal/source/components/npu_ta/include/ethosu_ta_init.h
new file mode 100644
index 0000000..7e6df6c
--- /dev/null
+++ b/source/hal/source/components/npu_ta/include/ethosu_ta_init.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef ETHOS_U_TA_INIT_H
+#define ETHOS_U_TA_INIT_H
+
+/**
+ * @brief Initialises the Arm Ethos-U NPU timing adapter
+ * @return 0 if successful, error code otherwise
+ **/
+int arm_ethosu_timing_adapter_init(void);
+
+#endif /* ETHOS_U_TA_INIT_H */
diff --git a/source/hal/source/components/stdout/CMakeLists.txt b/source/hal/source/components/stdout/CMakeLists.txt
new file mode 100644
index 0000000..f1e26ff
--- /dev/null
+++ b/source/hal/source/components/stdout/CMakeLists.txt
@@ -0,0 +1,110 @@
+#----------------------------------------------------------------------------
+# Copyright (c) 2022 Arm Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#----------------------------------------------------------------------------
+
+#########################################################
+# Wrapper for enabling stdout and stderr facility #
+#########################################################
+# This is a wrapper around the UART module for CMSDK #
+# and PL011 UART drivers with retarget functions. #
+#########################################################
+
+cmake_minimum_required(VERSION 3.15.6)
+
+project(stdout
+ DESCRIPTION "Standard output and err redirection over UART"
+ LANGUAGES C CXX)
+
+
+set(STDOUT_RETARGET OFF CACHE BOOL "Retarget stdout/err to UART")
+
+# Interface library for standard output:
+set(STDOUT_IFACE_TARGET stdout_iface)
+add_library(${STDOUT_IFACE_TARGET} INTERFACE)
+target_include_directories(${STDOUT_IFACE_TARGET} INTERFACE include)
+
+if (STDOUT_RETARGET)
+
+ set(STDOUT_COMPONENT_CMSDK stdout_retarget_cmsdk)
+ set(STDOUT_COMPONENT_PL011 stdout_retarget_pl011)
+
+ add_library(${STDOUT_COMPONENT_CMSDK} STATIC)
+ add_library(${STDOUT_COMPONENT_PL011} STATIC)
+
+ # Check prerequisites
+ ## Core platform directory is required to add the UART library project.
+ if (NOT DEFINED CORE_PLATFORM_DIR)
+ message(FATAL_ERROR "CORE_PLATFORM_DIR undefined")
+ endif()
+
+ ## UART0_BASE is the base address for UART configuration. The platform
+ ## should define it prior to including this library.
+ if (NOT DEFINED UART0_BASE)
+ message(WARNING "UART0_BASE undefined, default will be used.")
+ endif()
+
+ ## Platform component: UART
+ add_subdirectory(${CORE_PLATFORM_DIR}/drivers/uart ${CMAKE_BINARY_DIR}/uart)
+
+ ## Component sources - public
+ target_sources(${STDOUT_COMPONENT_CMSDK}
+ PUBLIC
+ source/retarget.c)
+
+ ## Component sources - public
+ target_sources(${STDOUT_COMPONENT_PL011}
+ PUBLIC
+ source/retarget.c)
+
+ # Link
+ target_link_libraries(${STDOUT_COMPONENT_CMSDK}
+ PUBLIC
+ ${STDOUT_IFACE_TARGET}
+ ethosu_uart_cmsdk_apb)
+
+ target_link_libraries(${STDOUT_COMPONENT_PL011}
+ PUBLIC
+ ${STDOUT_IFACE_TARGET}
+ ethosu_uart_pl011)
+
+ # Display status
+ message(STATUS "CMAKE_CURRENT_SOURCE_DIR: " ${CMAKE_CURRENT_SOURCE_DIR})
+ message(STATUS "*******************************************************")
+ message(STATUS "Library: " ${STDOUT_COMPONENT_CMSDK})
+ message(STATUS "Library: " ${STDOUT_COMPONENT_PL011})
+ message(STATUS "*******************************************************")
+
+else()
+
+ # Create static library for retarget (stdout/err over UART)
+ set(STDOUT_COMPONENT stdout)
+ add_library(${STDOUT_COMPONENT} STATIC)
+
+ ## Component sources - public
+ target_sources(${STDOUT_COMPONENT}
+ PUBLIC
+ source/user_input.c)
+
+ target_link_libraries(${STDOUT_COMPONENT}
+ PUBLIC
+ ${STDOUT_IFACE_TARGET})
+
+ # Display status
+ message(STATUS "CMAKE_CURRENT_SOURCE_DIR: " ${CMAKE_CURRENT_SOURCE_DIR})
+ message(STATUS "*******************************************************")
+ message(STATUS "Library: " ${STDOUT_COMPONENT})
+ message(STATUS "*******************************************************")
+endif()
diff --git a/source/hal/source/components/stdout/include/user_input.h b/source/hal/source/components/stdout/include/user_input.h
new file mode 100644
index 0000000..e76b418
--- /dev/null
+++ b/source/hal/source/components/stdout/include/user_input.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef STDOUT_USER_INPUT_H
+#define STDOUT_USER_INPUT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+unsigned int GetLine(char *user_input, unsigned int size);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STDOUT_USER_INPUT_H */
diff --git a/source/hal/source/components/stdout/source/retarget.c b/source/hal/source/components/stdout/source/retarget.c
new file mode 100644
index 0000000..ac9b282
--- /dev/null
+++ b/source/hal/source/components/stdout/source/retarget.c
@@ -0,0 +1,278 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#if !defined(USE_SEMIHOSTING)
+
+#include "uart_stdout.h"
+
+#include <stdio.h>
+#include <string.h>
+#include <time.h>
+
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
+/* Arm compiler re-targeting */
+
+#include <rt_misc.h>
+#include <rt_sys.h>
+
+
+/* Standard IO device handles. */
+#define STDIN 0x8001
+#define STDOUT 0x8002
+#define STDERR 0x8003
+
+#define RETARGET(fun) _sys##fun
+
+#else
+/* GNU compiler re-targeting */
+
+/*
+ * This type is used by the _ I/O functions to denote an open
+ * file.
+ */
+typedef int FILEHANDLE;
+
+/*
+ * Open a file. May return -1 if the file failed to open.
+ */
+extern FILEHANDLE _open(const char * /*name*/, int /*openmode*/);
+
+/* Standard IO device handles. */
+#define STDIN 0x00
+#define STDOUT 0x01
+#define STDERR 0x02
+
+#define RETARGET(fun) fun
+
+#endif
+
+/* Standard IO device name defines. */
+const char __stdin_name[] __attribute__((aligned(4))) = "STDIN";
+const char __stdout_name[] __attribute__((aligned(4))) = "STDOUT";
+const char __stderr_name[] __attribute__((aligned(4))) = "STDERR";
+
+__attribute__((noreturn)) static void UartEndSimulation(int code)
+{
+ UartPutc((char) 0x4); // End of simulation
+ UartPutc((char) code); // Exit code
+ while(1);
+}
+
+void _ttywrch(int ch) {
+ (void)fputc(ch, stdout);
+}
+
+FILEHANDLE RETARGET(_open)(const char *name, int openmode)
+{
+ (void)(openmode);
+
+ if (strcmp(name, __stdin_name) == 0) {
+ return (STDIN);
+ }
+
+ if (strcmp(name, __stdout_name) == 0) {
+ return (STDOUT);
+ }
+
+ if (strcmp(name, __stderr_name) == 0) {
+ return (STDERR);
+ }
+
+ return -1;
+}
+
+int RETARGET(_write)(FILEHANDLE fh, const unsigned char *buf, unsigned int len, int mode)
+{
+ (void)(mode);
+
+ switch (fh) {
+ case STDOUT:
+ case STDERR: {
+ int c;
+
+ while (len-- > 0) {
+ c = fputc(*buf++, stdout);
+ if (c == EOF) {
+ return EOF;
+ }
+ }
+
+ return 0;
+ }
+ default:
+ return EOF;
+ }
+}
+
+int RETARGET(_read)(FILEHANDLE fh, unsigned char *buf, unsigned int len, int mode)
+{
+ (void)(mode);
+
+ switch (fh) {
+ case STDIN: {
+ int c;
+
+ while (len-- > 0) {
+ c = fgetc(stdin);
+ if (c == EOF) {
+ return EOF;
+ }
+
+ *buf++ = (unsigned char)c;
+ }
+
+ return 0;
+ }
+ default:
+ return EOF;
+ }
+}
+
+int RETARGET(_istty)(FILEHANDLE fh)
+{
+ switch (fh) {
+ case STDIN:
+ case STDOUT:
+ case STDERR:
+ return 1;
+ default:
+ return 0;
+ }
+}
+
+int RETARGET(_close)(FILEHANDLE fh)
+{
+ if (RETARGET(_istty(fh))) {
+ return 0;
+ }
+
+ return -1;
+}
+
+int RETARGET(_seek)(FILEHANDLE fh, long pos)
+{
+ (void)(fh);
+ (void)(pos);
+
+ return -1;
+}
+
+int RETARGET(_ensure)(FILEHANDLE fh)
+{
+ (void)(fh);
+
+ return -1;
+}
+
+long RETARGET(_flen)(FILEHANDLE fh)
+{
+ if (RETARGET(_istty)(fh)) {
+ return 0;
+ }
+
+ return -1;
+}
+
+int RETARGET(_tmpnam)(char *name, int sig, unsigned int maxlen)
+{
+ (void)(name);
+ (void)(sig);
+ (void)(maxlen);
+
+ return 1;
+}
+
+char *RETARGET(_command_string)(char *cmd, int len)
+{
+ (void)(len);
+
+ return cmd;
+}
+
+void RETARGET(_exit)(int return_code)
+{
+ UartEndSimulation(return_code);
+ while(1);
+}
+
+int system(const char *cmd)
+{
+ (void)(cmd);
+
+ return 0;
+}
+
+time_t time(time_t *timer)
+{
+ time_t current;
+
+ current = 0; // To Do !! No RTC implemented
+
+ if (timer != NULL) {
+ *timer = current;
+ }
+
+ return current;
+}
+
+void _clock_init(void) {}
+
+clock_t clock(void)
+{
+ return (clock_t)-1;
+}
+
+int remove(const char *arg) {
+ (void)(arg);
+
+ return 0;
+}
+
+int rename(const char *oldn, const char *newn)
+{
+ (void)(oldn);
+ (void)(newn);
+
+ return 0;
+}
+
+int fputc(int ch, FILE *f)
+{
+ (void)(f);
+
+ return UartPutc(ch);
+}
+
+int fgetc(FILE *f)
+{
+ (void)(f);
+
+ return UartPutc(UartGetc());
+}
+
+#ifndef ferror
+
+/* arm-none-eabi-gcc with newlib uses a define for ferror */
+int ferror(FILE *f)
+{
+ (void)(f);
+
+ return EOF;
+}
+
+#endif /* #ifndef ferror */
+
+#endif /* !defined(USE_SEMIHOSTING) */
diff --git a/source/hal/source/components/stdout/source/user_input.c b/source/hal/source/components/stdout/source/user_input.c
new file mode 100644
index 0000000..e5fe1b9
--- /dev/null
+++ b/source/hal/source/components/stdout/source/user_input.c
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdio.h>
+
+unsigned int GetLine(char *user_input, unsigned int size)
+{
+ if (NULL != fgets(user_input, size, stdin)) {
+ return 1;
+ }
+ return 0;
+}
+
+#ifdef __cplusplus
+}
+#endif