blob: 701b5de74a9e461ae45483410c83dae4204d9793 [file] [log] [blame]
Isabella Gottardiee4920b2022-02-25 14:29:32 +00001/*
2 * Copyright (c) 2022 Arm Limited. All rights reserved.
3 * SPDX-License-Identifier: Apache-2.0
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 */
17
18#include "ethosu_npu_init.h"
19
Kshitij Sisodia6a2ac462022-03-01 17:36:06 +000020#include "RTE_Components.h" /* For CPU related defintiions */
Isabella Gottardiee4920b2022-02-25 14:29:32 +000021#include "log_macros.h" /* Logging functions */
22
23#include "ethosu_mem_config.h" /* Arm Ethos-U memory config */
24#include "ethosu_driver.h" /* Arm Ethos-U driver header */
25
26struct ethosu_driver ethosu_drv; /* Default Ethos-U device driver */
27
28#if defined(ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0)
29static uint8_t cache_arena[ETHOS_U_CACHE_BUF_SZ] CACHE_BUF_ATTRIBUTE;
30#else /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */
31static uint8_t *cache_arena = NULL;
32#endif /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */
33
Kshitij Sisodiac22e80e2022-03-14 09:26:48 +000034static uint8_t *get_cache_arena()
Isabella Gottardiee4920b2022-02-25 14:29:32 +000035{
36 return cache_arena;
37}
38
Kshitij Sisodiac22e80e2022-03-14 09:26:48 +000039static size_t get_cache_arena_size()
Isabella Gottardiee4920b2022-02-25 14:29:32 +000040{
41#if defined(ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0)
42 return sizeof(cache_arena);
43#else /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */
44 return 0;
45#endif /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */
46}
47
48/**
Isabella Gottardiee4920b2022-02-25 14:29:32 +000049 * @brief Initialises the NPU IRQ
50 **/
Kshitij Sisodiac22e80e2022-03-14 09:26:48 +000051static void arm_ethosu_npu_irq_init(void)
Isabella Gottardiee4920b2022-02-25 14:29:32 +000052{
Kshitij Sisodia8bc863d2022-03-24 17:53:34 +000053 const IRQn_Type ethosu_irqnum = (IRQn_Type)ETHOS_U_IRQN;
Isabella Gottardiee4920b2022-02-25 14:29:32 +000054
55 /* Register the EthosU IRQ handler in our vector table.
56 * Note, this handler comes from the EthosU driver */
57 NVIC_SetVector(ethosu_irqnum, (uint32_t)arm_ethosu_npu_irq_handler);
58
59 /* Enable the IRQ */
60 NVIC_EnableIRQ(ethosu_irqnum);
61
62 debug("EthosU IRQ#: %u, Handler: 0x%p\n",
63 ethosu_irqnum, arm_ethosu_npu_irq_handler);
64}
65
Kshitij Sisodia1ec169b2022-06-01 09:06:21 +010066/**
67 * @brief Defines the Ethos-U interrupt handler: just a wrapper around the default
68 * implementation.
69 **/
70void arm_ethosu_npu_irq_handler(void)
71{
72 /* Call the default interrupt handler from the NPU driver */
73 ethosu_irq_handler(&ethosu_drv);
74}
75
Isabella Gottardiee4920b2022-02-25 14:29:32 +000076int arm_ethosu_npu_init(void)
77{
78 int err = 0;
79
80 /* Initialise the IRQ */
81 arm_ethosu_npu_irq_init();
82
83 /* Initialise Ethos-U device */
Kshitij Sisodia8bc863d2022-03-24 17:53:34 +000084 const void *ethosu_base_address = (void *)(ETHOS_U_BASE_ADDR);
Isabella Gottardiee4920b2022-02-25 14:29:32 +000085
86 if (0 != (err = ethosu_init(
87 &ethosu_drv, /* Ethos-U driver device pointer */
88 ethosu_base_address, /* Ethos-U NPU's base address. */
89 get_cache_arena(), /* Pointer to fast mem area - NULL for U55. */
90 get_cache_arena_size(), /* Fast mem region size. */
Kshitij Sisodia8bc863d2022-03-24 17:53:34 +000091 ETHOS_U_SEC_ENABLED, /* Security enable. */
92 ETHOS_U_PRIV_ENABLED))) /* Privilege enable. */
Isabella Gottardiee4920b2022-02-25 14:29:32 +000093 {
94 printf_err("failed to initialise Ethos-U device\n");
95 return err;
96 }
97
98 info("Ethos-U device initialised\n");
99
100 /* Get Ethos-U version */
101 struct ethosu_driver_version driver_version;
102 struct ethosu_hw_info hw_info;
103
104 ethosu_get_driver_version(&driver_version);
105 ethosu_get_hw_info(&ethosu_drv, &hw_info);
106
107 info("Ethos-U version info:\n");
108 info("\tArch: v%" PRIu32 ".%" PRIu32 ".%" PRIu32 "\n",
109 hw_info.version.arch_major_rev,
110 hw_info.version.arch_minor_rev,
111 hw_info.version.arch_patch_rev);
112 info("\tDriver: v%" PRIu8 ".%" PRIu8 ".%" PRIu8 "\n",
113 driver_version.major,
114 driver_version.minor,
115 driver_version.patch);
116 info("\tMACs/cc: %" PRIu32 "\n", (uint32_t)(1 << hw_info.cfg.macs_per_cc));
117 info("\tCmd stream: v%" PRIu32 "\n", hw_info.cfg.cmd_stream_version);
118
119 return 0;
120}