alexander | 3c79893 | 2021-03-26 21:42:19 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2021 Arm Limited. All rights reserved. |
| 3 | * SPDX-License-Identifier: Apache-2.0 |
| 4 | * |
| 5 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 6 | * you may not use this file except in compliance with the License. |
| 7 | * You may obtain a copy of the License at |
| 8 | * |
| 9 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 10 | * |
| 11 | * Unless required by applicable law or agreed to in writing, software |
| 12 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 13 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 14 | * See the License for the specific language governing permissions and |
| 15 | * limitations under the License. |
| 16 | */ |
| 17 | #include "timer_mps3.h" |
| 18 | |
| 19 | #include "bsp_core_log.h" |
| 20 | #include "device_mps3.h" |
| 21 | |
| 22 | void timer_reset(void) |
| 23 | { |
| 24 | MPS3_FPGAIO->CLK1HZ = 0; |
| 25 | MPS3_FPGAIO->CLK100HZ = 0; |
| 26 | MPS3_FPGAIO->COUNTER = 0; |
| 27 | |
| 28 | if (0 != Init_SysTick()) { |
| 29 | printf_err("Failed to initialise system tick config\n"); |
| 30 | } |
| 31 | debug("system tick config ready\n"); |
| 32 | } |
| 33 | |
| 34 | mps3_time_counter get_time_counter(void) |
| 35 | { |
| 36 | mps3_time_counter t = { |
| 37 | .counter_1Hz = MPS3_FPGAIO->CLK1HZ, |
| 38 | .counter_100Hz = MPS3_FPGAIO->CLK100HZ, |
| 39 | .counter_fpga = MPS3_FPGAIO->COUNTER, |
| 40 | .counter_systick = Get_SysTick_Cycle_Count() |
| 41 | }; |
| 42 | debug("Timestamp:\ |
| 43 | \n\tCounter 1 Hz: %u\ |
| 44 | \n\tCounter 100 Hz: %u\ |
| 45 | \n\tCounter FPGA: %u\ |
| 46 | \n\tCounter CPU: %llu\n", |
| 47 | t.counter_1Hz, t.counter_100Hz, t.counter_fpga, t.counter_systick); |
| 48 | return t; |
| 49 | } |
| 50 | |
| 51 | /** |
| 52 | * Please note, that there are no checks for overflow in this function => if |
| 53 | * the time elapsed has been big (in days) this could happen and is currently |
| 54 | * not handled. |
| 55 | **/ |
| 56 | uint32_t get_duration_milliseconds(mps3_time_counter *start, |
| 57 | mps3_time_counter *end) |
| 58 | { |
| 59 | uint32_t time_elapsed = 0; |
| 60 | if (end->counter_100Hz > start->counter_100Hz) { |
| 61 | time_elapsed = (end->counter_100Hz - start->counter_100Hz) * 10; |
| 62 | } else { |
| 63 | time_elapsed = (end->counter_1Hz - start->counter_1Hz) * 1000 + |
| 64 | ((0xFFFFFFFF - start->counter_100Hz) + end->counter_100Hz + 1) * 10; |
| 65 | } |
| 66 | |
| 67 | /* If the time elapsed is less than 100ms, use microseconds count to be |
| 68 | * more precise */ |
| 69 | if (time_elapsed < 100) { |
| 70 | debug("Using the microsecond function instead..\n"); |
| 71 | return get_duration_microseconds(start, end)/1000; |
| 72 | } |
| 73 | |
| 74 | return time_elapsed; |
| 75 | } |
| 76 | |
| 77 | /** |
| 78 | * Like the microsecond counterpart, this function could return wrong results when |
| 79 | * the counter (MAINCLK) overflows. There are no overflow counters available. |
| 80 | **/ |
| 81 | uint32_t get_duration_microseconds(mps3_time_counter *start, |
| 82 | mps3_time_counter *end) |
| 83 | { |
| 84 | const int divisor = GetMPS3CoreClock()/1000000; |
| 85 | uint32_t time_elapsed = 0; |
| 86 | if (end->counter_fpga > start->counter_fpga) { |
| 87 | time_elapsed = (end->counter_fpga - start->counter_fpga)/divisor; |
| 88 | } else { |
| 89 | time_elapsed = ((0xFFFFFFFF - end->counter_fpga) |
| 90 | + start->counter_fpga + 1)/divisor; |
| 91 | } |
| 92 | return time_elapsed; |
| 93 | } |
| 94 | |
| 95 | uint64_t get_cycle_count_diff(mps3_time_counter *start, |
| 96 | mps3_time_counter *end) |
| 97 | { |
| 98 | if (start->counter_systick > end->counter_systick) { |
| 99 | warn("start > end; counter might have overflown\n"); |
| 100 | } |
| 101 | return end->counter_systick - start->counter_systick; |
| 102 | } |
| 103 | |
| 104 | void start_cycle_counter(void) |
| 105 | { |
| 106 | /* Nothing to do for FPGA */ |
| 107 | } |
| 108 | |
| 109 | void stop_cycle_counter(void) |
| 110 | { |
| 111 | /* Nothing to do for FPGA */ |
| 112 | } |