blob: 13f6f0a9fff9ea71c478b025fa134f82f5f5e4a7 [file] [log] [blame]
Kshitij Sisodiac22e80e2022-03-14 09:26:48 +00001/*
2 * Copyright (c) 2022 Arm Limited. All rights reserved.
3 * SPDX-License-Identifier: Apache-2.0
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 */
17
18#include "ethosu_cpu_cache.h"
19
20#include "RTE_Components.h" /* For CPU related defintiions */
21#include "ethosu_driver.h" /* Arm Ethos-U driver header */
22#include "log_macros.h" /* Logging macros */
23
24void ethosu_flush_dcache(uint32_t *p, size_t bytes)
25{
26#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
27 if (SCB->CCR & SCB_CCR_DC_Msk) {
28 if (p) {
29 SCB_CleanDCache_by_Addr((void *) p, (int32_t) bytes);
30 } else {
31 SCB_CleanDCache();
32 }
33 }
34#else
35 UNUSED(p);
36 UNUSED(bytes);
37#endif /* defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) */
38}
39
40void ethosu_invalidate_dcache(uint32_t *p, size_t bytes)
41{
42#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
43 if (SCB->CCR & SCB_CCR_DC_Msk) {
44 if (p) {
45 SCB_InvalidateDCache_by_Addr((void *) p, (int32_t) bytes);
46 } else {
47 SCB_InvalidateDCache();
48 }
49 }
50#else
51 UNUSED(p);
52 UNUSED(bytes);
53#endif /* defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) */
54}