blob: 2bfaafc9c571a06a53205c1e34afeb8e1c2133b8 [file] [log] [blame]
alexander31ae9f02022-02-10 16:15:54 +00001/*
2 * Copyright (c) 2021 Arm Limited. All rights reserved.
3 * SPDX-License-Identifier: Apache-2.0
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 */
17// Auto-generated file
18// ** DO NOT EDIT **
19
20#ifndef PERIPHERAL_MEMMAP_H
21#define PERIPHERAL_MEMMAP_H
22
23#cmakedefine DESIGN_NAME "@DESIGN_NAME@"
24
25/******************************************************************************/
26/* Peripheral memory map */
27/******************************************************************************/
28#cmakedefine PL011_UART0_BASE (@PL011_UART0_BASE@) /* PL011 UART0 Base Address */
29
30#cmakedefine ETHOS_U_NPU_BASE (@ETHOS_U_NPU_BASE@) /* Ethos-U NPU base address*/
31#cmakedefine ETHOS_U_NPU_TA0_BASE (@ETHOS_U_NPU_TA0_BASE@) /* Ethos-U NPU's timing adapter 0 base address */
32#cmakedefine ETHOS_U_NPU_TA1_BASE (@ETHOS_U_NPU_TA1_BASE@) /* Ethos-U NPU's timing adapter 1 base address */
33
34/******************************************************************************/
35/* Secure Peripheral memory map */
36/******************************************************************************/
37
38#cmakedefine SEC_ETHOS_U_NPU_BASE (@SEC_ETHOS_U_NPU_BASE@) /* Ethos-U NPU base address*/
39#cmakedefine SEC_ETHOS_U_NPU_TA0_BASE (@SEC_ETHOS_U_NPU_TA0_BASE@) /* Ethos-U NPU's timing adapter 0 base address */
40#cmakedefine SEC_ETHOS_U_NPU_TA1_BASE (@SEC_ETHOS_U_NPU_TA1_BASE@) /* Ethos-U NPU's timing adapter 1 base address */
41
42#endif /* PERIPHERAL_MEMMAP_H */