pseudocode: a collection of trivial fixes
- Add missing parenthesis in ARITHMETIC_SHIFT_RIGHT
- Add missing semicolons
- Remove stray dot in VARIABLE_WRITE
Change-Id: I28ab7c80c735995437588fffeffb1f12d112f3ec
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
diff --git a/pseudocode/operators/ARITHMETIC_RIGHT_SHIFT.tosac b/pseudocode/operators/ARITHMETIC_RIGHT_SHIFT.tosac
index 4077146..7ed4886 100644
--- a/pseudocode/operators/ARITHMETIC_RIGHT_SHIFT.tosac
+++ b/pseudocode/operators/ARITHMETIC_RIGHT_SHIFT.tosac
@@ -21,7 +21,7 @@
in_out_t result = apply_arith_rshift<in_out_t>(value1, value2);
if (round == true && static_cast<int32_t>(value2) > 0 &&
- (apply_arith_rshift<in_out_t>(value1, apply_sub_s<in_out_t>(value2, 1)) & 1 != 0) {
+ (apply_arith_rshift<in_out_t>(value1, apply_sub_s<in_out_t>(value2, 1)) & 1 != 0)) {
result = result + 1;
}
result = apply_clip_s<in_out_t>(result, minimum_s<in_out_t>, maximum_s<in_out_t>);
diff --git a/pseudocode/operators/CAST.tosac b/pseudocode/operators/CAST.tosac
index f6306b3..8d816ca 100644
--- a/pseudocode/operators/CAST.tosac
+++ b/pseudocode/operators/CAST.tosac
@@ -23,5 +23,5 @@
} else {
out = truncate(in);
}
- tensor_write<out_t>(output, shape, index, out)
+ tensor_write<out_t>(output, shape, index, out);
}
diff --git a/pseudocode/operators/NEGATE.tosac b/pseudocode/operators/NEGATE.tosac
index 8c235f1..cae57f3 100644
--- a/pseudocode/operators/NEGATE.tosac
+++ b/pseudocode/operators/NEGATE.tosac
@@ -7,8 +7,8 @@
// copies and copies may only be made to the extent permitted
// by a licensing agreement from ARM Limited.
-ERROR_IF(in_out_t != i8_t && input1_zp != 0) // Zero point only for int8_t
-ERROR_IF(in_out_t != i8_t && output_zp != 0) // Zero point only for int8_t
+ERROR_IF(in_out_t != i8_t && input1_zp != 0); // Zero point only for int8_t
+ERROR_IF(in_out_t != i8_t && output_zp != 0); // Zero point only for int8_t
for_each(index in shape) {
in_out_t value1 = tensor_read<in_out_t>(input1, shape, index);
acc_t value = apply_sub_s<acc_t>(sign_extend<acc_t>(value1),
diff --git a/pseudocode/operators/TRANSPOSE.tosac b/pseudocode/operators/TRANSPOSE.tosac
index a8f0815..e75db79 100644
--- a/pseudocode/operators/TRANSPOSE.tosac
+++ b/pseudocode/operators/TRANSPOSE.tosac
@@ -22,13 +22,13 @@
// Ensure that the output shapes have the properly
// permuted shapes
for(i = 0; i < rank(shape); i++) {
- ERROR_IF(shape1[perms[i]] != shape[i])
+ ERROR_IF(shape1[perms[i]] != shape[i]);
}
for_each(index in shape) {
dim_t tmp_index = index;
for(i = 0; i < rank(shape); i++) {
- tmp_index[perms[i]] = index[i]
+ tmp_index[perms[i]] = index[i];
}
in_out_t value = tensor_read<in_out_t>(input1, shape1, tmp_index);
tensor_write<in_out_t>(output, shape, index, value);
diff --git a/pseudocode/operators/TRANSPOSE_CONV2D.tosac b/pseudocode/operators/TRANSPOSE_CONV2D.tosac
index 3aa0e23..ab61348 100644
--- a/pseudocode/operators/TRANSPOSE_CONV2D.tosac
+++ b/pseudocode/operators/TRANSPOSE_CONV2D.tosac
@@ -17,7 +17,7 @@
ERROR_IF(BC != OC && BC != 1);
for_each(index in [N, OH, OW, OC]) {
- tensor_write<out_t>(output, [N,OH,OW,OC], index, bias[(BC == 1) ? 0 : index[3]])
+ tensor_write<out_t>(output, [N,OH,OW,OC], index, bias[(BC == 1) ? 0 : index[3]]);
}
for_each(0 <= n < N, 0 <= iy < IH, 0 <= ix < IW, 0 <= oc < OC,
0 <= ic < IC, 0 <= ky < KH, 0 <= kx < KW) {
diff --git a/pseudocode/operators/VARIABLE_WRITE.tosac b/pseudocode/operators/VARIABLE_WRITE.tosac
index 83c5525..245fff5 100644
--- a/pseudocode/operators/VARIABLE_WRITE.tosac
+++ b/pseudocode/operators/VARIABLE_WRITE.tosac
@@ -8,7 +8,7 @@
// by a licensing agreement from ARM Limited.
-tensor_t. variable_tensor = variable_tensor_lookup(uid);
+tensor_t variable_tensor = variable_tensor_lookup(uid);
// Check this variable tensor has been declared
REQUIRE(variable_tensor);
// The tensor has to be seen before to be written to