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telsoa015307bc12018-03-09 13:51:08 +00001------ ArmNN for Android 18.02 Release Notes ------
2
3This release of ArmNN for Android supports use as a driver for the Android Neural Networks API. It implements the android.hardware.neuralnetworks@1.0 interface.
4
5For more information on the Android Neural Networks API, see https://developer.android.com/ndk/guides/neuralnetworks/index.html
6
7For integration and usage documentation, please see README.md.
8
9--- Support for Android Neural Networks HAL operations ---
10
11The following AndroidNN operations are currently supported.
12
13AndroidNN operator Tensor type supported
14ADD (FLOAT32)
15AVERAGE_POOL_2D (FLOAT32,QUANT8_ASYMM)
16CONCATENATION (FLOAT32)
17CONV_2D (FLOAT32,QUANT8_ASYMM**)
18DEPTHWISE_CONV_2D*** (FLOAT32,QUANT8_ASYMM)
19FLOOR (FLOAT32)
20FULLY_CONNECTED (FLOAT32)
21L2_NORMALIZATION (FLOAT32)
22L2_POOL_2D (FLOAT32)
23LOCAL_RESPONSE_NORMALIZATION (FLOAT32)
24LOGISTIC (FLOAT32,QUANT8_ASYMM)
25MAX_POOL_2D (FLOAT32,QUANT8_ASYMM)
26MUL* (FLOAT32)
27RELU (FLOAT32,QUANT8_ASYMM)
28RELU1 (FLOAT32,QUANT8_ASYMM)
29RELU6 (FLOAT32,QUANT8_ASYMM)
30RESHAPE (FLOAT32,QUANT8_ASYMM)
31RESIZE_BILINEAR (FLOAT32)
32SOFTMAX (FLOAT32,QUANT8_ASYMM)
33TANH (FLOAT32)
34
35* MUL currently does not support mixing of different tensor sizes.
36
37** QUANT8_ASYMM version does not support asymmetric padding. In addition, only the following configurations are supported:
38 1) 1x1 convolution with strides of 1 or 2 or 3
39 2) 3x3 convolution with strides of 1 or 2
40 3) 5x5 convolution with strides of 1 or 2
41
42*** Depthwise convolution only supports a value of 1 for the depth multiplier. In addition, the QUANT8_ASYMM version only supports 3x3 kernels.
43
44
45--- Unsupported operators ---
46
47The following AndroidNN operations are currently not supported.
48
49DEPTH_TO_SPACE
50DEQUANTIZE
51EMBEDDING_LOOKUP
52HASHTABLE_LOOKUP
53LSH_PROJECTION
54LSTM
55RNN
56SPACE_TO_DEPTH
57SVDF
58
59Where operations are not supported by the ArmNN Android NN Driver, the driver indicates this to the framework appropriately and the framework implements those operations using a CPU implementation.