Gitiles
Code Review Sign In
review.mlplatform.org / ml / armnn / b63a31170aee1d28267d83a4bc67b57708fb6b05 / . / docs / 05_operator_list.dox
blob: 90aee130bf468487219fc4e197395e834ddf89f0 [file] [log] [blame]
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]1/// Copyright (c) 2021 ARM Limited and Contributors. All rights reserved.
2///
3/// SPDX-License-Identifier: MIT
4///
5
6namespace armnn
7{
8/**
9@page operator_list Arm NN Operators
10
11@tableofcontents
12
13@section S5_1_operator_list Arm NN Operators
14
15Arm NN supports operators that are listed in below table.
16
17Arm NN supports a wide list of data-types.
18The main data-types that the Machine Learning functions support are the following:
19 <ul>
20 <li><b>BFLOAT16:</b> 16-bit non-standard brain floating point
21 <li><b>QASYMMU8:</b> 8-bit unsigned asymmetric quantized
22 <li><b>QASYMMS8:</b> 8-bit signed asymmetric quantized
23 <li><b>QUANTIZEDSYMM8PERAXIS:</b> 8-bit signed symmetric quantized
24 <li><b>QSYMMS8:</b> 8-bit unsigned symmetric quantized
25 <li><b>QSYMMS16:</b> 16-bit unsigned symmetric quantized
26 <li><b>FLOAT32:</b> 32-bit single precision floating point
27 <li><b>FLOAT16:</b> 16-bit half precision floating point
28 <li><b>SIGNED32:</b> 32-bit signed integer
29 <li><b>BOOLEAN:</b> 8-bit unsigned char
30 <li><b>All:</b> Agnostic to any specific data type
31 </ul>
32
33Arm NN supports the following data layouts (fast changing dimension from right to left):
34 <ul>
35 <li><b>NHWC:</b> Layout where channels are in the fastest changing dimension
36 <li><b>NCHW:</b> Layout where width is in the fastest changing dimension
37 <li><b>All:</b> Agnostic to any specific data layout
38 </ul>
39where N = batches, C = channels, H = height, W = width
40
41<table>
42<caption id="multi_row"></caption>
43<tr>
44 <th>Operator
45 <th>Description
46 <th>Equivalent Android NNAPI Operator
47 <th>Backends
48 <th>Data Layouts
49 <th>Data Types
50<tr>
51 <td rowspan="3">AbsLayer
52 <td rowspan="3"> Layer to perform absolute operation.
53 <td rowspan="3">
54 <ul>
55 <li>ANEURALNETWORKS_ABS
56 </ul>
57 <td>CpuRef
58 <td>
59 <ul>
60 <li>All
61 </ul>
62 <td>
63 <table>
64 <tr><th>
65 <tr><td>BFLOAT16
66 <tr><td>FLOAT16
67 <tr><td>FLOAT32
68 <tr><td>QASYMMS8
69 <tr><td>QASYMMU8
70 <tr><td>QSYMMS16
71 <tr><td>SIGNED32
72 </table>
73<tr>
74 <td>CpuAcc
75 <td>
76 <ul>
77 <li>All
78 </ul>
79 <td>
80 <table>
81 <tr><th>
82 <tr><td>FLOAT16
83 <tr><td>FLOAT32
84 <tr><td>SIGNED32
85 </table>
86<tr>
87 <td>GpuAcc
88 <td>
89 <ul>
90 <li>All
91 </ul>
92 <td>
93 <table>
94 <tr><th>
95 <tr><td>FLOAT16
96 <tr><td>FLOAT32
97 </table>
98<tr>
99 <td rowspan="3">ActivationLayer
100 <td rowspan="3" style="width:200px;"> Layer to simulate an activation layer with the specified activation function.
101 <td rowspan="3">
102 <ul>
103 <li>ANEURALNETWORKS_ABS
104 <li>ANEURALNETWORKS_ELU
105 <li>ANEURALNETWORKS_HARD_SWISH
106 <li>ANEURALNETWORKS_LOGISTIC
107 <li>ANEURALNETWORKS_PRELU
108 <li>ANEURALNETWORKS_RELU
109 <li>ANEURALNETWORKS_RELU1
110 <li>ANEURALNETWORKS_RELU6
111 <li>ANEURALNETWORKS_SQRT
112 <li>ANEURALNETWORKS_TANH
113 </ul>
114 <td>CpuRef
115 <td>
116 <ul>
117 <li>All
118 </ul>
119 <td>
120 <table>
121 <tr><th>
122 <tr><td>BFLOAT16
123 <tr><td>FLOAT16
124 <tr><td>FLOAT32
125 <tr><td>QASYMMS8
126 <tr><td>QASYMMU8
127 <tr><td>QSYMMS16
128 </table>
129<tr>
130 <td>CpuAcc
131 <td>
132 <ul>
133 <li>All
134 </ul>
135 <td>
136 <table>
137 <tr><th>
138 <tr><td>QASYMMU8
139 <tr><td>QASYMMS8
140 <tr><td>QSYMMS16
141 <tr><td>FLOAT16
142 <tr><td>FLOAT32
143 </table>
144<tr>
145 <td>GpuAcc
146 <td>
147 <ul>
148 <li>All
149 </ul>
150 <td>
151 <table>
152 <tr><th>
153 <tr><td>QASYMMU8
154 <tr><td>QASYMMS8
155 <tr><td>QSYMMS16
156 <tr><td>FLOAT16
157 <tr><td>FLOAT32
158 </table>
159<tr>
160 <td rowspan="3">AdditionLayer
161 <td rowspan="3" style="width:200px;"> Layer to add 2 tensors.
162 <td rowspan="3">
163 <ul>
164 <li>ANEURALNETWORKS_ADD
165 </ul>
166 <td>CpuRef
167 <td>
168 <ul>
169 <li>All
170 </ul>
171 <td>
172 <table>
173 <tr><th>
174 <tr><td>BFLOAT16
175 <tr><td>FLOAT16
176 <tr><td>FLOAT32
177 <tr><td>QASYMMS8
178 <tr><td>QASYMMU8
179 <tr><td>QSYMMS16
180 <tr><td>SIGNED32
181 </table>
182<tr>
183 <td>CpuAcc
184 <td>
185 <ul>
186 <li>All
187 </ul>
188 <td>
189 <table>
190 <tr><th>
191 <tr><td>QASYMMU8
192 <tr><td>QASYMMS8
193 <tr><td>QSYMMS16
194 <tr><td>SIGNED32
195 <tr><td>FLOAT16
196 <tr><td>FLOAT32
197 </table>
198<tr>
199 <td>GpuAcc
200 <td>
201 <ul>
202 <li>All
203 </ul>
204 <td>
205 <table>
206 <tr><th>
207 <tr><td>QASYMMU8
208 <tr><td>QASYMMS8
209 <tr><td>QSYMMS16
210 <tr><td>SIGNED32
211 <tr><td>FLOAT16
212 <tr><td>FLOAT32
213 </table>
214<tr>
215 <td rowspan="3">ArgMinMaxLayer
216 <td rowspan="3" style="width:200px;"> Layer to calculate the index of the minimum or maximum values in a tensor
217 based on an axis.
218 <td rowspan="3">
219 <ul>
220 <li>ANEURALNETWORKS_ARGMAX
221 <li>ANEURALNETWORKS_ARGMIN
222 </ul>
223 <td>CpuRef
224 <td>
225 <ul>
226 <li>All
227 </ul>
228 <td>
229 <table>
230 <tr><th>
231 <tr><td>BFLOAT16
232 <tr><td>FLOAT16
233 <tr><td>FLOAT32
234 <tr><td>QASYMMS8
235 <tr><td>QASYMMU8
236 <tr><td>QSYMMS16
237 <tr><td>SIGNED32
238 <tr><td>SIGNED64
239 </table>
240<tr>
241 <td>CpuAcc
242 <td>
243 <ul>
244 <li>All
245 </ul>
246 <td>
247 <table>
248 <tr><th>
249 <tr><td>QASYMMU8
250 <tr><td>QASYMMS8
251 <tr><td>SIGNED32
252 <tr><td>FLOAT16
253 <tr><td>FLOAT32
254 </table>
255<tr>
256 <td>GpuAcc
257 <td>
258 <ul>
259 <li>All
260 </ul>
261 <td>
262 <table>
263 <tr><th>
264 <tr><td>QASYMMU8
265 <tr><td>QASYMMS8
266 <tr><td>SIGNED32
267 <tr><td>FLOAT16
268 <tr><td>FLOAT32
269 </table>
270<tr>
271 <td rowspan="3">BatchNormalizationLayer
272 <td rowspan="3" style="width:200px;"> Layer to perform batch normalization.
273 <td rowspan="3">
274 <ul>
275 <li>N/A
276 </ul>
277 <td>CpuRef
278 <td>
279 <ul>
280 <li>All
281 </ul>
282 <td>
283 <table>
284 <tr><th>
285 <tr><td>BFLOAT16
286 <tr><td>FLOAT16
287 <tr><td>FLOAT32
288 <tr><td>QASYMMS8
289 <tr><td>QASYMMU8
290 <tr><td>QSYMMS16
291 </table>
292<tr>
293 <td>CpuAcc
294 <td>
295 <ul>
296 <li>NHWC
297 <li>NCHW
298 </ul>
299 <td>
300 <table>
301 <tr><th>
302 <tr><td>FLOAT32
303 <tr><td>FLOAT16
304 </table>
305<tr>
306 <td>GpuAcc
307 <td>
308 <ul>
309 <li>NHWC
310 <li>NCHW
311 </ul>
312 <td>
313 <table>
314 <tr><th>
315 <tr><td>FLOAT32
316 <tr><td>FLOAT16
317 </table>
318<tr>
319 <td rowspan="3">BatchToSpaceNdLayer
320 <td rowspan="3" style="width:200px;"> Layer to perform a batch to space transformation.
321 <td rowspan="3">
322 <ul>
323 <li>ANEURALNETWORKS_BATCH_TO_SPACE_ND
324 </ul>
325 <td>CpuRef
326 <td>
327 <ul>
328 <li>All
329 </ul>
330 <td>
331 <table>
332 <tr><th>
333 <tr><td>BFLOAT16
334 <tr><td>FLOAT16
335 <tr><td>FLOAT32
336 <tr><td>QASYMMS8
337 <tr><td>QASYMMU8
338 <tr><td>QSYMMS16
339 </table>
340<tr>
341 <td>CpuAcc
342 <td>
343 <ul>
344 <li>NHWC
345 <li>NCHW
346 </ul>
347 <td>
348 <table>
349 <tr><th>
350 <tr><td>All
351 </table>
352<tr>
353 <td>GpuAcc
354 <td>
355 <ul>
356 <li>NHWC
357 <li>NCHW
358 </ul>
359 <td>
360 <table>
361 <tr><th>
362 <tr><td>All
363 </table>
364<tr>
365 <td rowspan="3">CastLayer
366 <td rowspan="3" style="width:200px;"> Layer to cast a tensor to a type.
367 <td rowspan="3">
368 <ul>
369 <li>ANEURALNETWORKS_CAST
370 </ul>
371 <td>CpuRef
372 <td>
373 <ul>
374 <li>All
375 </ul>
376 <td>
377 <table>
378 <tr><th>
379 <tr><td>BFLOAT16
380 <tr><td>FLOAT16
381 <tr><td>FLOAT32
382 <tr><td>QSYMMS8
383 <tr><td>QASYMMS8
384 <tr><td>QASYMMU8
385 <tr><td>QSYMMS16
386 <tr><td>SIGNED32
387 </table>
388<tr>
389 <td>CpuAcc
390 <td>
391 <ul>
392 <li>All
393 </ul>
394 <td>
395 <table>
396 <tr><th>
397 <tr><td>QASYMMS8
398 <tr><td>QASYMMU8
399 <tr><td>FLOAT16
400 <tr><td>SIGNED32
401 <tr><td>FLOAT32
402 </table>
403<tr>
404 <td>GpuAcc
405 <td>
406 <ul>
407 <li>All
408 </ul>
409 <td>
410 <table>
411 <tr><th>
412 <tr><td>QASYMMS8
413 <tr><td>QASYMMU8
414 <tr><td>SIGNED32
415 <tr><td>FLOAT16
416 <tr><td>FLOAT32
417 </table>
418<tr>
Teresa Charlincd203852021-09-24 18:15:39 +0100[diff] [blame]419 <td rowspan="3">ChannelShuffleLayer
420 <td rowspan="3" style="width:200px;"> Layer to reorganize the channels of a tensor.
421 <td rowspan="3">
422 <ul>
423 <li>ANEURALNETWORKS_CHANNEL_SHUFFLE
424 </ul>
425 <td>CpuRef
426 <td>
427 <ul>
428 <li>All
429 </ul>
430 <td>
431 <table>
432 <tr><th>
433 <tr><td>FLOAT16
434 <tr><td>FLOAT32
435 <tr><td>QSYMMS8
436 <tr><td>QASYMMS8
437 <tr><td>QASYMMU8
438 </table>
439<tr>
440 <td>CpuAcc
441 <td>
442 <ul>
443 <li>All
444 </ul>
445 <td>
446 <table>
447 <tr><th>
448 <tr><td>QASYMMS8
449 <tr><td>QASYMMU8
450 <tr><td>FLOAT16
451 <tr><td>FLOAT32
452 </table>
453<tr>
454 <td>GpuAcc
455 <td>
456 <ul>
457 <li>All
458 </ul>
459 <td>
460 <table>
461 <tr><th>
462 <tr><td>QASYMMS8
463 <tr><td>QASYMMU8
464 <tr><td>FLOAT16
465 <tr><td>FLOAT32
466 </table>
467<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]468 <td rowspan="3">ComparisonLayer
469 <td rowspan="3" style="width:200px;"> Layer to compare 2 tensors.
470 <td rowspan="3">
471 <ul>
472 <li>ANEURALNETWORKS_EQUAL
473 <li>ANEURALNETWORKS_GREATER
474 <li>ANEURALNETWORKS_GREATER_EQUAL
475 <li>ANEURALNETWORKS_LESS
476 <li>ANEURALNETWORKS_LESS_EQUAL
477 <li>ANEURALNETWORKS_NOT_EQUAL
478 </ul>
479 <td>CpuRef
480 <td>
481 <ul>
482 <li>All
483 </ul>
484 <td>
485 <table>
486 <tr><th>
487 <tr><td>BFLOAT16
488 <tr><td>FLOAT16
489 <tr><td>FLOAT32
490 <tr><td>BOOLEAN
491 <tr><td>QASYMMS8
492 <tr><td>QASYMMU8
493 <tr><td>QSYMMS16
494 <tr><td>SIGNED32
495 </table>
496<tr>
497 <td>CpuAcc
498 <td>
499 <ul>
500 <li>All
501 </ul>
502 <td>
503 <table>
504 <tr><th>
505 <tr><td>All
506 </table>
507<tr>
508 <td>GpuAcc
509 <td>
510 <ul>
511 <li>All
512 </ul>
513 <td>
514 <table>
515 <tr><th>
516 <tr><td>All
517 </table>
518<tr>
519 <td rowspan="3">ConcatLayer
520 <td rowspan="3" style="width:200px;"> Layer to concatenate tensors along a given axis.
521 <td rowspan="3">
522 <ul>
523 <li>ANEURALNETWORKS_CONCATENATION
524 </ul>
525 <td>CpuRef
526 <td>
527 <ul>
528 <li>All
529 </ul>
530 <td>
531 <table>
532 <tr><th>
533 <tr><td>BFLOAT16
534 <tr><td>FLOAT16
535 <tr><td>FLOAT32
536 <tr><td>QASYMMS8
537 <tr><td>QASYMMU8
538 <tr><td>QSYMMS16
539 </table>
540<tr>
541 <td>CpuAcc
542 <td>
543 <ul>
544 <li>All
545 </ul>
546 <td>
547 <table>
548 <tr><th>
549 <tr><td>QASYMMU8
550 <tr><td>QASYMMS8
551 <tr><td>FLOAT16
552 <tr><td>FLOAT32
553 </table>
554<tr>
555 <td>GpuAcc
556 <td>
557 <ul>
558 <li>All
559 </ul>
560 <td>
561 <table>
562 <tr><th>
563 <tr><td>QASYMMU8
564 <tr><td>QASYMMS8
565 <tr><td>FLOAT16
566 <tr><td>FLOAT32
567 </table>
568<tr>
569 <td rowspan="3">ConstantLayer
570 <td rowspan="3" style="width:200px;"> Layer to provide a constant tensor.
571 <td rowspan="3">
572 <ul>
573 <li>N/A
574 </ul>
575 <td>CpuRef
576 <td>
577 <ul>
578 <li>All
579 </ul>
580 <td>
581 <table>
582 <tr><th>
583 <tr><td>BFLOAT16
584 <tr><td>FLOAT16
585 <tr><td>FLOAT32
586 <tr><td>QASYMMS8
587 <tr><td>QASYMMU8
588 <tr><td>QSYMMS8
589 <tr><td>QSYMMS16
590 <tr><td>SIGNED32
591 </table>
592<tr>
593 <td>CpuAcc
594 <td>
595 <ul>
596 <li>All
597 </ul>
598 <td>
599 <table>
600 <tr><th>
601 <tr><td>All
602 </table>
603<tr>
604 <td>GpuAcc
605 <td>
606 <ul>
607 <li>All
608 </ul>
609 <td>
610 <table>
611 <tr><th>
612 <tr><td>All
613 </table>
614<tr>
615 <td rowspan="3">ConvertBf16ToFp32Layer
616 <td rowspan="3" style="width:200px;"> Layer to convert BFloat16 tensor to Float32 tensor.
617 <td rowspan="3">
618 <ul>
619 <li>N/A
620 </ul>
621 <td>CpuRef
622 <td>
623 <ul>
624 <li>All
625 </ul>
626 <td>
627 <table>
628 <tr><th>
629 <tr><td>BFLOAT16
630 <tr><td>FLOAT32
631 </table>
632<tr>
633 <td>CpuAcc
634 <td>
635 <ul>
636 <li>All
637 </ul>
638 <td>
639 <table>
640 <tr><th>
641 <tr><td>BFLOAT16
642 <tr><td>FLOAT32
643 </table>
644<tr>
645 <td>GpuAcc
646 <td>
647 <ul>
648 <li>All
649 </ul>
650 <td>
651 <table>
652 <tr><th>
653 <tr><td>BFLOAT16
654 <tr><td>FLOAT32
655 </table>
656<tr>
657 <td rowspan="3">ConvertFp16ToFp32Layer
658 <td rowspan="3" style="width:200px;"> Layer to convert Float16 tensor to Float32 tensor.
659 <td rowspan="3">
660 <ul>
661 <li>N/A
662 </ul>
663 <td>CpuRef
664 <td>
665 <ul>
666 <li>All
667 </ul>
668 <td>
669 <table>
670 <tr><th>
671 <tr><td>FLOAT16
672 <tr><td>FLOAT32
673 </table>
674<tr>
675 <td>CpuAcc
676 <td>
677 <ul>
678 <li>All
679 </ul>
680 <td>
681 <table>
682 <tr><th>
683 <tr><td>FLOAT16
684 <tr><td>FLOAT32
685 </table>
686<tr>
687 <td>GpuAcc
688 <td>
689 <ul>
690 <li>All
691 </ul>
692 <td>
693 <table>
694 <tr><th>
695 <tr><td>FLOAT16
696 <tr><td>FLOAT32
697 </table>
698<tr>
699 <td rowspan="3">ConvertFp32ToBf16Layer
700 <td rowspan="3" style="width:200px;"> Layer to convert Float32 tensor to BFloat16 tensor.
701 <td rowspan="3">
702 <ul>
703 <li>N/A
704 </ul>
705 <td>CpuRef
706 <td>
707 <ul>
708 <li>All
709 </ul>
710 <td>
711 <table>
712 <tr><th>
713 <tr><td>BFLOAT16
714 <tr><td>FLOAT32
715 </table>
716<tr>
717 <td>CpuAcc
718 <td>
719 <ul>
720 <li>All
721 </ul>
722 <td>
723 <table>
724 <tr><th>
725 <tr><td>BFLOAT16
726 <tr><td>FLOAT32
727 </table>
728<tr>
729 <td>GpuAcc
730 <td>
731 <ul>
732 <li>All
733 </ul>
734 <td>
735 <table>
736 <tr><th>
737 <tr><td>BFLOAT16
738 <tr><td>FLOAT32
739 </table>
740<tr>
741 <td rowspan="3">ConvertFp32ToFp16Layer
742 <td rowspan="3" style="width:200px;"> Layer to convert Float32 tensor to Float16 tensor.
743 <td rowspan="3">
744 <ul>
745 <li>N/A
746 </ul>
747 <td>CpuRef
748 <td>
749 <ul>
750 <li>All
751 </ul>
752 <td>
753 <table>
754 <tr><th>
755 <tr><td>FLOAT16
756 <tr><td>FLOAT32
757 </table>
758<tr>
759 <td>CpuAcc
760 <td>
761 <ul>
762 <li>All
763 </ul>
764 <td>
765 <table>
766 <tr><th>
767 <tr><td>FLOAT16
768 <tr><td>FLOAT32
769 </table>
770<tr>
771 <td>GpuAcc
772 <td>
773 <ul>
774 <li>All
775 </ul>
776 <td>
777 <table>
778 <tr><th>
779 <tr><td>FLOAT16
780 <tr><td>FLOAT32
781 </table>
782<tr>
783 <td rowspan="3">Convolution2dLayer
784 <td rowspan="3" style="width:200px;"> Layer to compute a convolution operation.
785 <td rowspan="3">
786 <ul>
787 <li>ANEURALNETWORKS_CONV_2D
788 <li>ANEURALNETWORKS_GROUPED_CONV_2D
789 </ul>
790 <td>CpuRef
791 <td>
792 <ul>
793 <li>All
794 </ul>
795 <td>
796 <table>
797 <tr><th>
798 <tr><td>BFLOAT16
799 <tr><td>FLOAT16
800 <tr><td>FLOAT32
801 <tr><td>QASYMMS8
802 <tr><td>QASYMMU8
803 <tr><td>QSYMMS16
804 </table>
805<tr>
806 <td>CpuAcc
807 <td>
808 <ul>
809 <li>NHWC
810 <li>NCHW
811 </ul>
812 <td>
813 <table>
814 <tr><th>
815 <tr><td>SIGNED32
816 <tr><td>FLOAT16
817 <tr><td>FLOAT32
818 <tr><td>QASYMMU8
819 <tr><td>QASYMMS8
820 <tr><td>QUANTIZEDSYMM8PERAXIS
821 </table>
822<tr>
823 <td>GpuAcc
824 <td>
825 <ul>
826 <li>NHWC
827 <li>NCHW
828 </ul>
829 <td>
830 <table>
831 <tr><th>
832 <tr><td>SIGNED32
833 <tr><td>FLOAT16
834 <tr><td>FLOAT32
835 <tr><td>QASYMMU8
836 <tr><td>QASYMMS8
837 <tr><td>QUANTIZEDSYMM8PERAXIS
838 </table>
839<tr>
Matthew Sloyanb63a3112021-09-08 13:05:51 +0100[diff] [blame^]840 <td rowspan="3">Convolution3dLayer
841 <td rowspan="3" style="width:200px;"> Layer to compute a 3D convolution operation.
842 <td rowspan="3">
843 <ul>
844 <li>N/A
845 </ul>
846 <td>CpuRef
847 <td>
848 <ul>
849 <li>NDHWC
850 </ul>
851 <td>
852 <table>
853 <tr><th>
854 <tr><td>BFLOAT16
855 <tr><td>FLOAT16
856 <tr><td>FLOAT32
857 <tr><td>QASYMMS8
858 <tr><td>QASYMMU8
859 <tr><td>QSYMMS8
860 <tr><td>QSYMMS16
861 </table>
862<tr>
863 <td>CpuAcc
864 <td>
865 <ul>
866 <li>N/A
867 </ul>
868 <td>
869 <ul>
870 <li>N/A
871 </ul>
872<tr>
873 <td>GpuAcc
874 <td>
875 <ul>
876 <li>N/A
877 </ul>
878 <td>
879 <ul>
880 <li>N/A
881 </ul>
882<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]883 <td rowspan="1">DebugLayer
884 <td rowspan="1" style="width:200px;"> Layer to print out inter layer tensor information.
885 <td rowspan="1">
886 <ul>
887 <li>N/A
888 </ul>
889 <td>CpuRef
890 <td>
891 <ul>
892 <li>All
893 </ul>
894 <td>
895 <table>
896 <tr><th>
897 <tr><td>BFLOAT16
898 <tr><td>FLOAT16
899 <tr><td>FLOAT32
900 <tr><td>QASYMMS8
901 <tr><td>QASYMMU8
902 <tr><td>QSYMMS8
903 <tr><td>QSYMMS16
904 <tr><td>SIGNED32
905 </table>
906<tr>
907 <td rowspan="3">DepthToSpaceLayer
908 <td rowspan="3" style="width:200px;"> Layer to perform Depth to Space transformation.
909 <td rowspan="3">
910 <ul>
911 <li>ANEURALNETWORKS_DEPTH_TO_SPACE
912 </ul>
913 <td>CpuRef
914 <td>
915 <ul>
916 <li>All
917 </ul>
918 <td>
919 <table>
920 <tr><th>
921 <tr><td>BFLOAT16
922 <tr><td>FLOAT16
923 <tr><td>FLOAT32
924 <tr><td>QASYMMS8
925 <tr><td>QASYMMU8
926 <tr><td>QSYMMS16
927 </table>
928<tr>
929 <td>CpuAcc
930 <td>
931 <ul>
932 <li>NHWC
933 <li>NCHW
934 </ul>
935 <td>
936 <table>
937 <tr><th>
938 <tr><td>All
939 </table>
940<tr>
941 <td>GpuAcc
942 <td>
943 <ul>
944 <li>NHWC
945 <li>NCHW
946 </ul>
947 <td>
948 <table>
949 <tr><th>
950 <tr><td>All
951 </table>
952<tr>
953 <td rowspan="3">DepthwiseConvolution2dLayer
954 <td rowspan="3" style="width:200px;"> Layer to compute a deconvolution or transpose convolution.
955 <td rowspan="3">
956 <ul>
957 <li>ANEURALNETWORKS_DEPTHWISE_CONV_2D
958 </ul>
959 <td>CpuRef
960 <td>
961 <ul>
962 <li>All
963 </ul>
964 <td>
965 <table>
966 <tr><th>
967 <tr><td>BFLOAT16
968 <tr><td>FLOAT16
969 <tr><td>FLOAT32
970 <tr><td>QASYMMS8
971 <tr><td>QASYMMU8
972 <tr><td>QSYMMS8
973 <tr><td>QSYMMS16
974 </table>
975<tr>
976 <td>CpuAcc
977 <td>
978 <ul>
979 <li>NHWC
980 <li>NCHW
981 </ul>
982 <td>
983 <table>
984 <tr><th>
985 <tr><td>FLOAT16
986 <tr><td>FLOAT32
987 <tr><td>SIGNED32
988 <tr><td>QASYMMU8
989 <tr><td>QASYMMS8
990 <tr><td>QUANTIZEDSYMM8PERAXIS
991 </table>
992<tr>
993 <td>GpuAcc
994 <td>
995 <ul>
996 <li>NHWC
997 <li>NCHW
998 </ul>
999 <td>
1000 <table>
1001 <tr><th>
1002 <tr><td>FLOAT16
1003 <tr><td>FLOAT32
1004 <tr><td>SIGNED32
1005 <tr><td>QASYMMU8
1006 <tr><td>QASYMMS8
1007 <tr><td>QUANTIZEDSYMM8PERAXIS
1008 </table>
1009<tr>
1010 <td rowspan="3">DequantizeLayer
1011 <td rowspan="3" style="width:200px;"> Layer to dequantize the values in a tensor.
1012 <td rowspan="3">
1013 <ul>
1014 <li>ANEURALNETWORKS_DEQUANTIZE
1015 </ul>
1016 <td>CpuRef
1017 <td>
1018 <ul>
1019 <li>All
1020 </ul>
1021 <td>
1022 <table>
1023 <tr><th>
1024 <tr><td>QASYMMS8
1025 <tr><td>QASYMMU8
1026 <tr><td>QSYMMS8
1027 <tr><td>QSYMMS16
1028 </table>
1029<tr>
1030 <td>CpuAcc
1031 <td>
1032 <ul>
1033 <li>All
1034 </ul>
1035 <td>
1036 <table>
1037 <tr><th>
1038 <tr><td>FLOAT16
1039 <tr><td>FLOAT32
1040 <tr><td>QASYMMU8
1041 <tr><td>QASYMMS8
1042 <tr><td>QUANTIZEDSYMM8PERAXIS
1043 <tr><td>QSYMMS8
1044 <tr><td>QSYMMS16
1045 </table>
1046<tr>
1047 <td>GpuAcc
1048 <td>
1049 <ul>
1050 <li>All
1051 </ul>
1052 <td>
1053 <table>
1054 <tr><th>
1055 <tr><td>FLOAT16
1056 <tr><td>FLOAT32
1057 <tr><td>QASYMMU8
1058 <tr><td>QASYMMS8
1059 <tr><td>QUANTIZEDSYMM8PERAXIS
1060 <tr><td>QSYMMS8
1061 <tr><td>QSYMMS16
1062 </table>
1063<tr>
1064 <td rowspan="2">DetectionPostProcessLayer
1065 <td rowspan="2" style="width:200px;"> Layer to generate the detection output based on center size encoded boxes, class prediction and anchors by doing non maximum suppression (NMS).
1066 <td rowspan="2">
1067 <ul>
1068 <li>ANEURALNETWORKS_DETECTION_POSTPROCESSING
1069 </ul>
1070 <td>CpuRef
1071 <td>
1072 <ul>
1073 <li>All
1074 </ul>
1075 <td>
1076 <table>
1077 <tr><th>
1078 <tr><td>BFLOAT16
1079 <tr><td>FLOAT16
1080 <tr><td>FLOAT32
1081 <tr><td>QASYMMS8
1082 <tr><td>QASYMMU8
1083 <tr><td>QSYMMS16
1084 </table>
1085<tr>
1086 <td>CpuAcc
1087 <td>
1088 <ul>
1089 <li>All
1090 </ul>
1091 <td>
1092 <table>
1093 <tr><th>
1094 <tr><td>QASYMMU8
1095 <tr><td>QASYMMS8
1096 <tr><td>FLOAT32
1097 </table>
1098<tr>
1099 <td rowspan="3">DivisionLayer
1100 <td rowspan="3" style="width:200px;"> Layer to divide 2 tensors.
1101 <td rowspan="3">
1102 <ul>
1103 <li>ANEURALNETWORKS_DIV
1104 </ul>
1105 <td>CpuRef
1106 <td>
1107 <ul>
1108 <li>All
1109 </ul>
1110 <td>
1111 <table>
1112 <tr><th>
1113 <tr><td>BFLOAT16
1114 <tr><td>FLOAT16
1115 <tr><td>FLOAT32
1116 <tr><td>QASYMMS8
1117 <tr><td>QASYMMU8
1118 <tr><td>QSYMMS16
1119 <tr><td>SIGNED32
1120 </table>
1121<tr>
1122 <td>CpuAcc
1123 <td>
1124 <ul>
1125 <li>All
1126 </ul>
1127 <td>
1128 <table>
1129 <tr><th>
1130 <tr><td>FLOAT16
1131 <tr><td>FLOAT32
1132 </table>
1133<tr>
1134 <td>GpuAcc
1135 <td>
1136 <ul>
1137 <li>All
1138 </ul>
1139 <td>
1140 <table>
1141 <tr><th>
1142 <tr><td>FLOAT16
1143 <tr><td>FLOAT32
1144 </table>
1145<tr>
1146 <td rowspan="3">ElementwiseBaseLayer
1147 <td rowspan="3" style="width:200px;"> Layer to perform Add - Div - Max - Min - Mul operations.
1148 <td rowspan="3">
1149 <ul>
1150 <li>ANEURALNETWORKS_ADD
1151 <li>ANEURALNETWORKS_DIV
1152 <li>ANEURALNETWORKS_MAXIMUM
1153 <li>ANEURALNETWORKS_MINIMUM
1154 <li>ANEURALNETWORKS_MUL
1155 </ul>
1156 <td>CpuRef
1157 <td>
1158 <ul>
1159 <li>All
1160 </ul>
1161 <td>
1162 <table>
1163 <tr><th>
1164 <tr><td>BFLOAT16
1165 <tr><td>FLOAT16
1166 <tr><td>FLOAT32
1167 <tr><td>QASYMMS8
1168 <tr><td>QASYMMU8
1169 <tr><td>QSYMMS16
1170 <tr><td>SIGNED32
1171 </table>
1172<tr>
1173 <td>CpuAcc
1174 <td>
1175 <ul>
1176 <li>All
1177 </ul>
1178 <td>
1179 <table>
1180 <tr><th>
1181 <tr><td>QASYMMU8
1182 <tr><td>QASYMMS8
1183 <tr><td>QSYMMS16
1184 <tr><td>SIGNED32
1185 <tr><td>FLOAT16
1186 <tr><td>FLOAT32
1187 </table>
1188<tr>
1189 <td>GpuAcc
1190 <td>
1191 <ul>
1192 <li>All
1193 </ul>
1194 <td>
1195 <table>
1196 <tr><th>
1197 <tr><td>QASYMMU8
1198 <tr><td>QASYMMS8
1199 <tr><td>QSYMMS16
1200 <tr><td>SIGNED32
1201 <tr><td>FLOAT16
1202 <tr><td>FLOAT32
1203 </table>
1204<tr>
1205 <td rowspan="3">ElementwiseUnaryLayer
1206 <td rowspan="3" style="width:200px;"> Layer to perform Rsqrt - Exp - Neg - Log - Abs - Sin - Sqrt operations.
1207 <td rowspan="3">
1208 <ul>
1209 <li>ANEURALNETWORKS_ABS
1210 <li>ANEURALNETWORKS_EXP
1211 <li>ANEURALNETWORKS_LOG
1212 <li>ANEURALNETWORKS_NEG
1213 <li>ANEURALNETWORKS_RSQRT
1214 <li>ANEURALNETWORKS_SIN
1215 <li>ANEURALNETWORKS_SQRT
1216 </ul>
1217 <td>CpuRef
1218 <td>
1219 <ul>
1220 <li>All
1221 </ul>
1222 <td>
1223 <table>
1224 <tr><th>
1225 <tr><td>BFLOAT16
1226 <tr><td>FLOAT16
1227 <tr><td>FLOAT32
1228 <tr><td>QASYMMS8
1229 <tr><td>QASYMMU8
1230 <tr><td>QSYMMS16
1231 </table>
1232<tr>
1233 <td>CpuAcc
1234 <td>
1235 <ul>
1236 <li>All
1237 </ul>
1238 <td>
1239 <table>
1240 <tr><th>
1241 <tr><td>FLOAT16
1242 <tr><td>FLOAT32
1243 <tr><td>SIGNED32
1244 </table>
1245<tr>
1246 <td>GpuAcc
1247 <td>
1248 <ul>
1249 <li>All
1250 </ul>
1251 <td>
1252 <table>
1253 <tr><th>
1254 <tr><td>FLOAT16
1255 <tr><td>FLOAT32
1256 </table>
1257<tr>
1258 <td rowspan="1">FakeQuantizationLayer
1259 <td rowspan="1" style="width:200px;"> Layer to quantize float values and dequantize afterwards. The current implementation does not dequantize the values.
1260 <td rowspan="1">
1261 <ul>
1262 <li>N/A
1263 </ul>
1264 <td>CpuRef
1265 <td>
1266 <ul>
1267 <li>All
1268 </ul>
1269 <td>
1270 <table>
1271 <tr><th>
1272 <tr><td>FLOAT32
1273 </table>
1274<tr>
1275 <td rowspan="3">FillLayer
1276 <td rowspan="3" style="width:200px;"> Layer to set the values of a tensor with a given value.
1277 <td rowspan="3">
1278 <ul>
1279 <li>ANEURALNETWORKS_FILL
1280 </ul>
1281 <td>CpuRef
1282 <td>
1283 <ul>
1284 <li>All
1285 </ul>
1286 <td>
1287 <table>
1288 <tr><th>
1289 <tr><td>FLOAT16
1290 <tr><td>FLOAT32
1291 <tr><td>SIGNED32
1292 </table>
1293<tr>
1294 <td>CpuAcc
1295 <td>
1296 <ul>
1297 <li>All
1298 </ul>
1299 <td>
1300 <table>
1301 <tr><th>
1302 <tr><td>All
1303 </table>
1304<tr>
1305 <td>GpuAcc
1306 <td>
1307 <ul>
1308 <li>All
1309 </ul>
1310 <td>
1311 <table>
1312 <tr><th>
1313 <tr><td>All
1314 </table>
1315<tr>
1316 <td rowspan="3">FloorLayer
1317 <td rowspan="3" style="width:200px;"> Layer to round the value to the lowest whole number.
1318 <td rowspan="3">
1319 <ul>
1320 <li>ANEURALNETWORKS_FLOOR
1321 </ul>
1322 <td>CpuRef
1323 <td>
1324 <ul>
1325 <li>All
1326 </ul>
1327 <td>
1328 <table>
1329 <tr><th>
1330 <tr><td>BFLOAT16
1331 <tr><td>FLOAT16
1332 <tr><td>FLOAT32
1333 </table>
1334<tr>
1335 <td>CpuAcc
1336 <td>
1337 <ul>
1338 <li>All
1339 </ul>
1340 <td>
1341 <table>
1342 <tr><th>
1343 <tr><td>FLOAT32
1344 <tr><td>FLOAT16
1345 </table>
1346<tr>
1347 <td>GpuAcc
1348 <td>
1349 <ul>
1350 <li>All
1351 </ul>
1352 <td>
1353 <table>
1354 <tr><th>
1355 <tr><td>FLOAT32
1356 <tr><td>FLOAT16
1357 </table>
1358<tr>
1359 <td rowspan="3">FullyConnectedLayer
1360 <td rowspan="3" style="width:200px;"> Layer to perform a fully connected / dense operation.
1361 <td rowspan="3">
1362 <ul>
1363 <li>ANEURALNETWORKS_FULLY_CONNECTED
1364 </ul>
1365 <td>CpuRef
1366 <td>
1367 <ul>
1368 <li>All
1369 </ul>
1370 <td>
1371 <table>
1372 <tr><th>
1373 <tr><td>BFLOAT16
1374 <tr><td>FLOAT16
1375 <tr><td>FLOAT32
1376 <tr><td>QASYMMS8
1377 <tr><td>QASYMMU8
1378 <tr><td>QSYMMS16
1379 </table>
1380<tr>
1381 <td>CpuAcc
1382 <td>
1383 <ul>
1384 <li>NHWC
1385 <li>NCHW
1386 </ul>
1387 <td>
1388 <table>
1389 <tr><th>
1390 <tr><td>SIGNED32
1391 <tr><td>FLOAT16
1392 <tr><td>FLOAT32
1393 <tr><td>QASYMMU8
1394 <tr><td>QASYMMS8
1395 </table>
1396<tr>
1397 <td>GpuAcc
1398 <td>
1399 <ul>
1400 <li>NHWC
1401 <li>NCHW
1402 </ul>
1403 <td>
1404 <table>
1405 <tr><th>
1406 <tr><td>SIGNED32
1407 <tr><td>FLOAT16
1408 <tr><td>FLOAT32
1409 <tr><td>QASYMMU8
1410 <tr><td>QASYMMS8
1411 </table>
1412<tr>
1413 <td rowspan="3">GatherLayer
1414 <td rowspan="3" style="width:200px;"> Layer to perform the gather operation along the chosen axis.
1415 <td rowspan="3">
1416 <ul>
1417 <li>ANEURALNETWORKS_GATHER
1418 </ul>
1419 <td>CpuRef
1420 <td>
1421 <ul>
1422 <li>All
1423 </ul>
1424 <td>
1425 <table>
1426 <tr><th>
1427 <tr><td>BFLOAT16
1428 <tr><td>FLOAT16
1429 <tr><td>FLOAT32
1430 <tr><td>QASYMMS8
1431 <tr><td>QASYMMU8
1432 <tr><td>QSYMMS16
1433 <tr><td>SIGNED32
1434 </table>
1435<tr>
1436 <td>CpuAcc
1437 <td>
1438 <ul>
1439 <li>All
1440 </ul>
1441 <td>
1442 <table>
1443 <tr><th>
1444 <tr><td>All
1445 </table>
1446<tr>
1447 <td>GpuAcc
1448 <td>
1449 <ul>
1450 <li>All
1451 </ul>
1452 <td>
1453 <table>
1454 <tr><th>
1455 <tr><td>All
1456 </table>
1457<tr>
1458 <td rowspan="1">InputLayer
1459 <td rowspan="1" style="width:200px;"> Special layer used to provide input data to the computational network.
1460 <td rowspan="1">
1461 <ul>
1462 <li>N/A
1463 </ul>
1464 <td>All
1465 <td>
1466 <ul>
1467 <li>All
1468 </ul>
1469 <td>
1470 <table>
1471 <tr><th>
1472 <tr><td>All
1473 </table>
1474<tr>
1475 <td rowspan="3">InstanceNormalizationLayer
1476 <td rowspan="3" style="width:200px;"> Layer to perform an instance normalization on a given axis.
1477 <td rowspan="3">
1478 <ul>
1479 <li>ANEURALNETWORKS_INSTANCE_NORMALIZATION
1480 </ul>
1481 <td>CpuRef
1482 <td>
1483 <ul>
1484 <li>All
1485 </ul>
1486 <td>
1487 <table>
1488 <tr><th>
1489 <tr><td>BFLOAT16
1490 <tr><td>FLOAT16
1491 <tr><td>FLOAT32
1492 </table>
1493<tr>
1494 <td>CpuAcc
1495 <td>
1496 <ul>
1497 <li>NHWC
1498 <li>NCHW
1499 </ul>
1500 <td>
1501 <table>
1502 <tr><th>
1503 <tr><td>FLOAT16
1504 <tr><td>FLOAT32
1505 </table>
1506<tr>
1507 <td>GpuAcc
1508 <td>
1509 <ul>
1510 <li>NHWC
1511 <li>NCHW
1512 </ul>
1513 <td>
1514 <table>
1515 <tr><th>
1516 <tr><td>FLOAT16
1517 <tr><td>FLOAT32
1518 </table>
1519<tr>
1520 <td rowspan="3">L2NormalizationLayer
1521 <td rowspan="3" style="width:200px;"> Layer to perform an L2 normalization on a given axis.
1522 <td rowspan="3">
1523 <ul>
1524 <li>ANEURALNETWORKS_L2_NORMALIZATION
1525 </ul>
1526 <td>CpuRef
1527 <td>
1528 <ul>
1529 <li>All
1530 </ul>
1531 <td>
1532 <table>
1533 <tr><th>
1534 <tr><td>BFLOAT16
1535 <tr><td>FLOAT16
1536 <tr><td>FLOAT32
1537 <tr><td>QASYMMS8
1538 <tr><td>QASYMMU8
1539 <tr><td>QSYMMS16
1540 </table>
1541<tr>
1542 <td>CpuAcc
1543 <td>
1544 <ul>
1545 <li>NHWC
1546 <li>NCHW
1547 </ul>
1548 <td>
1549 <table>
1550 <tr><th>
1551 <tr><td>FLOAT16
1552 <tr><td>FLOAT32
1553 </table>
1554<tr>
1555 <td>GpuAcc
1556 <td>
1557 <ul>
1558 <li>NHWC
1559 <li>NCHW
1560 </ul>
1561 <td>
1562 <table>
1563 <tr><th>
1564 <tr><td>FLOAT16
1565 <tr><td>FLOAT32
1566 </table>
1567<tr>
1568 <td rowspan="3">LogSoftmaxLayer
1569 <td rowspan="3" style="width:200px;"> Layer to perform the log softmax activations given logits.
1570 <td rowspan="3">
1571 <ul>
1572 <li>N/A
1573 </ul>
1574 <td>CpuRef
1575 <td>
1576 <ul>
1577 <li>All
1578 </ul>
1579 <td>
1580 <table>
1581 <tr><th>
1582 <tr><td>BFLOAT16
1583 <tr><td>FLOAT16
1584 <tr><td>FLOAT32
1585 </table>
1586<tr>
1587 <td>CpuAcc
1588 <td>
1589 <ul>
1590 <li>All
1591 </ul>
1592 <td>
1593 <table>
1594 <tr><th>
1595 <tr><td>QASYMMU8
1596 <tr><td>QASYMMS8
1597 <tr><td>FLOAT16
1598 <tr><td>FLOAT32
1599 </table>
1600<tr>
1601 <td>GpuAcc
1602 <td>
1603 <ul>
1604 <li>All
1605 </ul>
1606 <td>
1607 <table>
1608 <tr><th>
1609 <tr><td>QASYMMU8
1610 <tr><td>QASYMMS8
1611 <tr><td>FLOAT16
1612 <tr><td>FLOAT32
1613 </table>
1614<tr>
1615 <td rowspan="3">LogicalBinaryLayer
1616 <td rowspan="3" style="width:200px;"> Layer to perform Logical AND - Logical NOT - Logical OR operations.
1617 <td rowspan="3">
1618 <ul>
1619 <li>ANEURALNETWORKS_LOGICAL_AND
1620 <li>ANEURALNETWORKS_LOGICAL_NOT
1621 <li>ANEURALNETWORKS_LOGICAL_OR
1622 </ul>
1623 <td>CpuRef
1624 <td>
1625 <ul>
1626 <li>All
1627 </ul>
1628 <td>
1629 <table>
1630 <tr><th>
1631 <tr><td>BOOLEAN
1632 </table>
1633<tr>
1634 <td>CpuAcc
1635 <td>
1636 <ul>
1637 <li>All
1638 </ul>
1639 <td>
1640 <table>
1641 <tr><th>
1642 <tr><td>BOOLEAN
1643 </table>
1644<tr>
1645 <td>GpuAcc
1646 <td>
1647 <ul>
1648 <li>All
1649 </ul>
1650 <td>
1651 <table>
1652 <tr><th>
1653 <tr><td>BOOLEAN
1654 </table>
1655<tr>
1656 <td rowspan="3">LstmLayer
1657 <td rowspan="3" style="width:200px;"> Layer to perform a single time step in a Long Short-Term Memory (LSTM) operation.
1658 <td rowspan="3">
1659 <ul>
1660 <li>ANEURALNETWORKS_LSTM
1661 </ul>
1662 <td>CpuRef
1663 <td>
1664 <ul>
1665 <li>All
1666 </ul>
1667 <td>
1668 <table>
1669 <tr><th>
1670 <tr><td>BFLOAT16
1671 <tr><td>FLOAT16
1672 <tr><td>QSYMMS16
1673 </table>
1674<tr>
1675 <td>CpuAcc
1676 <td>
1677 <ul>
1678 <li>All
1679 </ul>
1680 <td>
1681 <table>
1682 <tr><th>
1683 <tr><td>FLOAT16
1684 <tr><td>FLOAT32
1685 </table>
1686<tr>
1687 <td>GpuAcc
1688 <td>
1689 <ul>
1690 <li>All
1691 </ul>
1692 <td>
1693 <table>
1694 <tr><th>
1695 <tr><td>FLOAT16
1696 <tr><td>FLOAT32
1697 </table>
1698<tr>
1699 <td rowspan="3">MapLayer
1700 <td rowspan="3" style="width:200px;"> Layer to perform map operation on tensor.
1701 <td rowspan="3">
1702 <ul>
1703 <li>N/A
1704 </ul>
1705 <td>CpuRef
1706 <td>
1707 <ul>
1708 <li>All
1709 </ul>
1710 <td>
1711 <table>
1712 <tr><th>
1713 <tr><td>All
1714 </table>
1715<tr>
1716 <td>CpuAcc
1717 <td>
1718 <ul>
1719 <li>All
1720 </ul>
1721 <td>
1722 <table>
1723 <tr><th>
1724 <tr><td>All
1725 </table>
1726<tr>
1727 <td>GpuAcc
1728 <td>
1729 <ul>
1730 <li>All
1731 </ul>
1732 <td>
1733 <table>
1734 <tr><th>
1735 <tr><td>All
1736 </table>
1737<tr>
1738 <td rowspan="3">MaximumLayer
1739 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise maximum of two tensors.
1740 <td rowspan="3">
1741 <ul>
1742 <li>N/A
1743 </ul>
1744 <td>CpuRef
1745 <td>
1746 <ul>
1747 <li>All
1748 </ul>
1749 <td>
1750 <table>
1751 <tr><th>
1752 <tr><td>BFLOAT16
1753 <tr><td>FLOAT16
1754 <tr><td>FLOAT32
1755 <tr><td>QASYMMS8
1756 <tr><td>QASYMMU8
1757 <tr><td>QSYMMS16
1758 <tr><td>SIGNED32
1759 </table>
1760<tr>
1761 <td>CpuAcc
1762 <td>
1763 <ul>
1764 <li>All
1765 </ul>
1766 <td>
1767 <table>
1768 <tr><th>
1769 <tr><td>QASYMMU8
1770 <tr><td>QASYMMS8
1771 <tr><td>FLOAT16
1772 <tr><td>FLOAT32
1773 <tr><td>SIGNED32
1774 </table>
1775<tr>
1776 <td>GpuAcc
1777 <td>
1778 <ul>
1779 <li>All
1780 </ul>
1781 <td>
1782 <table>
1783 <tr><th>
1784 <tr><td>QASYMMU8
1785 <tr><td>QASYMMS8
1786 <tr><td>QSYMMS16
1787 <tr><td>FLOAT16
1788 <tr><td>FLOAT32
1789 <tr><td>SIGNED32
1790 </table>
1791<tr>
1792 <td rowspan="3">MeanLayer
1793 <td rowspan="3" style="width:200px;"> Layer to perform reduce mean operation.
1794 <td rowspan="3">
1795 <ul>
1796 <li>ANEURALNETWORKS_MEAN
1797 </ul>
1798 <td>CpuRef
1799 <td>
1800 <ul>
1801 <li>All
1802 </ul>
1803 <td>
1804 <table>
1805 <tr><th>
1806 <tr><td>BFLOAT16
1807 <tr><td>FLOAT16
1808 <tr><td>FLOAT32
1809 <tr><td>QASYMMS8
1810 <tr><td>QASYMMU8
1811 <tr><td>QSYMMS16
1812 </table>
1813<tr>
1814 <td>CpuAcc
1815 <td>
1816 <ul>
1817 <li>All
1818 </ul>
1819 <td>
1820 <table>
1821 <tr><th>
1822 <tr><td>QASYMMU8
1823 <tr><td>QASYMMS8
1824 <tr><td>FLOAT16
1825 <tr><td>FLOAT32
1826 </table>
1827<tr>
1828 <td>GpuAcc
1829 <td>
1830 <ul>
1831 <li>All
1832 </ul>
1833 <td>
1834 <table>
1835 <tr><th>
1836 <tr><td>QASYMMU8
1837 <tr><td>QASYMMS8
1838 <tr><td>FLOAT16
1839 <tr><td>FLOAT32
1840 </table>
1841<tr>
1842 <td rowspan="3">MemCopyLayer
1843 <td rowspan="3" style="width:200px;"> Layer to perform memory copy operation.
1844 <td rowspan="3">
1845 <ul>
1846 <li>N/A
1847 </ul>
1848 <td>CpuRef
1849 <td>
1850 <ul>
1851 <li>All
1852 </ul>
1853 <td>
1854 <table>
1855 <tr><th>
1856 <tr><td>BFLOAT16
1857 <tr><td>FLOAT16
1858 <tr><td>FLOAT32
1859 <tr><td>QASYMMS8
1860 <tr><td>QASYMMU8
1861 <tr><td>QSYMMS16
1862 <tr><td>BOOLEAN
1863 </table>
1864<tr>
1865 <td>CpuAcc
1866 <td>
1867 <ul>
1868 <li>All
1869 </ul>
1870 <td>
1871 <table>
1872 <tr><th>
1873 <tr><td>All
1874 </table>
1875<tr>
1876 <td>GpuAcc
1877 <td>
1878 <ul>
1879 <li>All
1880 </ul>
1881 <td>
1882 <table>
1883 <tr><th>
1884 <tr><td>All
1885 </table>
1886<tr>
1887 <td rowspan="3">MemImportLayer
1888 <td rowspan="3" style="width:200px;"> Layer to perform memory import operation.
1889 <td rowspan="3">
1890 <ul>
1891 <li>N/A
1892 </ul>
1893 <td>CpuRef
1894 <td>
1895 <ul>
1896 <li>All
1897 </ul>
1898 <td>
1899 <table>
1900 <tr><th>
1901 <tr><td>All
1902 </table>
1903<tr>
1904 <td>CpuAcc
1905 <td>
1906 <ul>
1907 <li>All
1908 </ul>
1909 <td>
1910 <table>
1911 <tr><th>
1912 <tr><td>All
1913 </table>
1914<tr>
1915 <td>GpuAcc
1916 <td>
1917 <ul>
1918 <li>All
1919 </ul>
1920 <td>
1921 <table>
1922 <tr><th>
1923 <tr><td>All
1924 </table>
1925<tr>
1926 <td rowspan="3">MergeLayer
1927 <td rowspan="3" style="width:200px;"> Layer to concatenate tensors along a given axis.
1928 <td rowspan="3">
1929 <ul>
1930 <li>ANEURALNETWORKS_CONCATENATION
1931 </ul>
1932 <td>CpuRef
1933 <td>
1934 <ul>
1935 <li>All
1936 </ul>
1937 <td>
1938 <table>
1939 <tr><th>
1940 <tr><td>BFLOAT16
1941 <tr><td>FLOAT16
1942 <tr><td>FLOAT32
1943 <tr><td>QASYMMS8
1944 <tr><td>QASYMMU8
1945 <tr><td>QSYMMS16
1946 </table>
1947<tr>
1948 <td>CpuAcc
1949 <td>
1950 <ul>
1951 <li>All
1952 </ul>
1953 <td>
1954 <table>
1955 <tr><th>
1956 <tr><td>QASYMMU8
1957 <tr><td>QASYMMS8
1958 <tr><td>FLOAT16
1959 <tr><td>FLOAT32
1960 </table>
1961<tr>
1962 <td>GpuAcc
1963 <td>
1964 <ul>
1965 <li>All
1966 </ul>
1967 <td>
1968 <table>
1969 <tr><th>
1970 <tr><td>QASYMMU8
1971 <tr><td>QASYMMS8
1972 <tr><td>FLOAT16
1973 <tr><td>FLOAT32
1974 </table>
1975<tr>
1976 <td rowspan="3">MinimumLayer
1977 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise minimum of two tensors.
1978 <td rowspan="3">
1979 <ul>
1980 <li>ANEURALNETWORKS_MINIMUM
1981 </ul>
1982 <td>CpuRef
1983 <td>
1984 <ul>
1985 <li>All
1986 </ul>
1987 <td>
1988 <table>
1989 <tr><th>
1990 <tr><td>BFLOAT16
1991 <tr><td>FLOAT16
1992 <tr><td>FLOAT32
1993 <tr><td>QASYMMS8
1994 <tr><td>QASYMMU8
1995 <tr><td>QSYMMS16
1996 <tr><td>SIGNED32
1997 </table>
1998<tr>
1999 <td>CpuAcc
2000 <td>
2001 <ul>
2002 <li>All
2003 </ul>
2004 <td>
2005 <table>
2006 <tr><th>
2007 <tr><td>QASYMMU8
2008 <tr><td>QASYMMS8
2009 <tr><td>QSYMMS16
2010 <tr><td>FLOAT16
2011 <tr><td>FLOAT32
2012 </table>
2013<tr>
2014 <td>GpuAcc
2015 <td>
2016 <ul>
2017 <li>All
2018 </ul>
2019 <td>
2020 <table>
2021 <tr><th>
2022 <tr><td>QASYMMU8
2023 <tr><td>QASYMMS8
2024 <tr><td>QSYMMS16
2025 <tr><td>FLOAT16
2026 <tr><td>FLOAT32
2027 <tr><td>SIGNED32
2028 </table>
2029<tr>
2030 <td rowspan="3">MultiplicationLayer
2031 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise multiplication of two tensors.
2032 <td rowspan="3">
2033 <ul>
2034 <li>ANEURALNETWORKS_MUL
2035 </ul>
2036 <td>CpuRef
2037 <td>
2038 <ul>
2039 <li>All
2040 </ul>
2041 <td>
2042 <table>
2043 <tr><th>
2044 <tr><td>BFLOAT16
2045 <tr><td>FLOAT16
2046 <tr><td>FLOAT32
2047 <tr><td>QASYMMS8
2048 <tr><td>QASYMMU8
2049 <tr><td>QSYMMS16
2050 <tr><td>SIGNED32
2051 </table>
2052<tr>
2053 <td>CpuAcc
2054 <td>
2055 <ul>
2056 <li>All
2057 </ul>
2058 <td>
2059 <table>
2060 <tr><th>
2061 <tr><td>QASYMMU8
2062 <tr><td>QASYMMS8
2063 <tr><td>QSYMMS16
2064 <tr><td>SIGNED32
2065 <tr><td>FLOAT16
2066 <tr><td>FLOAT32
2067 </table>
2068<tr>
2069 <td>GpuAcc
2070 <td>
2071 <ul>
2072 <li>All
2073 </ul>
2074 <td>
2075 <table>
2076 <tr><th>
2077 <tr><td>QASYMMU8
2078 <tr><td>QASYMMS8
2079 <tr><td>QSYMMS16
2080 <tr><td>SIGNED32
2081 <tr><td>FLOAT16
2082 <tr><td>FLOAT32
2083 <tr><td>SIGNED32
2084 </table>
2085<tr>
2086 <td rowspan="3">NormalizationLayer
2087 <td rowspan="3" style="width:200px;"> Layer to compute normalization operation.
2088 <td rowspan="3">
2089 <ul>
2090 <li>ANEURALNETWORKS_LOCAL_RESPONSE_NORMALIZATION
2091 </ul>
2092 <td>CpuRef
2093 <td>
2094 <ul>
2095 <li>All
2096 </ul>
2097 <td>
2098 <table>
2099 <tr><th>
2100 <tr><td>BFLOAT16
2101 <tr><td>FLOAT16
2102 <tr><td>FLOAT32
2103 <tr><td>QASYMMS8
2104 <tr><td>QASYMMU8
2105 <tr><td>QSYMMS16
2106 </table>
2107<tr>
2108 <td>CpuAcc
2109 <td>
2110 <ul>
2111 <li>NHWC
2112 <li>NCHW
2113 </ul>
2114 <td>
2115 <table>
2116 <tr><th>
2117 <tr><td>FLOAT32
2118 <tr><td>FLOAT16
2119 </table>
2120<tr>
2121 <td>GpuAcc
2122 <td>
2123 <ul>
2124 <li>NHWC
2125 <li>NCHW
2126 </ul>
2127 <td>
2128 <table>
2129 <tr><th>
2130 <tr><td>FLOAT32
2131 <tr><td>FLOAT16
2132 </table>
2133<tr>
2134 <td rowspan="1">OutputLayer
2135 <td rowspan="1" style="width:200px;"> A special layer providing access to a user supplied buffer into which the output of a network can be written.
2136 <td rowspan="1">
2137 <ul>
2138 <li>N/A
2139 </ul>
2140 <td>All
2141 <td>
2142 <ul>
2143 <li>All
2144 </ul>
2145 <td>
2146 <table>
2147 <tr><th>
2148 <tr><td>All
2149 </table>
2150<tr>
2151 <td rowspan="3">PadLayer
2152 <td rowspan="3" style="width:200px;"> Layer to pad a tensor.
2153 <td rowspan="3">
2154 <ul>
2155 <li>ANEURALNETWORKS_PAD
2156 <li>ANEURALNETWORKS_PAD_V2
2157 </ul>
2158 <td>CpuRef
2159 <td>
2160 <ul>
2161 <li>All
2162 </ul>
2163 <td>
2164 <table>
2165 <tr><th>
2166 <tr><td>BFLOAT16
2167 <tr><td>FLOAT16
2168 <tr><td>FLOAT32
2169 <tr><td>QASYMMS8
2170 <tr><td>QASYMMU8
2171 <tr><td>QSYMMS16
2172 </table>
2173<tr>
2174 <td>CpuAcc
2175 <td>
2176 <ul>
2177 <li>NHWC
2178 <li>NCHW
2179 </ul>
2180 <td>
2181 <table>
2182 <tr><th>
2183 <tr><td>All
2184 </table>
2185<tr>
2186 <td>GpuAcc
2187 <td>
2188 <ul>
2189 <li>NHWC
2190 <li>NCHW
2191 </ul>
2192 <td>
2193 <table>
2194 <tr><th>
2195 <tr><td>All
2196 </table>
2197<tr>
2198 <td rowspan="3">PermuteLayer
2199 <td rowspan="3" style="width:200px;"> Layer to transpose an ND tensor.
2200 <td rowspan="3">
2201 <ul>
2202 <li>ANEURALNETWORKS_TRANSPOSE
2203 </ul>
2204 <td>CpuRef
2205 <td>
2206 <ul>
2207 <li>All
2208 </ul>
2209 <td>
2210 <table>
2211 <tr><th>
2212 <tr><td>BFLOAT16
2213 <tr><td>FLOAT16
2214 <tr><td>FLOAT32
2215 <tr><td>QASYMMS8
2216 <tr><td>QASYMMU8
2217 <tr><td>QSYMMS16
2218 </table>
2219<tr>
2220 <td>CpuAcc
2221 <td>
2222 <ul>
2223 <li>NHWC
2224 <li>NCHW
2225 </ul>
2226 <td>
2227 <table>
2228 <tr><th>
2229 <tr><td>All
2230 </table>
2231<tr>
2232 <td>GpuAcc
2233 <td>
2234 <ul>
2235 <li>NHWC
2236 <li>NCHW
2237 </ul>
2238 <td>
2239 <table>
2240 <tr><th>
2241 <tr><td>All
2242 </table>
2243<tr>
2244 <td rowspan="3">Pooling2dLayer
2245 <td rowspan="3" style="width:200px;"> Layer to perform pooling with the specified pooling operation.
2246 <td rowspan="3">
2247 <ul>
2248 <li>ANEURALNETWORKS_AVERAGE_POOL_2D
2249 <li>ANEURALNETWORKS_L2_POOL_2D
2250 <li>ANEURALNETWORKS_MAX_POOL_2D
2251 </ul>
2252 <td>CpuRef
2253 <td>
2254 <ul>
2255 <li>All
2256 </ul>
2257 <td>
2258 <table>
2259 <tr><th>
2260 <tr><td>BFLOAT16
2261 <tr><td>FLOAT16
2262 <tr><td>FLOAT32
2263 <tr><td>QASYMMS8
2264 <tr><td>QASYMMU8
2265 <tr><td>QSYMMS16
2266 </table>
2267<tr>
2268 <td>CpuAcc
2269 <td>
2270 <ul>
2271 <li>NHWC
2272 <li>NCHW
2273 </ul>
2274 <td>
2275 <table>
2276 <tr><th>
2277 <tr><td>QASYMMU8
2278 <tr><td>QASYMMS8
2279 <tr><td>FLOAT16
2280 <tr><td>FLOAT32
2281 </table>
2282<tr>
2283 <td>GpuAcc
2284 <td>
2285 <ul>
2286 <li>NHWC
2287 <li>NCHW
2288 </ul>
2289 <td>
2290 <table>
2291 <tr><th>
2292 <tr><td>QASYMMU8
2293 <tr><td>QASYMMS8
2294 <tr><td>FLOAT16
2295 <tr><td>FLOAT32
2296 </table>
2297<tr>
2298 <td rowspan="1">PreCompiledLayer
2299 <td rowspan="1" style="width:200px;"> Opaque layer provided by a backend which provides an executable representation of a subgraph from the original network.
2300 <td rowspan="1">
2301 <ul>
2302 <li>N/A
2303 </ul>
2304 <td>N/A
2305 <td>N/A
2306 <td>N/A
2307<tr>
2308 <td rowspan="3">PreluLayer
2309 <td rowspan="3" style="width:200px;"> Layer to compute the activation layer with the PRELU activation function.
2310 <td rowspan="3">
2311 <ul>
2312 <li>ANEURALNETWORKS_PRELU
2313 </ul>
2314 <td>CpuRef
2315 <td>
2316 <ul>
2317 <li>All
2318 </ul>
2319 <td>
2320 <table>
2321 <tr><th>
2322 <tr><td>BFLOAT16
2323 <tr><td>FLOAT16
2324 <tr><td>FLOAT32
2325 <tr><td>QASYMMS8
2326 <tr><td>QASYMMU8
2327 <tr><td>QSYMMS16
2328 </table>
2329<tr>
2330 <td>CpuAcc
2331 <td>
2332 <ul>
2333 <li>All
2334 </ul>
2335 <td>
2336 <table>
2337 <tr><th>
2338 <tr><td>QASYMMU8
2339 <tr><td>QASYMMS8
2340 <tr><td>FLOAT16
2341 <tr><td>FLOAT32
2342 </table>
2343<tr>
2344 <td>GpuAcc
2345 <td>
2346 <ul>
2347 <li>All
2348 </ul>
2349 <td>
2350 <table>
2351 <tr><th>
2352 <tr><td>QASYMMU8
2353 <tr><td>QASYMMS8
2354 <tr><td>FLOAT16
2355 <tr><td>FLOAT32
2356 </table>
2357<tr>
2358 <td rowspan="3">QLstmLayer
2359 <td rowspan="3" style="width:200px;"> Layer to perform quantized LSTM (Long Short-Term Memory) operation.
2360 <td rowspan="3">
2361 <ul>
2362 <li>ANEURALNETWORKS_QUANTIZED_LSTM
2363 <li>ANEURALNETWORKS_QUANTIZED_16BIT_LSTM
2364 </ul>
2365 <td>CpuRef
2366 <td>
2367 <ul>
2368 <li>All
2369 </ul>
2370 <td>
2371 <table>
2372 <tr><th>
2373 <tr><td>All
2374 </table>
2375<tr>
2376 <td>CpuAcc
2377 <td>
2378 <ul>
2379 <li>All
2380 </ul>
2381 <td>
2382 <table>
2383 <tr><th>
2384 <tr><td>QASYMMS8
2385 <tr><td>QASYMMU8
2386 <tr><td>SIGNED32
2387 <tr><td>QSYMMS16
2388 </table>
2389<tr>
2390 <td>GpuAcc
2391 <td>
2392 <ul>
2393 <li>All
2394 </ul>
2395 <td>
2396 <table>
2397 <tr><th>
2398 <tr><td>QASYMMS8
2399 <tr><td>QASYMMU8
2400 <tr><td>SIGNED32
2401 <tr><td>QSYMMS16
2402 </table>
2403<tr>
2404 <td rowspan="3">QuantizeLayer
2405 <td rowspan="3" style="width:200px;"> Layer to perform quantization operation.
2406 <td rowspan="3">
2407 <ul>
2408 <li>ANEURALNETWORKS_QUANTIZE
2409 </ul>
2410 <td>CpuRef
2411 <td>
2412 <ul>
2413 <li>All
2414 </ul>
2415 <td>
2416 <table>
2417 <tr><th>
2418 <tr><td>BFLOAT16
2419 <tr><td>FLOAT16
2420 <tr><td>FLOAT32
2421 <tr><td>QASYMMS8
2422 <tr><td>QASYMMU8
2423 <tr><td>QSYMMS8
2424 <tr><td>QSYMMS16
2425 </table>
2426<tr>
2427 <td>CpuAcc
2428 <td>
2429 <ul>
2430 <li>All
2431 </ul>
2432 <td>
2433 <table>
2434 <tr><th>
2435 <tr><td>QASYMMU8
2436 <tr><td>QASYMMS8
2437 <tr><td>QASYMM16
2438 <tr><td>FLOAT16
2439 <tr><td>FLOAT32
2440 </table>
2441<tr>
2442 <td>GpuAcc
2443 <td>
2444 <ul>
2445 <li>All
2446 </ul>
2447 <td>
2448 <table>
2449 <tr><th>
2450 <tr><td>QASYMMU8
2451 <tr><td>QASYMMS8
2452 <tr><td>QASYMM16
2453 <tr><td>FLOAT16
2454 <tr><td>FLOAT32
2455 </table>
2456<tr>
2457 <td rowspan="3">QuantizedLstmLayer
2458 <td rowspan="3" style="width:200px;"> Layer to perform quantized LSTM (Long Short-Term Memory) operation.
2459 <td rowspan="3">
2460 <ul>
2461 <li>ANEURALNETWORKS_QUANTIZED_LSTM
2462 <li>ANEURALNETWORKS_QUANTIZED_16BIT_LSTM
2463 </ul>
2464 <td>CpuRef
2465 <td>
2466 <ul>
2467 <li>All
2468 </ul>
2469 <td>
2470 <table>
2471 <tr><th>
2472 <tr><td>All
2473 </table>
2474<tr>
2475 <td>CpuAcc
2476 <td>
2477 <ul>
2478 <li>All
2479 </ul>
2480 <td>
2481 <table>
2482 <tr><th>
2483 <tr><td>SIGNED32
2484 <tr><td>QASYMMU8
2485 <tr><td>QSYMMS16
2486 </table>
2487<tr>
2488 <td>GpuAcc
2489 <td>
2490 <ul>
2491 <li>All
2492 </ul>
2493 <td>
2494 <table>
2495 <tr><th>
2496 <tr><td>SIGNED32
2497 <tr><td>QASYMMU8
2498 <tr><td>QSYMMS16
2499 </table>
2500<tr>
2501 <td rowspan="3">RankLayer
2502 <td rowspan="3" style="width:200px;"> Layer to perform a rank operation.
2503 <td rowspan="3">
2504 <ul>
2505 <li>ANEURALNETWORKS_RANK
2506 </ul>
2507 <td>CpuRef
2508 <td>
2509 <ul>
2510 <li>All
2511 </ul>
2512 <td>
2513 <table>
2514 <tr><th>
2515 <tr><td>All
2516 </table>
2517<tr>
2518 <td>CpuAcc
2519 <td>
2520 <ul>
2521 <li>All
2522 </ul>
2523 <td>
2524 <table>
2525 <tr><th>
2526 <tr><td>All
2527 </table>
2528<tr>
2529 <td>GpuAcc
2530 <td>
2531 <ul>
2532 <li>All
2533 </ul>
2534 <td>
2535 <table>
2536 <tr><th>
2537 <tr><td>All
2538 </table>
2539<tr>
2540 <td rowspan="3">ReduceLayer
2541 <td rowspan="3" style="width:200px;"> Layer to perform reduce with the following operations - ARG_IDX_MAX: Index of the max value - ARG_IDX_MIN: Index of the min value - MEAN_SUM: Mean of sum - PROD: Product - SUM_SQUARE: Sum of squares - SUM: Sum - MIN: Min - MAX: Max
2542 <td rowspan="3">
2543 <ul>
2544 <li>ANEURALNETWORKS_REDUCE_MAX
2545 <li>ANEURALNETWORKS_REDUCE_MIN
2546 <li>ANEURALNETWORKS_REDUCE_SUM
Teresa Charlin32b78702021-09-03 11:25:54 +0100[diff] [blame]2547 <li>ANEURALNETWORKS_REDUCE_PROD
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2548 </ul>
2549 <td>CpuRef
2550 <td>
2551 <ul>
2552 <li>All
2553 </ul>
2554 <td>
2555 <table>
2556 <tr><th>
2557 <tr><td>BFLOAT16
2558 <tr><td>FLOAT16
2559 <tr><td>FLOAT32
2560 <tr><td>QASYMMS8
2561 <tr><td>QASYMMU8
2562 <tr><td>QSYMMS16
2563 <tr><td>SIGNED32
2564 </table>
2565<tr>
2566 <td>CpuAcc
2567 <td>
2568 <ul>
2569 <li>All
2570 </ul>
2571 <td>
2572 <table>
2573 <tr><th>
2574 <tr><td>QASYMMU8
2575 <tr><td>QASYMMS8
2576 <tr><td>FLOAT16
2577 <tr><td>FLOAT32
2578 <tr><td>SIGNED32
2579 </table>
2580<tr>
2581 <td>GpuAcc
2582 <td>
2583 <ul>
2584 <li>All
2585 </ul>
2586 <td>
2587 <table>
2588 <tr><th>
2589 <tr><td>QASYMMU8
2590 <tr><td>QASYMMS8
2591 <tr><td>FLOAT16
2592 <tr><td>FLOAT32
2593 <tr><td>SIGNED32
2594 </table>
2595<tr>
2596 <td rowspan="3">ReshapeLayer
2597 <td rowspan="3" style="width:200px;"> Layer to reshape a tensor.
2598 <td rowspan="3">
2599 <ul>
2600 <li>ANEURALNETWORKS_RESHAPE
2601 <li>ANEURALNETWORKS_SQUEEZE
2602 <li>ANEURALNETWORKS_EXPAND_DIMS
2603 </ul>
2604 <td>CpuRef
2605 <td>
2606 <ul>
2607 <li>All
2608 </ul>
2609 <td>
2610 <table>
2611 <tr><th>
2612 <tr><td>BFLOAT16
2613 <tr><td>FLOAT16
2614 <tr><td>FLOAT32
2615 <tr><td>QASYMMS8
2616 <tr><td>QASYMMU8
2617 <tr><td>QSYMMS16
2618 <tr><td>SIGNED32
2619 <tr><td>BOOLEAN
2620 </table>
2621<tr>
2622 <td>CpuAcc
2623 <td>
2624 <ul>
2625 <li>All
2626 </ul>
2627 <td>
2628 <table>
2629 <tr><th>
2630 <tr><td>All
2631 </table>
2632<tr>
2633 <td>GpuAcc
2634 <td>
2635 <ul>
2636 <li>All
2637 </ul>
2638 <td>
2639 <table>
2640 <tr><th>
2641 <tr><td>All
2642 </table>
2643<tr>
2644 <td rowspan="3">ResizeLayer
2645 <td rowspan="3" style="width:200px;"> Layer to perform resize of a tensor using one of the interpolation methods: - Bilinear - Nearest Neighbor.
2646 <td rowspan="3">
2647 <ul>
2648 <li>ANEURALNETWORKS_RESIZE_BILINEAR
2649 <li>ANEURALNETWORKS_RESIZE_NEAREST_NEIGHBOR
2650 </ul>
2651 <td>CpuRef
2652 <td>
2653 <ul>
2654 <li>All
2655 </ul>
2656 <td>
2657 <table>
2658 <tr><th>
2659 <tr><td>BFLOAT16
2660 <tr><td>FLOAT16
2661 <tr><td>FLOAT32
2662 <tr><td>QASYMMS8
2663 <tr><td>QASYMMU8
2664 <tr><td>QSYMMS16
2665 </table>
2666<tr>
2667 <td>CpuAcc
2668 <td>
2669 <ul>
2670 <li>NHWC
2671 <li>NCHW
2672 </ul>
2673 <td>
2674 <table>
2675 <tr><th>
2676 <tr><td>QASYMMU8
2677 <tr><td>QASYMMS8
2678 <tr><td>FLOAT16
2679 <tr><td>FLOAT32
2680 </table>
2681<tr>
2682 <td>GpuAcc
2683 <td>
2684 <ul>
2685 <li>NHWC
2686 <li>NCHW
2687 </ul>
2688 <td>
2689 <table>
2690 <tr><th>
2691 <tr><td>QASYMMU8
2692 <tr><td>QASYMMS8
2693 <tr><td>FLOAT16
2694 <tr><td>FLOAT32
2695 </table>
2696<tr>
2697 <td rowspan="3">RsqrtLayer
2698 <td rowspan="3" style="width:200px;"> Layer to perform Rsqrt operation.
2699 <td rowspan="3">
2700 <ul>
2701 <li>ANEURALNETWORKS_RSQRT
2702 </ul>
2703 <td>CpuRef
2704 <td>
2705 <ul>
2706 <li>All
2707 </ul>
2708 <td>
2709 <table>
2710 <tr><th>
2711 <tr><td>BFLOAT16
2712 <tr><td>FLOAT16
2713 <tr><td>FLOAT32
2714 <tr><td>QASYMMS8
2715 <tr><td>QASYMMU8
2716 <tr><td>QSYMMS16
2717 <tr><td>SIGNED32
2718 </table>
2719<tr>
2720 <td>CpuAcc
2721 <td>
2722 <ul>
2723 <li>All
2724 </ul>
2725 <td>
2726 <table>
2727 <tr><th>
2728 <tr><td>FLOAT16
2729 <tr><td>FLOAT32
2730 <tr><td>SIGNED32
2731 </table>
2732<tr>
2733 <td>GpuAcc
2734 <td>
2735 <ul>
2736 <li>All
2737 </ul>
2738 <td>
2739 <table>
2740 <tr><th>
2741 <tr><td>FLOAT16
2742 <tr><td>FLOAT32
2743 </table>
2744<tr>
2745 <td rowspan="3">ShapeLayer
2746 <td rowspan="3" style="width:200px;"> Layer to return the shape of the input tensor.
2747 <td rowspan="3">
2748 <ul>
2749 <li>N/A
2750 </ul>
2751 <td>CpuRef
2752 <td>
2753 <ul>
2754 <li>All
2755 </ul>
2756 <td>
2757 <table>
2758 <tr><th>
2759 <tr><td>All
2760 </table>
2761<tr>
2762 <td>CpuAcc
2763 <td>
2764 <ul>
2765 <li>All
2766 </ul>
2767 <td>
2768 <table>
2769 <tr><th>
2770 <tr><td>All
2771 </table>
2772<tr>
2773 <td>GpuAcc
2774 <td>
2775 <ul>
2776 <li>All
2777 </ul>
2778 <td>
2779 <table>
2780 <tr><th>
2781 <tr><td>All
2782 </table>
2783<tr>
2784 <td rowspan="3">SliceLayer
2785 <td rowspan="3" style="width:200px;"> Layer to perform tensor slicing.
2786 <td rowspan="3">
2787 <ul>
2788 <li>ANEURALNETWORKS_SLICE
2789 </ul>
2790 <td>CpuRef
2791 <td>
2792 <ul>
2793 <li>All
2794 </ul>
2795 <td>
2796 <table>
2797 <tr><th>
2798 <tr><td>BFLOAT16
2799 <tr><td>FLOAT32
2800 <tr><td>QASYMMS8
2801 <tr><td>QASYMMU8
2802 <tr><td>QSYMMS16
2803 </table>
2804<tr>
2805 <td>CpuAcc
2806 <td>
2807 <ul>
2808 <li>All
2809 </ul>
2810 <td>
2811 <table>
2812 <tr><th>
2813 <tr><td>All
2814 </table>
2815<tr>
2816 <td>GpuAcc
2817 <td>
2818 <ul>
2819 <li>All
2820 </ul>
2821 <td>
2822 <table>
2823 <tr><th>
2824 <tr><td>All
2825 </table>
2826<tr>
2827 <td rowspan="3">SoftmaxLayer
2828 <td rowspan="3" style="width:200px;"> Layer to perform softmax, log-softmax operation over the specified axis.
2829 <td rowspan="3">
2830 <ul>
2831 <li>ANEURALNETWORKS_LOG_SOFTMAX
2832 <li>ANEURALNETWORKS_SOFTMAX
2833 </ul>
2834 <td>CpuRef
2835 <td>
2836 <ul>
2837 <li>All
2838 </ul>
2839 <td>
2840 <table>
2841 <tr><th>
2842 <tr><td>BFLOAT16
2843 <tr><td>FLOAT16
2844 <tr><td>FLOAT32
2845 <tr><td>QASYMMS8
2846 <tr><td>QASYMMU8
2847 <tr><td>QSYMMS8
2848 <tr><td>QSYMMS16
2849 </table>
2850<tr>
2851 <td>CpuAcc
2852 <td>
2853 <ul>
2854 <li>All
2855 </ul>
2856 <td>
2857 <table>
2858 <tr><th>
2859 <tr><td>QASYMMU8
2860 <tr><td>QASYMMS8
2861 <tr><td>FLOAT16
2862 <tr><td>FLOAT32
2863 </table>
2864<tr>
2865 <td>GpuAcc
2866 <td>
2867 <ul>
2868 <li>All
2869 </ul>
2870 <td>
2871 <table>
2872 <tr><th>
2873 <tr><td>QASYMMU8
2874 <tr><td>QASYMMS8
2875 <tr><td>FLOAT16
2876 <tr><td>FLOAT32
2877 </table>
2878<tr>
2879 <td rowspan="3">SpaceToBatchNdLayer
2880 <td rowspan="3" style="width:200px;"> Layer to divide spatial dimensions of the tensor into a grid of blocks and interleaves these blocks with the batch dimension.
2881 <td rowspan="3">
2882 <ul>
2883 <li>ANEURALNETWORKS_SPACE_TO_BATCH_ND
2884 </ul>
2885 <td>CpuRef
2886 <td>
2887 <ul>
2888 <li>All
2889 </ul>
2890 <td>
2891 <table>
2892 <tr><th>
2893 <tr><td>BFLOAT16
2894 <tr><td>FLOAT16
2895 <tr><td>FLOAT32
2896 <tr><td>QASYMMS8
2897 <tr><td>QASYMMU8
2898 <tr><td>QSYMMS16
2899 </table>
2900<tr>
2901 <td>CpuAcc
2902 <td>
2903 <ul>
2904 <li>NHWC
2905 <li>NCHW
2906 </ul>
2907 <td>
2908 <table>
2909 <tr><th>
2910 <tr><td>All
2911 </table>
2912<tr>
2913 <td>GpuAcc
2914 <td>
2915 <ul>
2916 <li>NHWC
2917 <li>NCHW
2918 </ul>
2919 <td>
2920 <table>
2921 <tr><th>
2922 <tr><td>All
2923 </table>
2924<tr>
2925 <td rowspan="3">SpaceToDepthLayer
2926 <td rowspan="3" style="width:200px;"> Layer to rearrange blocks of spatial data into depth.
2927 <td rowspan="3">
2928 <ul>
2929 <li>ANEURALNETWORKS_SPACE_TO_DEPTH
2930 </ul>
2931 <td>CpuRef
2932 <td>
2933 <ul>
2934 <li>All
2935 </ul>
2936 <td>
2937 <table>
2938 <tr><th>
2939 <tr><td>BFLOAT16
2940 <tr><td>FLOAT16
2941 <tr><td>FLOAT32
2942 <tr><td>QASYMMS8
2943 <tr><td>QASYMMU8
2944 <tr><td>QSYMMS16
2945 </table>
2946<tr>
2947 <td>CpuAcc
2948 <td>
2949 <ul>
2950 <li>NHWC
2951 <li>NCHW
2952 </ul>
2953 <td>
2954 <table>
2955 <tr><th>
2956 <tr><td>All
2957 </table>
2958<tr>
2959 <td>GpuAcc
2960 <td>
2961 <ul>
2962 <li>NHWC
2963 <li>NCHW
2964 </ul>
2965 <td>
2966 <table>
2967 <tr><th>
2968 <tr><td>All
2969 </table>
2970<tr>
2971 <td rowspan="3">SplitterLayer
2972 <td rowspan="3" style="width:200px;"> Layer to split a tensor along a given axis.
2973 <td rowspan="3">
2974 <ul>
2975 <li>ANEURALNETWORKS_SPLIT
2976 </ul>
2977 <td>CpuRef
2978 <td>
2979 <ul>
2980 <li>All
2981 </ul>
2982 <td>
2983 <table>
2984 <tr><th>
2985 <tr><td>BFLOAT16
2986 <tr><td>FLOAT16
2987 <tr><td>FLOAT32
2988 <tr><td>QASYMMS8
2989 <tr><td>QASYMMU8
2990 <tr><td>QSYMMS16
2991 </table>
2992<tr>
2993 <td>CpuAcc
2994 <td>
2995 <ul>
2996 <li>All
2997 </ul>
2998 <td>
2999 <table>
3000 <tr><th>
3001 <tr><td>All
3002 </table>
3003<tr>
3004 <td>GpuAcc
3005 <td>
3006 <ul>
3007 <li>All
3008 </ul>
3009 <td>
3010 <table>
3011 <tr><th>
3012 <tr><td>All
3013 </table>
3014<tr>
3015 <td rowspan="3">StackLayer
3016 <td rowspan="3" style="width:200px;"> Layer to stack tensors along an axis.
3017 <td rowspan="3">
3018 <ul>
3019 <li>N/A
3020 </ul>
3021 <td>CpuRef
3022 <td>
3023 <ul>
3024 <li>All
3025 </ul>
3026 <td>
3027 <table>
3028 <tr><th>
3029 <tr><td>BFLOAT16
3030 <tr><td>FLOAT16
3031 <tr><td>FLOAT32
3032 <tr><td>QASYMMS8
3033 <tr><td>QASYMMU8
3034 <tr><td>QSYMMS16
3035 </table>
3036<tr>
3037 <td>CpuAcc
3038 <td>
3039 <ul>
3040 <li>All
3041 </ul>
3042 <td>
3043 <table>
3044 <tr><th>
3045 <tr><td>All
3046 </table>
3047<tr>
3048 <td>GpuAcc
3049 <td>
3050 <ul>
3051 <li>All
3052 </ul>
3053 <td>
3054 <table>
3055 <tr><th>
3056 <tr><td>All
3057 </table>
3058<tr>
3059 <td rowspan="1">StandInLayer
3060 <td rowspan="1" style="width:200px;"> A layer to represent "unknown" or "unsupported" operations in the input graph. It has a configurable number of input and output slots and an optional name.
3061 <td rowspan="1">
3062 <ul>
3063 <li>N/A
3064 </ul>
3065 <td>N/A
3066 <td>N/A
3067 <td>N/A
3068<tr>
3069 <td rowspan="3">StridedSliceLayer
3070 <td rowspan="3" style="width:200px;"> Layer to extract a strided slice of a tensor.
3071 <td rowspan="3">
3072 <ul>
3073 <li>ANEURALNETWORKS_STRIDED_SLICE
3074 </ul>
3075 <td>CpuRef
3076 <td>
3077 <ul>
3078 <li>All
3079 </ul>
3080 <td>
3081 <table>
3082 <tr><th>
3083 <tr><td>BFLOAT16
3084 <tr><td>FLOAT32
3085 <tr><td>QASYMMS8
3086 <tr><td>QASYMMU8
3087 <tr><td>QSYMMS16
3088 </table>
3089<tr>
3090 <td>CpuAcc
3091 <td>
3092 <ul>
3093 <li>All
3094 </ul>
3095 <td>
3096 <table>
3097 <tr><th>
3098 <tr><td>All
3099 </table>
3100<tr>
3101 <td>GpuAcc
3102 <td>
3103 <ul>
3104 <li>All
3105 </ul>
3106 <td>
3107 <table>
3108 <tr><th>
3109 <tr><td>All
3110 </table>
3111<tr>
3112 <td rowspan="3">SubtractionLayer
3113 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise subtract of 2 tensors.
3114 <td rowspan="3">
3115 <ul>
3116 <li>ANEURALNETWORKS_SUB
3117 </ul>
3118 <td>CpuRef
3119 <td>
3120 <ul>
3121 <li>All
3122 </ul>
3123 <td>
3124 <table>
3125 <tr><th>
3126 <tr><td>BFLOAT16
3127 <tr><td>FLOAT16
3128 <tr><td>FLOAT32
3129 <tr><td>QASYMMS8
3130 <tr><td>QASYMMU8
3131 <tr><td>QSYMMS16
3132 <tr><td>SIGNED32
3133 </table>
3134<tr>
3135 <td>CpuAcc
3136 <td>
3137 <ul>
3138 <li>All
3139 </ul>
3140 <td>
3141 <table>
3142 <tr><th>
3143 <tr><td>QASYMMU8
3144 <tr><td>QASYMMS8
3145 <tr><td>QSYMMS16
3146 <tr><td>SIGNED32
3147 <tr><td>FLOAT16
3148 <tr><td>FLOAT32
3149 </table>
3150<tr>
3151 <td>GpuAcc
3152 <td>
3153 <ul>
3154 <li>All
3155 </ul>
3156 <td>
3157 <table>
3158 <tr><th>
3159 <tr><td>QASYMMU8
3160 <tr><td>QASYMMS8
3161 <tr><td>QSYMMS16
3162 <tr><td>SIGNED32
3163 <tr><td>FLOAT16
3164 <tr><td>FLOAT32
3165 </table>
3166<tr>
3167 <td rowspan="3">TransposeConvolution2dLayer
3168 <td rowspan="3" style="width:200px;"> Layer to perform 2D transpose convolution (deconvolution) operation.
3169 <td rowspan="3">
3170 <ul>
3171 <li>ANEURALNETWORKS_TRANSPOSE_CONV_2D
3172 </ul>
3173 <td>CpuRef
3174 <td>
3175 <ul>
3176 <li>All
3177 </ul>
3178 <td>
3179 <table>
3180 <tr><th>
3181 <tr><td>BFLOAT16
3182 <tr><td>FLOAT16
3183 <tr><td>FLOAT32
3184 <tr><td>QASYMMS8
3185 <tr><td>QASYMMU8
3186 <tr><td>QSYMMS8
3187 <tr><td>QSYMMS16
3188 </table>
3189<tr>
3190 <td>CpuAcc
3191 <td>
3192 <ul>
3193 <li>NHWC
3194 <li>NCHW
3195 </ul>
3196 <td>
3197 <table>
3198 <tr><th>
3199 <tr><td>SIGNED32
3200 <tr><td>FLOAT16
3201 <tr><td>FLOAT32
3202 <tr><td>QASYMMU8
3203 <tr><td>QASYMMS8
3204 <tr><td>QUANTIZEDSYMM8PERAXIS
3205 </table>
3206<tr>
3207 <td>GpuAcc
3208 <td>
3209 <ul>
3210 <li>NHWC
3211 <li>NCHW
3212 </ul>
3213 <td>
3214 <table>
3215 <tr><th>
3216 <tr><td>SIGNED32
3217 <tr><td>FLOAT16
3218 <tr><td>FLOAT32
3219 <tr><td>QASYMMU8
3220 <tr><td>QASYMMS8
3221 <tr><td>QUANTIZEDSYMM8PERAXIS
3222 </table>
3223<tr>
3224 <td rowspan="3">TransposeLayer
3225 <td rowspan="3" style="width:200px;"> Layer to transpose a tensor.
3226 <td rowspan="3">
3227 <ul>
3228 <li>ANEURALNETWORKS_TRANSPOSE
3229 </ul>
3230 <td>CpuRef
3231 <td>
3232 <ul>
3233 <li>All
3234 </ul>
3235 <td>
3236 <table>
3237 <tr><th>
3238 <tr><td>BFLOAT16
3239 <tr><td>FLOAT16
3240 <tr><td>FLOAT32
3241 <tr><td>QASYMMS8
3242 <tr><td>QASYMMU8
3243 <tr><td>QSYMMS16
3244 </table>
3245<tr>
3246 <td>CpuAcc
3247 <td>
3248 <ul>
3249 <li>All
3250 </ul>
3251 <td>
3252 <table>
3253 <tr><th>
3254 <tr><td>All
3255 </table>
3256<tr>
3257 <td>GpuAcc
3258 <td>
3259 <ul>
3260 <li>All
3261 </ul>
3262 <td>
3263 <table>
3264 <tr><th>
3265 <tr><td>All
3266 </table>
3267<tr>
3268 <td rowspan="3">UnidirectionalSquenceLstmLayer
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3269 <td rowspan="3" style="width:200px;"> Layer to perform unidirectional sequence LSTM operation.
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3270 <td rowspan="3">
3271 <ul>
3272 <li>ANEURALNETWORKS_UNIDIRECTIONAL_SEQUENCE_LSTM
3273 </ul>
3274 <td>CpuRef
3275 <td>
3276 <ul>
3277 <li>All
3278 </ul>
3279 <td>
3280 <table>
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3281 <tr><th>Input Types
3282 <tr><td>FLOAT32
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3283 </table>
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3284 <table>
3285 <tr><th>Weight Types
3286 <tr><td>FLOAT32
3287 <tr><td>QASYMMS8
3288 </table>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3289<tr>
3290 <td rowspan="3">UnmapLayer
3291 <td rowspan="3" style="width:200px;"> Layer to perform unmap operation on tensor.
3292 <td rowspan="3">
3293 <ul>
3294 <li>N/A
3295 </ul>
3296 <td>CpuRef
3297 <td>
3298 <ul>
3299 <li>All
3300 </ul>
3301 <td>
3302 <table>
3303 <tr><th>
3304 <tr><td>All
3305 </table>
3306<tr>
3307 <td>CpuAcc
3308 <td>
3309 <ul>
3310 <li>NHWC
3311 <li>NCHW
3312 </ul>
3313 <td>
3314 <table>
3315 <tr><th>
3316 <tr><td>All
3317 </table>
3318<tr>
3319 <td>GpuAcc
3320 <td>
3321 <ul>
3322 <li>NHWC
3323 <li>NCHW
3324 </ul>
3325 <td>
3326 <table>
3327 <tr><th>
3328 <tr><td>All
3329 </table>
3330</table>
3331
3332*/
3333} // namespace