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Lior Dekel489e40b2021-08-02 12:03:55 +03001/*
2 * Copyright (c) 2020-2021 Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19/****************************************************************************
20 * Includes
21 ****************************************************************************/
22#include "tx_api.h"
23#include <stdio.h>
24
25/****************************************************************************
26 * Defines
27 ****************************************************************************/
28#define SYSTEM_CLOCK 6000000
29#define SYSTICK_CYCLES ((SYSTEM_CLOCK / 100) - 1)
30
31/****************************************************************************
32 * Externs
33 ****************************************************************************/
34void _tx_timer_interrupt(void);
35
36/****************************************************************************
37 * Functions
38 ****************************************************************************/
39
40/**************************************************************************/
41/* */
42/* FUNCTION RELEASE */
43/* */
44/* _tx_initialize_low_level Cortex-M4/GNU */
45/* 6.1 */
46/* */
47/* DESCRIPTION */
48/* */
49/* This function is responsible for any low-level processor */
50/* initialization, including setting up interrupt vectors, setting */
51/* up a periodic timer interrupt source, saving the system stack */
52/* pointer for use in ISR processing later, and finding the first */
53/* available RAM memory address for tx_application_define. */
54/* this function has an empty implementation in this example. */
55/* */
56/* INPUT */
57/* */
58/* None */
59/* */
60/* OUTPUT */
61/* */
62/* None */
63/* */
64/* CALLS */
65/* */
66/* None */
67/* */
68/* CALLED BY */
69/* */
70/* _tx_initialize_kernel_enter ThreadX entry function */
71/* */
72/**************************************************************************/
73VOID _tx_initialize_low_level(VOID) {
74 __asm__ volatile(
75 /* Disable interrupts during ThreadX initialization. */
76 " CPSID i\n"
77 /* Enable the cycle count register. */
78 " LDR r0, =0xE0001000\n" // Build address of DWT register
79 " LDR r1, [r0]\n" // Pickup the current value
80 " ORR r1, r1, #1\n" // Set the CYCCNTENA bit
81 " STR r1, [r0]\n" // Enable the cycle count register
82 /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
83 " MOV r0, #0xE000E000\n" // Build address of NVIC registers
84 " LDR r1, =59999\n" // 59,999 = SYSTICK_CYCLES = ((6,000,000 / 100) -1)
85 " STR r1, [r0, #0x14]\n" // Setup SysTick Reload Value
86 " MOV r1, #0x7\n" // Build SysTick Control Enable Value
87 " STR r1, [r0, #0x10]\n" // Setup SysTick Control
88 /* Configure handler priorities. */
89 " LDR r1, =0x00000000\n" // Rsrv, UsgF, BusF, MemM
90 " STR r1, [r0, #0xD18]\n" // Setup System Handlers 4-7 Priority Registers
91 " LDR r1, =0xFF000000\n" // SVCl, Rsrv, Rsrv, Rsrv
92 " STR r1, [r0, #0xD1C]\n" // Setup System Handlers 8-11 Priority Registers
93 // Note: SVC must be lowest priority, which is 0xFF
94 " LDR r1, =0x40FF0000\n" // SysT, PnSV, Rsrv, DbgM
95 " STR r1, [r0, #0xD20]\n" // Setup System Handlers 12-15 Priority Registers
96 // Note: PnSV must be lowest priority, which is 0xFF
97 /* Return to caller. */
98 " BX lr\n");
99}
100
101/* SysTick_Handler has a generic interrupt handler template. */
102/* to implement a new handler, replace the call to */
103/* _tx_timer_interrupt to some other c function */
104VOID SysTick_Handler(VOID) {
105#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
106 _tx_execution_isr_enter(); // Call the ISR enter function
107#endif
108
109 _tx_timer_interrupt();
110
111#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
112 _tx_execution_isr_exit(); // Call the ISR exit function
113#endif
114
115 return;
116}