Rickard Bolin | bc6ee58 | 2022-11-04 08:24:29 +0000 | [diff] [blame^] | 1 | # SPDX-FileCopyrightText: Copyright 2020 Arm Limited and/or its affiliates <open-source-office@arm.com> |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 2 | # |
| 3 | # SPDX-License-Identifier: Apache-2.0 |
| 4 | # |
| 5 | # Licensed under the Apache License, Version 2.0 (the License); you may |
| 6 | # not use this file except in compliance with the License. |
| 7 | # You may obtain a copy of the License at |
| 8 | # |
| 9 | # www.apache.org/licenses/LICENSE-2.0 |
| 10 | # |
| 11 | # Unless required by applicable law or agreed to in writing, software |
| 12 | # distributed under the License is distributed on an AS IS BASIS, WITHOUT |
| 13 | # WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 14 | # See the License for the specific language governing permissions and |
| 15 | # limitations under the License. |
| 16 | |
Diqing Zhong | b731170 | 2020-04-14 12:31:44 +0200 | [diff] [blame] | 17 | |
| 18 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 19 | from ctypes import * |
| 20 | from enum import Enum |
| 21 | |
Stefan Nannesson | e55e274 | 2020-08-20 12:53:24 +0200 | [diff] [blame] | 22 | ARCH_VER = '1.0.6' |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 23 | |
| 24 | |
Douglas Troha | 77f8396 | 2020-05-14 16:36:17 +0200 | [diff] [blame] | 25 | class BASE(Enum): |
| 26 | ID = 0x0000 |
| 27 | STATUS = 0x0004 |
| 28 | CMD = 0x0008 |
| 29 | RESET = 0x000C |
| 30 | QBASE0 = 0x0010 |
| 31 | QBASE1 = 0x0014 |
| 32 | QREAD = 0x0018 |
| 33 | QCONFIG = 0x001C |
| 34 | QSIZE = 0x0020 |
| 35 | PROT = 0x0024 |
| 36 | CONFIG = 0x0028 |
| 37 | LOCK = 0x002C |
| 38 | REGIONCFG = 0x003C |
| 39 | AXI_LIMIT0 = 0x0040 |
| 40 | AXI_LIMIT1 = 0x0044 |
| 41 | AXI_LIMIT2 = 0x0048 |
| 42 | AXI_LIMIT3 = 0x004C |
| 43 | SIZE = 0x0050 |
| 44 | |
| 45 | class BASE_POINTERS(Enum): |
| 46 | BASEP0 = 0x0080 |
| 47 | BASEP1 = 0x0084 |
| 48 | BASEP2 = 0x0088 |
| 49 | BASEP3 = 0x008C |
| 50 | BASEP4 = 0x0090 |
| 51 | BASEP5 = 0x0094 |
| 52 | BASEP6 = 0x0098 |
| 53 | BASEP7 = 0x009C |
| 54 | BASEP8 = 0x00A0 |
| 55 | BASEP9 = 0x00A4 |
| 56 | BASEP10 = 0x00A8 |
| 57 | BASEP11 = 0x00AC |
| 58 | BASEP12 = 0x00B0 |
| 59 | BASEP13 = 0x00B4 |
| 60 | BASEP14 = 0x00B8 |
| 61 | BASEP15 = 0x00BC |
| 62 | SIZE = 0x00C0 |
| 63 | |
| 64 | class DEBUG(Enum): |
| 65 | WD_STATUS = 0x0100 |
| 66 | MAC_STATUS = 0x0104 |
| 67 | AO_STATUS = 0x0108 |
| 68 | DMA_STATUS0 = 0x0110 |
| 69 | DMA_STATUS1 = 0x0114 |
| 70 | CLKFORCE = 0x0140 |
| 71 | DEBUG_ADDRESS = 0x0144 |
| 72 | DEBUG_MISC = 0x0148 |
| 73 | DEBUGCORE = 0x014C |
Stefan Nannesson | e55e274 | 2020-08-20 12:53:24 +0200 | [diff] [blame] | 74 | DEBUG_BLOCK = 0x0150 |
| 75 | SIZE = 0x0154 |
Douglas Troha | 77f8396 | 2020-05-14 16:36:17 +0200 | [diff] [blame] | 76 | |
| 77 | class ID(Enum): |
| 78 | REVISION = 0x0FC0 |
| 79 | PID4 = 0x0FD0 |
| 80 | PID5 = 0x0FD4 |
| 81 | PID6 = 0x0FD8 |
| 82 | PID7 = 0x0FDC |
| 83 | PID0 = 0x0FE0 |
| 84 | PID1 = 0x0FE4 |
| 85 | PID2 = 0x0FE8 |
| 86 | PID3 = 0x0FEC |
| 87 | CID0 = 0x0FF0 |
| 88 | CID1 = 0x0FF4 |
| 89 | CID2 = 0x0FF8 |
| 90 | CID3 = 0x0FFC |
| 91 | SIZE = 0x1000 |
| 92 | |
| 93 | class PMU(Enum): |
| 94 | PMCR = 0x0180 |
| 95 | PMCNTENSET = 0x0184 |
| 96 | PMCNTENCLR = 0x0188 |
| 97 | PMOVSSET = 0x018C |
| 98 | PMOVSCLR = 0x0190 |
| 99 | PMINTSET = 0x0194 |
| 100 | PMINTCLR = 0x0198 |
| 101 | PMCCNTR_LO = 0x01A0 |
| 102 | PMCCNTR_HI = 0x01A4 |
| 103 | PMCCNTR_CFG = 0x01A8 |
| 104 | PMCAXI_CHAN = 0x01AC |
| 105 | PMEVCNTR0 = 0x0300 |
| 106 | PMEVCNTR1 = 0x0304 |
| 107 | PMEVCNTR2 = 0x0308 |
| 108 | PMEVCNTR3 = 0x030C |
| 109 | PMEVTYPER0 = 0x0380 |
| 110 | PMEVTYPER1 = 0x0384 |
| 111 | PMEVTYPER2 = 0x0388 |
| 112 | PMEVTYPER3 = 0x038C |
| 113 | SIZE = 0x0390 |
| 114 | |
| 115 | class SHARED_BUFFER(Enum): |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 116 | SHARED_BUFFER0 = 0x0400 |
| 117 | SHARED_BUFFER1 = 0x0404 |
| 118 | SHARED_BUFFER2 = 0x0408 |
| 119 | SHARED_BUFFER3 = 0x040C |
| 120 | SHARED_BUFFER4 = 0x0410 |
| 121 | SHARED_BUFFER5 = 0x0414 |
| 122 | SHARED_BUFFER6 = 0x0418 |
| 123 | SHARED_BUFFER7 = 0x041C |
| 124 | SHARED_BUFFER8 = 0x0420 |
| 125 | SHARED_BUFFER9 = 0x0424 |
| 126 | SHARED_BUFFER10 = 0x0428 |
| 127 | SHARED_BUFFER11 = 0x042C |
| 128 | SHARED_BUFFER12 = 0x0430 |
| 129 | SHARED_BUFFER13 = 0x0434 |
| 130 | SHARED_BUFFER14 = 0x0438 |
| 131 | SHARED_BUFFER15 = 0x043C |
| 132 | SHARED_BUFFER16 = 0x0440 |
| 133 | SHARED_BUFFER17 = 0x0444 |
| 134 | SHARED_BUFFER18 = 0x0448 |
| 135 | SHARED_BUFFER19 = 0x044C |
| 136 | SHARED_BUFFER20 = 0x0450 |
| 137 | SHARED_BUFFER21 = 0x0454 |
| 138 | SHARED_BUFFER22 = 0x0458 |
| 139 | SHARED_BUFFER23 = 0x045C |
| 140 | SHARED_BUFFER24 = 0x0460 |
| 141 | SHARED_BUFFER25 = 0x0464 |
| 142 | SHARED_BUFFER26 = 0x0468 |
| 143 | SHARED_BUFFER27 = 0x046C |
| 144 | SHARED_BUFFER28 = 0x0470 |
| 145 | SHARED_BUFFER29 = 0x0474 |
| 146 | SHARED_BUFFER30 = 0x0478 |
| 147 | SHARED_BUFFER31 = 0x047C |
| 148 | SHARED_BUFFER32 = 0x0480 |
| 149 | SHARED_BUFFER33 = 0x0484 |
| 150 | SHARED_BUFFER34 = 0x0488 |
| 151 | SHARED_BUFFER35 = 0x048C |
| 152 | SHARED_BUFFER36 = 0x0490 |
| 153 | SHARED_BUFFER37 = 0x0494 |
| 154 | SHARED_BUFFER38 = 0x0498 |
| 155 | SHARED_BUFFER39 = 0x049C |
| 156 | SHARED_BUFFER40 = 0x04A0 |
| 157 | SHARED_BUFFER41 = 0x04A4 |
| 158 | SHARED_BUFFER42 = 0x04A8 |
| 159 | SHARED_BUFFER43 = 0x04AC |
| 160 | SHARED_BUFFER44 = 0x04B0 |
| 161 | SHARED_BUFFER45 = 0x04B4 |
| 162 | SHARED_BUFFER46 = 0x04B8 |
| 163 | SHARED_BUFFER47 = 0x04BC |
| 164 | SHARED_BUFFER48 = 0x04C0 |
| 165 | SHARED_BUFFER49 = 0x04C4 |
| 166 | SHARED_BUFFER50 = 0x04C8 |
| 167 | SHARED_BUFFER51 = 0x04CC |
| 168 | SHARED_BUFFER52 = 0x04D0 |
| 169 | SHARED_BUFFER53 = 0x04D4 |
| 170 | SHARED_BUFFER54 = 0x04D8 |
| 171 | SHARED_BUFFER55 = 0x04DC |
| 172 | SHARED_BUFFER56 = 0x04E0 |
| 173 | SHARED_BUFFER57 = 0x04E4 |
| 174 | SHARED_BUFFER58 = 0x04E8 |
| 175 | SHARED_BUFFER59 = 0x04EC |
| 176 | SHARED_BUFFER60 = 0x04F0 |
| 177 | SHARED_BUFFER61 = 0x04F4 |
| 178 | SHARED_BUFFER62 = 0x04F8 |
| 179 | SHARED_BUFFER63 = 0x04FC |
| 180 | SHARED_BUFFER64 = 0x0500 |
| 181 | SHARED_BUFFER65 = 0x0504 |
| 182 | SHARED_BUFFER66 = 0x0508 |
| 183 | SHARED_BUFFER67 = 0x050C |
| 184 | SHARED_BUFFER68 = 0x0510 |
| 185 | SHARED_BUFFER69 = 0x0514 |
| 186 | SHARED_BUFFER70 = 0x0518 |
| 187 | SHARED_BUFFER71 = 0x051C |
| 188 | SHARED_BUFFER72 = 0x0520 |
| 189 | SHARED_BUFFER73 = 0x0524 |
| 190 | SHARED_BUFFER74 = 0x0528 |
| 191 | SHARED_BUFFER75 = 0x052C |
| 192 | SHARED_BUFFER76 = 0x0530 |
| 193 | SHARED_BUFFER77 = 0x0534 |
| 194 | SHARED_BUFFER78 = 0x0538 |
| 195 | SHARED_BUFFER79 = 0x053C |
| 196 | SHARED_BUFFER80 = 0x0540 |
| 197 | SHARED_BUFFER81 = 0x0544 |
| 198 | SHARED_BUFFER82 = 0x0548 |
| 199 | SHARED_BUFFER83 = 0x054C |
| 200 | SHARED_BUFFER84 = 0x0550 |
| 201 | SHARED_BUFFER85 = 0x0554 |
| 202 | SHARED_BUFFER86 = 0x0558 |
| 203 | SHARED_BUFFER87 = 0x055C |
| 204 | SHARED_BUFFER88 = 0x0560 |
| 205 | SHARED_BUFFER89 = 0x0564 |
| 206 | SHARED_BUFFER90 = 0x0568 |
| 207 | SHARED_BUFFER91 = 0x056C |
| 208 | SHARED_BUFFER92 = 0x0570 |
| 209 | SHARED_BUFFER93 = 0x0574 |
| 210 | SHARED_BUFFER94 = 0x0578 |
| 211 | SHARED_BUFFER95 = 0x057C |
| 212 | SHARED_BUFFER96 = 0x0580 |
| 213 | SHARED_BUFFER97 = 0x0584 |
| 214 | SHARED_BUFFER98 = 0x0588 |
| 215 | SHARED_BUFFER99 = 0x058C |
| 216 | SHARED_BUFFER100 = 0x0590 |
| 217 | SHARED_BUFFER101 = 0x0594 |
| 218 | SHARED_BUFFER102 = 0x0598 |
| 219 | SHARED_BUFFER103 = 0x059C |
| 220 | SHARED_BUFFER104 = 0x05A0 |
| 221 | SHARED_BUFFER105 = 0x05A4 |
| 222 | SHARED_BUFFER106 = 0x05A8 |
| 223 | SHARED_BUFFER107 = 0x05AC |
| 224 | SHARED_BUFFER108 = 0x05B0 |
| 225 | SHARED_BUFFER109 = 0x05B4 |
| 226 | SHARED_BUFFER110 = 0x05B8 |
| 227 | SHARED_BUFFER111 = 0x05BC |
| 228 | SHARED_BUFFER112 = 0x05C0 |
| 229 | SHARED_BUFFER113 = 0x05C4 |
| 230 | SHARED_BUFFER114 = 0x05C8 |
| 231 | SHARED_BUFFER115 = 0x05CC |
| 232 | SHARED_BUFFER116 = 0x05D0 |
| 233 | SHARED_BUFFER117 = 0x05D4 |
| 234 | SHARED_BUFFER118 = 0x05D8 |
| 235 | SHARED_BUFFER119 = 0x05DC |
| 236 | SHARED_BUFFER120 = 0x05E0 |
| 237 | SHARED_BUFFER121 = 0x05E4 |
| 238 | SHARED_BUFFER122 = 0x05E8 |
| 239 | SHARED_BUFFER123 = 0x05EC |
| 240 | SHARED_BUFFER124 = 0x05F0 |
| 241 | SHARED_BUFFER125 = 0x05F4 |
| 242 | SHARED_BUFFER126 = 0x05F8 |
| 243 | SHARED_BUFFER127 = 0x05FC |
| 244 | SHARED_BUFFER128 = 0x0600 |
| 245 | SHARED_BUFFER129 = 0x0604 |
| 246 | SHARED_BUFFER130 = 0x0608 |
| 247 | SHARED_BUFFER131 = 0x060C |
| 248 | SHARED_BUFFER132 = 0x0610 |
| 249 | SHARED_BUFFER133 = 0x0614 |
| 250 | SHARED_BUFFER134 = 0x0618 |
| 251 | SHARED_BUFFER135 = 0x061C |
| 252 | SHARED_BUFFER136 = 0x0620 |
| 253 | SHARED_BUFFER137 = 0x0624 |
| 254 | SHARED_BUFFER138 = 0x0628 |
| 255 | SHARED_BUFFER139 = 0x062C |
| 256 | SHARED_BUFFER140 = 0x0630 |
| 257 | SHARED_BUFFER141 = 0x0634 |
| 258 | SHARED_BUFFER142 = 0x0638 |
| 259 | SHARED_BUFFER143 = 0x063C |
| 260 | SHARED_BUFFER144 = 0x0640 |
| 261 | SHARED_BUFFER145 = 0x0644 |
| 262 | SHARED_BUFFER146 = 0x0648 |
| 263 | SHARED_BUFFER147 = 0x064C |
| 264 | SHARED_BUFFER148 = 0x0650 |
| 265 | SHARED_BUFFER149 = 0x0654 |
| 266 | SHARED_BUFFER150 = 0x0658 |
| 267 | SHARED_BUFFER151 = 0x065C |
| 268 | SHARED_BUFFER152 = 0x0660 |
| 269 | SHARED_BUFFER153 = 0x0664 |
| 270 | SHARED_BUFFER154 = 0x0668 |
| 271 | SHARED_BUFFER155 = 0x066C |
| 272 | SHARED_BUFFER156 = 0x0670 |
| 273 | SHARED_BUFFER157 = 0x0674 |
| 274 | SHARED_BUFFER158 = 0x0678 |
| 275 | SHARED_BUFFER159 = 0x067C |
| 276 | SHARED_BUFFER160 = 0x0680 |
| 277 | SHARED_BUFFER161 = 0x0684 |
| 278 | SHARED_BUFFER162 = 0x0688 |
| 279 | SHARED_BUFFER163 = 0x068C |
| 280 | SHARED_BUFFER164 = 0x0690 |
| 281 | SHARED_BUFFER165 = 0x0694 |
| 282 | SHARED_BUFFER166 = 0x0698 |
| 283 | SHARED_BUFFER167 = 0x069C |
| 284 | SHARED_BUFFER168 = 0x06A0 |
| 285 | SHARED_BUFFER169 = 0x06A4 |
| 286 | SHARED_BUFFER170 = 0x06A8 |
| 287 | SHARED_BUFFER171 = 0x06AC |
| 288 | SHARED_BUFFER172 = 0x06B0 |
| 289 | SHARED_BUFFER173 = 0x06B4 |
| 290 | SHARED_BUFFER174 = 0x06B8 |
| 291 | SHARED_BUFFER175 = 0x06BC |
| 292 | SHARED_BUFFER176 = 0x06C0 |
| 293 | SHARED_BUFFER177 = 0x06C4 |
| 294 | SHARED_BUFFER178 = 0x06C8 |
| 295 | SHARED_BUFFER179 = 0x06CC |
| 296 | SHARED_BUFFER180 = 0x06D0 |
| 297 | SHARED_BUFFER181 = 0x06D4 |
| 298 | SHARED_BUFFER182 = 0x06D8 |
| 299 | SHARED_BUFFER183 = 0x06DC |
| 300 | SHARED_BUFFER184 = 0x06E0 |
| 301 | SHARED_BUFFER185 = 0x06E4 |
| 302 | SHARED_BUFFER186 = 0x06E8 |
| 303 | SHARED_BUFFER187 = 0x06EC |
| 304 | SHARED_BUFFER188 = 0x06F0 |
| 305 | SHARED_BUFFER189 = 0x06F4 |
| 306 | SHARED_BUFFER190 = 0x06F8 |
| 307 | SHARED_BUFFER191 = 0x06FC |
| 308 | SHARED_BUFFER192 = 0x0700 |
| 309 | SHARED_BUFFER193 = 0x0704 |
| 310 | SHARED_BUFFER194 = 0x0708 |
| 311 | SHARED_BUFFER195 = 0x070C |
| 312 | SHARED_BUFFER196 = 0x0710 |
| 313 | SHARED_BUFFER197 = 0x0714 |
| 314 | SHARED_BUFFER198 = 0x0718 |
| 315 | SHARED_BUFFER199 = 0x071C |
| 316 | SHARED_BUFFER200 = 0x0720 |
| 317 | SHARED_BUFFER201 = 0x0724 |
| 318 | SHARED_BUFFER202 = 0x0728 |
| 319 | SHARED_BUFFER203 = 0x072C |
| 320 | SHARED_BUFFER204 = 0x0730 |
| 321 | SHARED_BUFFER205 = 0x0734 |
| 322 | SHARED_BUFFER206 = 0x0738 |
| 323 | SHARED_BUFFER207 = 0x073C |
| 324 | SHARED_BUFFER208 = 0x0740 |
| 325 | SHARED_BUFFER209 = 0x0744 |
| 326 | SHARED_BUFFER210 = 0x0748 |
| 327 | SHARED_BUFFER211 = 0x074C |
| 328 | SHARED_BUFFER212 = 0x0750 |
| 329 | SHARED_BUFFER213 = 0x0754 |
| 330 | SHARED_BUFFER214 = 0x0758 |
| 331 | SHARED_BUFFER215 = 0x075C |
| 332 | SHARED_BUFFER216 = 0x0760 |
| 333 | SHARED_BUFFER217 = 0x0764 |
| 334 | SHARED_BUFFER218 = 0x0768 |
| 335 | SHARED_BUFFER219 = 0x076C |
| 336 | SHARED_BUFFER220 = 0x0770 |
| 337 | SHARED_BUFFER221 = 0x0774 |
| 338 | SHARED_BUFFER222 = 0x0778 |
| 339 | SHARED_BUFFER223 = 0x077C |
| 340 | SHARED_BUFFER224 = 0x0780 |
| 341 | SHARED_BUFFER225 = 0x0784 |
| 342 | SHARED_BUFFER226 = 0x0788 |
| 343 | SHARED_BUFFER227 = 0x078C |
| 344 | SHARED_BUFFER228 = 0x0790 |
| 345 | SHARED_BUFFER229 = 0x0794 |
| 346 | SHARED_BUFFER230 = 0x0798 |
| 347 | SHARED_BUFFER231 = 0x079C |
| 348 | SHARED_BUFFER232 = 0x07A0 |
| 349 | SHARED_BUFFER233 = 0x07A4 |
| 350 | SHARED_BUFFER234 = 0x07A8 |
| 351 | SHARED_BUFFER235 = 0x07AC |
| 352 | SHARED_BUFFER236 = 0x07B0 |
| 353 | SHARED_BUFFER237 = 0x07B4 |
| 354 | SHARED_BUFFER238 = 0x07B8 |
| 355 | SHARED_BUFFER239 = 0x07BC |
| 356 | SHARED_BUFFER240 = 0x07C0 |
| 357 | SHARED_BUFFER241 = 0x07C4 |
| 358 | SHARED_BUFFER242 = 0x07C8 |
| 359 | SHARED_BUFFER243 = 0x07CC |
| 360 | SHARED_BUFFER244 = 0x07D0 |
| 361 | SHARED_BUFFER245 = 0x07D4 |
| 362 | SHARED_BUFFER246 = 0x07D8 |
| 363 | SHARED_BUFFER247 = 0x07DC |
| 364 | SHARED_BUFFER248 = 0x07E0 |
| 365 | SHARED_BUFFER249 = 0x07E4 |
| 366 | SHARED_BUFFER250 = 0x07E8 |
| 367 | SHARED_BUFFER251 = 0x07EC |
| 368 | SHARED_BUFFER252 = 0x07F0 |
| 369 | SHARED_BUFFER253 = 0x07F4 |
| 370 | SHARED_BUFFER254 = 0x07F8 |
| 371 | SHARED_BUFFER255 = 0x07FC |
| 372 | SIZE = 0x0800 |
| 373 | |
Douglas Troha | 77f8396 | 2020-05-14 16:36:17 +0200 | [diff] [blame] | 374 | class TSU(Enum): |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 375 | IFM_PAD_TOP = 0x0800 |
| 376 | IFM_PAD_LEFT = 0x0804 |
| 377 | IFM_PAD_RIGHT = 0x0808 |
| 378 | IFM_PAD_BOTTOM = 0x080C |
| 379 | IFM_DEPTH_M1 = 0x0810 |
| 380 | IFM_PRECISION = 0x0814 |
| 381 | IFM_UPSCALE = 0x081C |
| 382 | IFM_ZERO_POINT = 0x0824 |
| 383 | IFM_WIDTH0_M1 = 0x0828 |
| 384 | IFM_HEIGHT0_M1 = 0x082C |
| 385 | IFM_HEIGHT1_M1 = 0x0830 |
| 386 | IFM_IB_END = 0x0834 |
| 387 | IFM_REGION = 0x083C |
| 388 | OFM_WIDTH_M1 = 0x0844 |
| 389 | OFM_HEIGHT_M1 = 0x0848 |
| 390 | OFM_DEPTH_M1 = 0x084C |
| 391 | OFM_PRECISION = 0x0850 |
| 392 | OFM_BLK_WIDTH_M1 = 0x0854 |
| 393 | OFM_BLK_HEIGHT_M1 = 0x0858 |
| 394 | OFM_BLK_DEPTH_M1 = 0x085C |
| 395 | OFM_ZERO_POINT = 0x0860 |
| 396 | OFM_WIDTH0_M1 = 0x0868 |
| 397 | OFM_HEIGHT0_M1 = 0x086C |
| 398 | OFM_HEIGHT1_M1 = 0x0870 |
| 399 | OFM_REGION = 0x087C |
| 400 | KERNEL_WIDTH_M1 = 0x0880 |
| 401 | KERNEL_HEIGHT_M1 = 0x0884 |
| 402 | KERNEL_STRIDE = 0x0888 |
| 403 | PARALLEL_MODE = 0x088C |
| 404 | ACC_FORMAT = 0x0890 |
| 405 | ACTIVATION = 0x0894 |
| 406 | ACTIVATION_MIN = 0x0898 |
| 407 | ACTIVATION_MAX = 0x089C |
| 408 | WEIGHT_REGION = 0x08A0 |
| 409 | SCALE_REGION = 0x08A4 |
| 410 | AB_START = 0x08B4 |
| 411 | BLOCKDEP = 0x08BC |
| 412 | DMA0_SRC_REGION = 0x08C0 |
| 413 | DMA0_DST_REGION = 0x08C4 |
| 414 | DMA0_SIZE0 = 0x08C8 |
| 415 | DMA0_SIZE1 = 0x08CC |
| 416 | IFM2_BROADCAST = 0x0900 |
| 417 | IFM2_SCALAR = 0x0904 |
| 418 | IFM2_PRECISION = 0x0914 |
| 419 | IFM2_ZERO_POINT = 0x0924 |
| 420 | IFM2_WIDTH0_M1 = 0x0928 |
| 421 | IFM2_HEIGHT0_M1 = 0x092C |
| 422 | IFM2_HEIGHT1_M1 = 0x0930 |
| 423 | IFM2_IB_START = 0x0934 |
| 424 | IFM2_REGION = 0x093C |
| 425 | IFM_BASE0 = 0x0A00 |
| 426 | IFM_BASE0_HI = 0x0A04 |
| 427 | IFM_BASE1 = 0x0A08 |
| 428 | IFM_BASE1_HI = 0x0A0C |
| 429 | IFM_BASE2 = 0x0A10 |
| 430 | IFM_BASE2_HI = 0x0A14 |
| 431 | IFM_BASE3 = 0x0A18 |
| 432 | IFM_BASE3_HI = 0x0A1C |
| 433 | IFM_STRIDE_X = 0x0A20 |
| 434 | IFM_STRIDE_X_HI = 0x0A24 |
| 435 | IFM_STRIDE_Y = 0x0A28 |
| 436 | IFM_STRIDE_Y_HI = 0x0A2C |
| 437 | IFM_STRIDE_C = 0x0A30 |
| 438 | IFM_STRIDE_C_HI = 0x0A34 |
| 439 | OFM_BASE0 = 0x0A40 |
| 440 | OFM_BASE0_HI = 0x0A44 |
| 441 | OFM_BASE1 = 0x0A48 |
| 442 | OFM_BASE1_HI = 0x0A4C |
| 443 | OFM_BASE2 = 0x0A50 |
| 444 | OFM_BASE2_HI = 0x0A54 |
| 445 | OFM_BASE3 = 0x0A58 |
| 446 | OFM_BASE3_HI = 0x0A5C |
| 447 | OFM_STRIDE_X = 0x0A60 |
| 448 | OFM_STRIDE_X_HI = 0x0A64 |
| 449 | OFM_STRIDE_Y = 0x0A68 |
| 450 | OFM_STRIDE_Y_HI = 0x0A6C |
| 451 | OFM_STRIDE_C = 0x0A70 |
| 452 | OFM_STRIDE_C_HI = 0x0A74 |
| 453 | WEIGHT_BASE = 0x0A80 |
| 454 | WEIGHT_BASE_HI = 0x0A84 |
| 455 | WEIGHT_LENGTH = 0x0A88 |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 456 | SCALE_BASE = 0x0A90 |
| 457 | SCALE_BASE_HI = 0x0A94 |
| 458 | SCALE_LENGTH = 0x0A98 |
| 459 | OFM_SCALE = 0x0AA0 |
| 460 | OFM_SCALE_SHIFT = 0x0AA4 |
| 461 | OPA_SCALE = 0x0AA8 |
| 462 | OPA_SCALE_SHIFT = 0x0AAC |
| 463 | OPB_SCALE = 0x0AB0 |
| 464 | DMA0_SRC = 0x0AC0 |
| 465 | DMA0_SRC_HI = 0x0AC4 |
| 466 | DMA0_DST = 0x0AC8 |
| 467 | DMA0_DST_HI = 0x0ACC |
| 468 | DMA0_LEN = 0x0AD0 |
| 469 | DMA0_LEN_HI = 0x0AD4 |
| 470 | DMA0_SKIP0 = 0x0AD8 |
| 471 | DMA0_SKIP0_HI = 0x0ADC |
| 472 | DMA0_SKIP1 = 0x0AE0 |
| 473 | DMA0_SKIP1_HI = 0x0AE4 |
| 474 | IFM2_BASE0 = 0x0B00 |
| 475 | IFM2_BASE0_HI = 0x0B04 |
| 476 | IFM2_BASE1 = 0x0B08 |
| 477 | IFM2_BASE1_HI = 0x0B0C |
| 478 | IFM2_BASE2 = 0x0B10 |
| 479 | IFM2_BASE2_HI = 0x0B14 |
| 480 | IFM2_BASE3 = 0x0B18 |
| 481 | IFM2_BASE3_HI = 0x0B1C |
| 482 | IFM2_STRIDE_X = 0x0B20 |
| 483 | IFM2_STRIDE_X_HI = 0x0B24 |
| 484 | IFM2_STRIDE_Y = 0x0B28 |
| 485 | IFM2_STRIDE_Y_HI = 0x0B2C |
| 486 | IFM2_STRIDE_C = 0x0B30 |
| 487 | IFM2_STRIDE_C_HI = 0x0B34 |
| 488 | WEIGHT1_BASE = 0x0B40 |
| 489 | WEIGHT1_BASE_HI = 0x0B44 |
| 490 | WEIGHT1_LENGTH = 0x0B48 |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 491 | SCALE1_BASE = 0x0B50 |
| 492 | SCALE1_BASE_HI = 0x0B54 |
| 493 | SCALE1_LENGTH = 0x0B58 |
| 494 | SIZE = 0x0B5C |
| 495 | |
Douglas Troha | 77f8396 | 2020-05-14 16:36:17 +0200 | [diff] [blame] | 496 | class TSU_DEBUG(Enum): |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 497 | KERNEL_X = 0x0200 |
| 498 | KERNEL_Y = 0x0204 |
| 499 | KERNEL_W_M1 = 0x0208 |
| 500 | KERNEL_H_M1 = 0x020C |
| 501 | OFM_CBLK_WIDTH_M1 = 0x0210 |
| 502 | OFM_CBLK_HEIGHT_M1 = 0x0214 |
| 503 | OFM_CBLK_DEPTH_M1 = 0x0218 |
| 504 | IFM_CBLK_DEPTH_M1 = 0x021C |
| 505 | OFM_X = 0x0220 |
| 506 | OFM_Y = 0x0224 |
| 507 | OFM_Z = 0x0228 |
| 508 | IFM_Z = 0x022C |
| 509 | PAD_TOP = 0x0230 |
| 510 | PAD_LEFT = 0x0234 |
| 511 | IFM_CBLK_WIDTH = 0x0238 |
| 512 | IFM_CBLK_HEIGHT = 0x023C |
| 513 | DMA_IFM_SRC = 0x0240 |
| 514 | DMA_IFM_SRC_HI = 0x0244 |
| 515 | DMA_IFM_DST = 0x0248 |
| 516 | DMA_OFM_SRC = 0x024C |
| 517 | DMA_OFM_DST = 0x0250 |
| 518 | DMA_OFM_DST_HI = 0x0254 |
| 519 | DMA_WEIGHT_SRC = 0x0258 |
| 520 | DMA_WEIGHT_SRC_HI = 0x025C |
| 521 | DMA_CMD_SRC = 0x0260 |
| 522 | DMA_CMD_SRC_HI = 0x0264 |
| 523 | DMA_CMD_SIZE = 0x0268 |
| 524 | DMA_M2M_SRC = 0x026C |
| 525 | DMA_M2M_SRC_HI = 0x0270 |
| 526 | DMA_M2M_DST = 0x0274 |
| 527 | DMA_M2M_DST_HI = 0x0278 |
| 528 | CURRENT_QREAD = 0x027C |
| 529 | DMA_SCALE_SRC = 0x0280 |
| 530 | DMA_SCALE_SRC_HI = 0x0284 |
Stefan Nannesson | e55e274 | 2020-08-20 12:53:24 +0200 | [diff] [blame] | 531 | CURRENT_BLOCK = 0x02B4 |
| 532 | CURRENT_OP = 0x02B8 |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 533 | CURRENT_CMD = 0x02BC |
| 534 | SIZE = 0x02C0 |
| 535 | |
| 536 | |
| 537 | |
| 538 | class acc_format(Enum): |
| 539 | INT_32BIT = 0 |
| 540 | INT_40BIT = 1 |
| 541 | FP_S5_10 = 2 |
| 542 | |
| 543 | class activation(Enum): |
| 544 | NONE = 0 |
| 545 | TANH = 3 |
| 546 | SIGMOID = 4 |
| 547 | LUT_START = 16 |
| 548 | LUT_END = 23 |
| 549 | |
Stefan Nannesson | e55e274 | 2020-08-20 12:53:24 +0200 | [diff] [blame] | 550 | class axi_mem_encoding_type(Enum): |
| 551 | DEVICE_NON_BUFFERABLE = 0x0 |
| 552 | DEVICE_BUFFERABLE = 0x1 |
| 553 | NORMAL_NON_CACHEABLE_NON_BUFFERABLE = 0x2 |
| 554 | NORMAL_NON_CACHEABLE_BUFFERABLE = 0x3 |
| 555 | WRITE_THROUGH_NO_ALLOCATE = 0x4 |
| 556 | WRITE_THROUGH_READ_ALLOCATE = 0x5 |
| 557 | WRITE_THROUGH_WRITE_ALLOCATE = 0x6 |
| 558 | WRITE_THROUGH_READ_AND_WRITE_ALLOCATE = 0x7 |
| 559 | WRITE_BACK_NO_ALLOCATE = 0x8 |
| 560 | WRITE_BACK_READ_ALLOCATE = 0x9 |
| 561 | WRITE_BACK_WRITE_ALLOCATE = 0xA |
| 562 | WRITE_BACK_READ_AND_WRITE_ALLOCATE = 0xB |
| 563 | RESERVED_12 = 0xC |
| 564 | RESERVED_13 = 0xD |
| 565 | RESERVED_14 = 0xE |
| 566 | RESERVED_15 = 0xF |
| 567 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 568 | class clip_range(Enum): |
| 569 | OFM_PRECISION = 0 |
| 570 | FORCE_UINT8 = 2 |
| 571 | FORCE_INT8 = 3 |
| 572 | FORCE_INT16 = 5 |
| 573 | |
| 574 | class cmd0(Enum): |
| 575 | NPU_OP_STOP = 0x000 |
| 576 | NPU_OP_IRQ = 0x001 |
| 577 | NPU_OP_CONV = 0x002 |
| 578 | NPU_OP_DEPTHWISE = 0x003 |
| 579 | NPU_OP_POOL = 0x005 |
| 580 | NPU_OP_ELEMENTWISE = 0x006 |
| 581 | NPU_OP_DMA_START = 0x010 |
| 582 | NPU_OP_DMA_WAIT = 0x011 |
| 583 | NPU_OP_KERNEL_WAIT = 0x012 |
| 584 | NPU_OP_PMU_MASK = 0x013 |
| 585 | NPU_SET_IFM_PAD_TOP = 0x100 |
| 586 | NPU_SET_IFM_PAD_LEFT = 0x101 |
| 587 | NPU_SET_IFM_PAD_RIGHT = 0x102 |
| 588 | NPU_SET_IFM_PAD_BOTTOM = 0x103 |
| 589 | NPU_SET_IFM_DEPTH_M1 = 0x104 |
| 590 | NPU_SET_IFM_PRECISION = 0x105 |
| 591 | NPU_SET_IFM_UPSCALE = 0x107 |
| 592 | NPU_SET_IFM_ZERO_POINT = 0x109 |
| 593 | NPU_SET_IFM_WIDTH0_M1 = 0x10A |
| 594 | NPU_SET_IFM_HEIGHT0_M1 = 0x10B |
| 595 | NPU_SET_IFM_HEIGHT1_M1 = 0x10C |
| 596 | NPU_SET_IFM_IB_END = 0x10D |
| 597 | NPU_SET_IFM_REGION = 0x10F |
| 598 | NPU_SET_OFM_WIDTH_M1 = 0x111 |
| 599 | NPU_SET_OFM_HEIGHT_M1 = 0x112 |
| 600 | NPU_SET_OFM_DEPTH_M1 = 0x113 |
| 601 | NPU_SET_OFM_PRECISION = 0x114 |
| 602 | NPU_SET_OFM_BLK_WIDTH_M1 = 0x115 |
| 603 | NPU_SET_OFM_BLK_HEIGHT_M1 = 0x116 |
| 604 | NPU_SET_OFM_BLK_DEPTH_M1 = 0x117 |
| 605 | NPU_SET_OFM_ZERO_POINT = 0x118 |
| 606 | NPU_SET_OFM_WIDTH0_M1 = 0x11A |
| 607 | NPU_SET_OFM_HEIGHT0_M1 = 0x11B |
| 608 | NPU_SET_OFM_HEIGHT1_M1 = 0x11C |
| 609 | NPU_SET_OFM_REGION = 0x11F |
| 610 | NPU_SET_KERNEL_WIDTH_M1 = 0x120 |
| 611 | NPU_SET_KERNEL_HEIGHT_M1 = 0x121 |
| 612 | NPU_SET_KERNEL_STRIDE = 0x122 |
| 613 | NPU_SET_PARALLEL_MODE = 0x123 |
| 614 | NPU_SET_ACC_FORMAT = 0x124 |
| 615 | NPU_SET_ACTIVATION = 0x125 |
| 616 | NPU_SET_ACTIVATION_MIN = 0x126 |
| 617 | NPU_SET_ACTIVATION_MAX = 0x127 |
| 618 | NPU_SET_WEIGHT_REGION = 0x128 |
| 619 | NPU_SET_SCALE_REGION = 0x129 |
| 620 | NPU_SET_AB_START = 0x12D |
| 621 | NPU_SET_BLOCKDEP = 0x12F |
| 622 | NPU_SET_DMA0_SRC_REGION = 0x130 |
| 623 | NPU_SET_DMA0_DST_REGION = 0x131 |
| 624 | NPU_SET_DMA0_SIZE0 = 0x132 |
| 625 | NPU_SET_DMA0_SIZE1 = 0x133 |
| 626 | NPU_SET_IFM2_BROADCAST = 0x180 |
| 627 | NPU_SET_IFM2_SCALAR = 0x181 |
| 628 | NPU_SET_IFM2_PRECISION = 0x185 |
| 629 | NPU_SET_IFM2_ZERO_POINT = 0x189 |
| 630 | NPU_SET_IFM2_WIDTH0_M1 = 0x18A |
| 631 | NPU_SET_IFM2_HEIGHT0_M1 = 0x18B |
| 632 | NPU_SET_IFM2_HEIGHT1_M1 = 0x18C |
| 633 | NPU_SET_IFM2_IB_START = 0x18D |
| 634 | NPU_SET_IFM2_REGION = 0x18F |
| 635 | |
| 636 | class cmd1(Enum): |
| 637 | NPU_SET_IFM_BASE0 = 0x000 |
| 638 | NPU_SET_IFM_BASE1 = 0x001 |
| 639 | NPU_SET_IFM_BASE2 = 0x002 |
| 640 | NPU_SET_IFM_BASE3 = 0x003 |
| 641 | NPU_SET_IFM_STRIDE_X = 0x004 |
| 642 | NPU_SET_IFM_STRIDE_Y = 0x005 |
| 643 | NPU_SET_IFM_STRIDE_C = 0x006 |
| 644 | NPU_SET_OFM_BASE0 = 0x010 |
| 645 | NPU_SET_OFM_BASE1 = 0x011 |
| 646 | NPU_SET_OFM_BASE2 = 0x012 |
| 647 | NPU_SET_OFM_BASE3 = 0x013 |
| 648 | NPU_SET_OFM_STRIDE_X = 0x014 |
| 649 | NPU_SET_OFM_STRIDE_Y = 0x015 |
| 650 | NPU_SET_OFM_STRIDE_C = 0x016 |
| 651 | NPU_SET_WEIGHT_BASE = 0x020 |
| 652 | NPU_SET_WEIGHT_LENGTH = 0x021 |
| 653 | NPU_SET_SCALE_BASE = 0x022 |
| 654 | NPU_SET_SCALE_LENGTH = 0x023 |
| 655 | NPU_SET_OFM_SCALE = 0x024 |
| 656 | NPU_SET_OPA_SCALE = 0x025 |
| 657 | NPU_SET_OPB_SCALE = 0x026 |
| 658 | NPU_SET_DMA0_SRC = 0x030 |
| 659 | NPU_SET_DMA0_DST = 0x031 |
| 660 | NPU_SET_DMA0_LEN = 0x032 |
| 661 | NPU_SET_DMA0_SKIP0 = 0x033 |
| 662 | NPU_SET_DMA0_SKIP1 = 0x034 |
| 663 | NPU_SET_IFM2_BASE0 = 0x080 |
| 664 | NPU_SET_IFM2_BASE1 = 0x081 |
| 665 | NPU_SET_IFM2_BASE2 = 0x082 |
| 666 | NPU_SET_IFM2_BASE3 = 0x083 |
| 667 | NPU_SET_IFM2_STRIDE_X = 0x084 |
| 668 | NPU_SET_IFM2_STRIDE_Y = 0x085 |
| 669 | NPU_SET_IFM2_STRIDE_C = 0x086 |
| 670 | NPU_SET_WEIGHT1_BASE = 0x090 |
| 671 | NPU_SET_WEIGHT1_LENGTH = 0x091 |
| 672 | NPU_SET_SCALE1_BASE = 0x092 |
| 673 | NPU_SET_SCALE1_LENGTH = 0x093 |
| 674 | |
| 675 | class data_format(Enum): |
| 676 | NHWC = 0 |
| 677 | NHCWB16 = 1 |
| 678 | |
| 679 | class elementwise_mode(Enum): |
| 680 | MUL = 0 |
| 681 | ADD = 1 |
| 682 | SUB = 2 |
| 683 | MIN = 3 |
| 684 | MAX = 4 |
| 685 | LRELU = 5 |
| 686 | ABS = 6 |
| 687 | CLZ = 7 |
| 688 | SHR = 8 |
| 689 | SHL = 9 |
| 690 | |
| 691 | class ifm_precision(Enum): |
Diqing Zhong | fed918b | 2020-04-27 10:27:34 +0200 | [diff] [blame] | 692 | U8 = 0 |
| 693 | S8 = 1 |
| 694 | U16 = 4 |
| 695 | S16 = 5 |
| 696 | S32 = 9 |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 697 | |
| 698 | class ifm_scale_mode(Enum): |
| 699 | SCALE_16BIT = 0 |
| 700 | SCALE_OPA_32BIT = 1 |
| 701 | SCALE_OPB_32BIT = 2 |
| 702 | |
Diqing Zhong | b731170 | 2020-04-14 12:31:44 +0200 | [diff] [blame] | 703 | class macs_per_cc(Enum): |
| 704 | MACS_PER_CC_IS_5 = 0x5 |
| 705 | MACS_PER_CC_IS_6 = 0x6 |
| 706 | MACS_PER_CC_IS_7 = 0x7 |
| 707 | MACS_PER_CC_IS_8 = 0x8 |
| 708 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 709 | class memory_type(Enum): |
| 710 | AXI0_OUTSTANDING_COUNTER0 = 0 |
| 711 | AXI0_OUTSTANDING_COUNTER1 = 1 |
| 712 | AXI1_OUTSTANDING_COUNTER2 = 2 |
| 713 | AXI1_OUTSTANDING_COUNTER3 = 3 |
| 714 | |
| 715 | class ofm_precision(Enum): |
| 716 | U8 = 0 |
| 717 | S8 = 1 |
| 718 | U16 = 2 |
| 719 | S16 = 3 |
| 720 | S32 = 5 |
| 721 | |
| 722 | class pmu_event_type(Enum): |
Diqing Zhong | b731170 | 2020-04-14 12:31:44 +0200 | [diff] [blame] | 723 | NO_EVENT = 0x00 |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 724 | CYCLE = 0x11 |
| 725 | NPU_IDLE = 0x20 |
Douglas Troha | 22df2ad | 2020-05-08 13:09:13 +0200 | [diff] [blame] | 726 | CC_STALLED_ON_BLOCKDEP = 0x21 |
| 727 | CC_STALLED_ON_SHRAM_RECONFIG = 0x22 |
Douglas Troha | 83dec5c | 2020-06-15 13:01:03 +0200 | [diff] [blame] | 728 | NPU_ACTIVE = 0x23 |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 729 | MAC_ACTIVE = 0x30 |
| 730 | MAC_ACTIVE_8BIT = 0x31 |
| 731 | MAC_ACTIVE_16BIT = 0x32 |
| 732 | MAC_DPU_ACTIVE = 0x33 |
| 733 | MAC_STALLED_BY_WD_ACC = 0x34 |
| 734 | MAC_STALLED_BY_WD = 0x35 |
| 735 | MAC_STALLED_BY_ACC = 0x36 |
| 736 | MAC_STALLED_BY_IB = 0x37 |
Diqing Zhong | b731170 | 2020-04-14 12:31:44 +0200 | [diff] [blame] | 737 | MAC_ACTIVE_32BIT = 0x38 |
Douglas Troha | 22df2ad | 2020-05-08 13:09:13 +0200 | [diff] [blame] | 738 | MAC_STALLED_BY_INT_W = 0x39 |
| 739 | MAC_STALLED_BY_INT_ACC = 0x3A |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 740 | AO_ACTIVE = 0x40 |
| 741 | AO_ACTIVE_8BIT = 0x41 |
| 742 | AO_ACTIVE_16BIT = 0x42 |
| 743 | AO_STALLED_BY_OFMP_OB = 0x43 |
| 744 | AO_STALLED_BY_OFMP = 0x44 |
| 745 | AO_STALLED_BY_OB = 0x45 |
| 746 | AO_STALLED_BY_ACC_IB = 0x46 |
| 747 | AO_STALLED_BY_ACC = 0x47 |
| 748 | AO_STALLED_BY_IB = 0x48 |
| 749 | WD_ACTIVE = 0x50 |
| 750 | WD_STALLED = 0x51 |
| 751 | WD_STALLED_BY_WS = 0x52 |
| 752 | WD_STALLED_BY_WD_BUF = 0x53 |
| 753 | WD_PARSE_ACTIVE = 0x54 |
| 754 | WD_PARSE_STALLED = 0x55 |
| 755 | WD_PARSE_STALLED_IN = 0x56 |
| 756 | WD_PARSE_STALLED_OUT = 0x57 |
Diqing Zhong | b731170 | 2020-04-14 12:31:44 +0200 | [diff] [blame] | 757 | WD_TRANS_WS = 0x58 |
| 758 | WD_TRANS_WB = 0x59 |
| 759 | WD_TRANS_DW0 = 0x5a |
| 760 | WD_TRANS_DW1 = 0x5b |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 761 | AXI0_RD_TRANS_ACCEPTED = 0x80 |
| 762 | AXI0_RD_TRANS_COMPLETED = 0x81 |
| 763 | AXI0_RD_DATA_BEAT_RECEIVED = 0x82 |
| 764 | AXI0_RD_TRAN_REQ_STALLED = 0x83 |
| 765 | AXI0_WR_TRANS_ACCEPTED = 0x84 |
| 766 | AXI0_WR_TRANS_COMPLETED_M = 0x85 |
| 767 | AXI0_WR_TRANS_COMPLETED_S = 0x86 |
| 768 | AXI0_WR_DATA_BEAT_WRITTEN = 0x87 |
| 769 | AXI0_WR_TRAN_REQ_STALLED = 0x88 |
| 770 | AXI0_WR_DATA_BEAT_STALLED = 0x89 |
| 771 | AXI0_ENABLED_CYCLES = 0x8c |
| 772 | AXI0_RD_STALL_LIMIT = 0x8e |
| 773 | AXI0_WR_STALL_LIMIT = 0x8f |
| 774 | AXI1_RD_TRANS_ACCEPTED = 0x180 |
| 775 | AXI1_RD_TRANS_COMPLETED = 0x181 |
| 776 | AXI1_RD_DATA_BEAT_RECEIVED = 0x182 |
| 777 | AXI1_RD_TRAN_REQ_STALLED = 0x183 |
| 778 | AXI1_WR_TRANS_ACCEPTED = 0x184 |
| 779 | AXI1_WR_TRANS_COMPLETED_M = 0x185 |
| 780 | AXI1_WR_TRANS_COMPLETED_S = 0x186 |
| 781 | AXI1_WR_DATA_BEAT_WRITTEN = 0x187 |
| 782 | AXI1_WR_TRAN_REQ_STALLED = 0x188 |
| 783 | AXI1_WR_DATA_BEAT_STALLED = 0x189 |
| 784 | AXI1_ENABLED_CYCLES = 0x18c |
| 785 | AXI1_RD_STALL_LIMIT = 0x18e |
| 786 | AXI1_WR_STALL_LIMIT = 0x18f |
| 787 | AXI_LATENCY_ANY = 0xa0 |
| 788 | AXI_LATENCY_32 = 0xa1 |
| 789 | AXI_LATENCY_64 = 0xa2 |
| 790 | AXI_LATENCY_128 = 0xa3 |
| 791 | AXI_LATENCY_256 = 0xa4 |
| 792 | AXI_LATENCY_512 = 0xa5 |
| 793 | AXI_LATENCY_1024 = 0xa6 |
Stefan Nannesson | e55e274 | 2020-08-20 12:53:24 +0200 | [diff] [blame] | 794 | ECC_DMA = 0xb0 |
| 795 | ECC_SB0 = 0xb1 |
| 796 | ECC_SB1 = 0x1b1 |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 797 | |
| 798 | class pooling_mode(Enum): |
| 799 | MAX = 0 |
| 800 | AVERAGE = 1 |
| 801 | REDUCE_SUM = 2 |
| 802 | |
| 803 | class privilege_level(Enum): |
| 804 | USER = 0 |
| 805 | PRIVILEGED = 1 |
| 806 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 807 | class resampling_mode(Enum): |
| 808 | NONE = 0 |
| 809 | NEAREST = 1 |
| 810 | TRANSPOSE = 2 |
| 811 | |
| 812 | class rounding(Enum): |
| 813 | TFL = 0 |
| 814 | TRUNCATE = 1 |
| 815 | NATURAL = 2 |
| 816 | |
| 817 | class security_level(Enum): |
| 818 | SECURE = 0 |
| 819 | NON_SECURE = 1 |
| 820 | |
Diqing Zhong | b731170 | 2020-04-14 12:31:44 +0200 | [diff] [blame] | 821 | class shram_size(Enum): |
Stefan Nannesson | e55e274 | 2020-08-20 12:53:24 +0200 | [diff] [blame] | 822 | SHRAM_96KB = 0x60 |
Diqing Zhong | b731170 | 2020-04-14 12:31:44 +0200 | [diff] [blame] | 823 | SHRAM_48KB = 0x30 |
| 824 | SHRAM_24KB = 0x18 |
| 825 | SHRAM_16KB = 0x10 |
| 826 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 827 | class state(Enum): |
| 828 | STOPPED = 0 |
| 829 | RUNNING = 1 |
| 830 | |
| 831 | class stride_mode(Enum): |
| 832 | STRIDE_MODE_1D = 0 |
| 833 | STRIDE_MODE_2D = 1 |
| 834 | STRIDE_MODE_3D = 2 |
| 835 | |
| 836 | |
Douglas Troha | 77f8396 | 2020-05-14 16:36:17 +0200 | [diff] [blame] | 837 | class id_r(Union): |
| 838 | class _bitfield(Structure): |
| 839 | _fields_ = [ |
| 840 | ("version_status", c_uint32, 4), |
| 841 | ("version_minor", c_uint32, 4), |
| 842 | ("version_major", c_uint32, 4), |
| 843 | ("product_major", c_uint32, 4), |
| 844 | ("arch_patch_rev", c_uint32, 4), |
| 845 | ("arch_minor_rev", c_uint32, 8), |
| 846 | ("arch_major_rev", c_uint32, 4), |
| 847 | ] |
| 848 | _fields_ = [("bits", _bitfield), |
| 849 | ("word", c_uint32)] |
| 850 | def set_version_status(self, value): self.bits.version_status = value |
| 851 | def get_version_status(self): value = self.bits.version_status; return value |
| 852 | def set_version_minor(self, value): self.bits.version_minor = value |
| 853 | def get_version_minor(self): value = self.bits.version_minor; return value |
| 854 | def set_version_major(self, value): self.bits.version_major = value |
| 855 | def get_version_major(self): value = self.bits.version_major; return value |
| 856 | def set_product_major(self, value): self.bits.product_major = value |
| 857 | def get_product_major(self): value = self.bits.product_major; return value |
| 858 | def set_arch_patch_rev(self, value): self.bits.arch_patch_rev = value |
| 859 | def get_arch_patch_rev(self): value = self.bits.arch_patch_rev; return value |
| 860 | def set_arch_minor_rev(self, value): self.bits.arch_minor_rev = value |
| 861 | def get_arch_minor_rev(self): value = self.bits.arch_minor_rev; return value |
| 862 | def set_arch_major_rev(self, value): self.bits.arch_major_rev = value |
| 863 | def get_arch_major_rev(self): value = self.bits.arch_major_rev; return value |
| 864 | |
| 865 | |
| 866 | class status_r(Union): |
| 867 | class _bitfield(Structure): |
| 868 | _fields_ = [ |
| 869 | ("state", c_uint32, 1), |
| 870 | ("irq_raised", c_uint32, 1), |
| 871 | ("bus_status", c_uint32, 1), |
| 872 | ("reset_status", c_uint32, 1), |
| 873 | ("cmd_parse_error", c_uint32, 1), |
| 874 | ("cmd_end_reached", c_uint32, 1), |
| 875 | ("pmu_irq_raised", c_uint32, 1), |
| 876 | ("wd_fault", c_uint32, 1), |
Stefan Nannesson | e55e274 | 2020-08-20 12:53:24 +0200 | [diff] [blame] | 877 | ("ecc_fault", c_uint32, 1), |
| 878 | ("reserved0", c_uint32, 2), |
Douglas Troha | 77f8396 | 2020-05-14 16:36:17 +0200 | [diff] [blame] | 879 | ("faulting_interface", c_uint32, 1), |
| 880 | ("faulting_channel", c_uint32, 4), |
| 881 | ("irq_history_mask", c_uint32, 16), |
| 882 | ] |
| 883 | _fields_ = [("bits", _bitfield), |
| 884 | ("word", c_uint32)] |
| 885 | def set_state(self, value): self.bits.state = value |
| 886 | def get_state(self): value = self.bits.state; return value |
| 887 | def set_irq_raised(self, value): self.bits.irq_raised = value |
| 888 | def get_irq_raised(self): value = self.bits.irq_raised; return value |
| 889 | def set_bus_status(self, value): self.bits.bus_status = value |
| 890 | def get_bus_status(self): value = self.bits.bus_status; return value |
| 891 | def set_reset_status(self, value): self.bits.reset_status = value |
| 892 | def get_reset_status(self): value = self.bits.reset_status; return value |
| 893 | def set_cmd_parse_error(self, value): self.bits.cmd_parse_error = value |
| 894 | def get_cmd_parse_error(self): value = self.bits.cmd_parse_error; return value |
| 895 | def set_cmd_end_reached(self, value): self.bits.cmd_end_reached = value |
| 896 | def get_cmd_end_reached(self): value = self.bits.cmd_end_reached; return value |
| 897 | def set_pmu_irq_raised(self, value): self.bits.pmu_irq_raised = value |
| 898 | def get_pmu_irq_raised(self): value = self.bits.pmu_irq_raised; return value |
| 899 | def set_wd_fault(self, value): self.bits.wd_fault = value |
| 900 | def get_wd_fault(self): value = self.bits.wd_fault; return value |
Stefan Nannesson | e55e274 | 2020-08-20 12:53:24 +0200 | [diff] [blame] | 901 | def set_ecc_fault(self, value): self.bits.ecc_fault = value |
| 902 | def get_ecc_fault(self): value = self.bits.ecc_fault; return value |
Douglas Troha | 77f8396 | 2020-05-14 16:36:17 +0200 | [diff] [blame] | 903 | def set_faulting_interface(self, value): self.bits.faulting_interface = value |
| 904 | def get_faulting_interface(self): value = self.bits.faulting_interface; return value |
| 905 | def set_faulting_channel(self, value): self.bits.faulting_channel = value |
| 906 | def get_faulting_channel(self): value = self.bits.faulting_channel; return value |
| 907 | def set_irq_history_mask(self, value): self.bits.irq_history_mask = value |
| 908 | def get_irq_history_mask(self): value = self.bits.irq_history_mask; return value |
| 909 | |
| 910 | |
| 911 | class cmd_r(Union): |
| 912 | class _bitfield(Structure): |
| 913 | _fields_ = [ |
| 914 | ("transition_to_running_state", c_uint32, 1), |
| 915 | ("clear_irq", c_uint32, 1), |
| 916 | ("clock_q_enable", c_uint32, 1), |
| 917 | ("power_q_enable", c_uint32, 1), |
| 918 | ("stop_request", c_uint32, 1), |
| 919 | ("reserved0", c_uint32, 11), |
| 920 | ("clear_irq_history", c_uint32, 16), |
| 921 | ] |
| 922 | _fields_ = [("bits", _bitfield), |
| 923 | ("word", c_uint32)] |
| 924 | def set_transition_to_running_state(self, value): self.bits.transition_to_running_state = value |
| 925 | def get_transition_to_running_state(self): value = self.bits.transition_to_running_state; return value |
| 926 | def set_clear_irq(self, value): self.bits.clear_irq = value |
| 927 | def get_clear_irq(self): value = self.bits.clear_irq; return value |
| 928 | def set_clock_q_enable(self, value): self.bits.clock_q_enable = value |
| 929 | def get_clock_q_enable(self): value = self.bits.clock_q_enable; return value |
| 930 | def set_power_q_enable(self, value): self.bits.power_q_enable = value |
| 931 | def get_power_q_enable(self): value = self.bits.power_q_enable; return value |
| 932 | def set_stop_request(self, value): self.bits.stop_request = value |
| 933 | def get_stop_request(self): value = self.bits.stop_request; return value |
| 934 | def set_clear_irq_history(self, value): self.bits.clear_irq_history = value |
| 935 | def get_clear_irq_history(self): value = self.bits.clear_irq_history; return value |
| 936 | |
| 937 | |
| 938 | class reset_r(Union): |
| 939 | class _bitfield(Structure): |
| 940 | _fields_ = [ |
| 941 | ("pending_cpl", c_uint32, 1), |
| 942 | ("pending_csl", c_uint32, 1), |
| 943 | ("reserved0", c_uint32, 30), |
| 944 | ] |
| 945 | _fields_ = [("bits", _bitfield), |
| 946 | ("word", c_uint32)] |
| 947 | def set_pending_cpl(self, value): self.bits.pending_cpl = value |
| 948 | def get_pending_cpl(self): value = self.bits.pending_cpl; return value |
| 949 | def set_pending_csl(self, value): self.bits.pending_csl = value |
| 950 | def get_pending_csl(self): value = self.bits.pending_csl; return value |
| 951 | |
| 952 | |
| 953 | class qbase0_r(Union): |
| 954 | class _bitfield(Structure): |
| 955 | _fields_ = [ |
| 956 | ("qbase0", c_uint32, 32), |
| 957 | ] |
| 958 | _fields_ = [("bits", _bitfield), |
| 959 | ("word", c_uint32)] |
| 960 | def set_qbase0(self, value): self.bits.qbase0 = value |
| 961 | def get_qbase0(self): value = self.bits.qbase0; return value |
| 962 | |
| 963 | |
| 964 | class qbase1_r(Union): |
| 965 | class _bitfield(Structure): |
| 966 | _fields_ = [ |
| 967 | ("qbase1", c_uint32, 32), |
| 968 | ] |
| 969 | _fields_ = [("bits", _bitfield), |
| 970 | ("word", c_uint32)] |
| 971 | def set_qbase1(self, value): self.bits.qbase1 = value |
| 972 | def get_qbase1(self): value = self.bits.qbase1; return value |
| 973 | |
| 974 | |
| 975 | class qread_r(Union): |
| 976 | class _bitfield(Structure): |
| 977 | _fields_ = [ |
| 978 | ("qread", c_uint32, 32), |
| 979 | ] |
| 980 | _fields_ = [("bits", _bitfield), |
| 981 | ("word", c_uint32)] |
| 982 | def set_qread(self, value): self.bits.qread = value |
| 983 | def get_qread(self): value = self.bits.qread; return value |
| 984 | |
| 985 | |
| 986 | class qconfig_r(Union): |
| 987 | class _bitfield(Structure): |
| 988 | _fields_ = [ |
| 989 | ("qconfig", c_uint32, 32), |
| 990 | ] |
| 991 | _fields_ = [("bits", _bitfield), |
| 992 | ("word", c_uint32)] |
| 993 | def set_qconfig(self, value): self.bits.qconfig = value |
| 994 | def get_qconfig(self): value = self.bits.qconfig; return value |
| 995 | |
| 996 | |
| 997 | class qsize_r(Union): |
| 998 | class _bitfield(Structure): |
| 999 | _fields_ = [ |
| 1000 | ("qsize", c_uint32, 32), |
| 1001 | ] |
| 1002 | _fields_ = [("bits", _bitfield), |
| 1003 | ("word", c_uint32)] |
| 1004 | def set_qsize(self, value): self.bits.qsize = value |
| 1005 | def get_qsize(self): value = self.bits.qsize; return value |
| 1006 | |
| 1007 | |
| 1008 | class prot_r(Union): |
| 1009 | class _bitfield(Structure): |
| 1010 | _fields_ = [ |
| 1011 | ("active_cpl", c_uint32, 1), |
| 1012 | ("active_csl", c_uint32, 1), |
| 1013 | ("reserved0", c_uint32, 30), |
| 1014 | ] |
| 1015 | _fields_ = [("bits", _bitfield), |
| 1016 | ("word", c_uint32)] |
| 1017 | def set_active_cpl(self, value): self.bits.active_cpl = value |
| 1018 | def get_active_cpl(self): value = self.bits.active_cpl; return value |
| 1019 | def set_active_csl(self, value): self.bits.active_csl = value |
| 1020 | def get_active_csl(self): value = self.bits.active_csl; return value |
| 1021 | |
| 1022 | |
| 1023 | class config_r(Union): |
| 1024 | class _bitfield(Structure): |
| 1025 | _fields_ = [ |
| 1026 | ("macs_per_cc", c_uint32, 4), |
| 1027 | ("cmd_stream_version", c_uint32, 4), |
| 1028 | ("shram_size", c_uint32, 8), |
| 1029 | ("reserved0", c_uint32, 12), |
| 1030 | ("product", c_uint32, 4), |
| 1031 | ] |
| 1032 | _fields_ = [("bits", _bitfield), |
| 1033 | ("word", c_uint32)] |
| 1034 | def set_macs_per_cc(self, value): self.bits.macs_per_cc = value |
| 1035 | def get_macs_per_cc(self): value = self.bits.macs_per_cc; return value |
| 1036 | def set_cmd_stream_version(self, value): self.bits.cmd_stream_version = value |
| 1037 | def get_cmd_stream_version(self): value = self.bits.cmd_stream_version; return value |
| 1038 | def set_shram_size(self, value): self.bits.shram_size = value |
| 1039 | def get_shram_size(self): value = self.bits.shram_size; return value |
| 1040 | def set_product(self, value): self.bits.product = value |
| 1041 | def get_product(self): value = self.bits.product; return value |
| 1042 | |
| 1043 | |
| 1044 | class lock_r(Union): |
| 1045 | class _bitfield(Structure): |
| 1046 | _fields_ = [ |
| 1047 | ("lock", c_uint32, 32), |
| 1048 | ] |
| 1049 | _fields_ = [("bits", _bitfield), |
| 1050 | ("word", c_uint32)] |
| 1051 | def set_lock(self, value): self.bits.lock = value |
| 1052 | def get_lock(self): value = self.bits.lock; return value |
| 1053 | |
| 1054 | |
| 1055 | class regioncfg_r(Union): |
| 1056 | class _bitfield(Structure): |
| 1057 | _fields_ = [ |
| 1058 | ("region0", c_uint32, 2), |
| 1059 | ("region1", c_uint32, 2), |
| 1060 | ("region2", c_uint32, 2), |
| 1061 | ("region3", c_uint32, 2), |
| 1062 | ("region4", c_uint32, 2), |
| 1063 | ("region5", c_uint32, 2), |
| 1064 | ("region6", c_uint32, 2), |
| 1065 | ("region7", c_uint32, 2), |
| 1066 | ("reserved0", c_uint32, 16), |
| 1067 | ] |
| 1068 | _fields_ = [("bits", _bitfield), |
| 1069 | ("word", c_uint32)] |
| 1070 | def set_region0(self, value): self.bits.region0 = value |
| 1071 | def get_region0(self): value = self.bits.region0; return value |
| 1072 | def set_region1(self, value): self.bits.region1 = value |
| 1073 | def get_region1(self): value = self.bits.region1; return value |
| 1074 | def set_region2(self, value): self.bits.region2 = value |
| 1075 | def get_region2(self): value = self.bits.region2; return value |
| 1076 | def set_region3(self, value): self.bits.region3 = value |
| 1077 | def get_region3(self): value = self.bits.region3; return value |
| 1078 | def set_region4(self, value): self.bits.region4 = value |
| 1079 | def get_region4(self): value = self.bits.region4; return value |
| 1080 | def set_region5(self, value): self.bits.region5 = value |
| 1081 | def get_region5(self): value = self.bits.region5; return value |
| 1082 | def set_region6(self, value): self.bits.region6 = value |
| 1083 | def get_region6(self): value = self.bits.region6; return value |
| 1084 | def set_region7(self, value): self.bits.region7 = value |
| 1085 | def get_region7(self): value = self.bits.region7; return value |
| 1086 | |
| 1087 | |
| 1088 | class axi_limit0_r(Union): |
| 1089 | class _bitfield(Structure): |
| 1090 | _fields_ = [ |
| 1091 | ("max_beats", c_uint32, 2), |
| 1092 | ("reserved0", c_uint32, 2), |
| 1093 | ("memtype", c_uint32, 4), |
| 1094 | ("reserved1", c_uint32, 8), |
| 1095 | ("max_outstanding_read_m1", c_uint32, 8), |
| 1096 | ("max_outstanding_write_m1", c_uint32, 8), |
| 1097 | ] |
| 1098 | _fields_ = [("bits", _bitfield), |
| 1099 | ("word", c_uint32)] |
| 1100 | def set_max_beats(self, value): self.bits.max_beats = value |
| 1101 | def get_max_beats(self): value = self.bits.max_beats; return value |
| 1102 | def set_memtype(self, value): self.bits.memtype = value |
| 1103 | def get_memtype(self): value = self.bits.memtype; return value |
| 1104 | def set_max_outstanding_read_m1(self, value): self.bits.max_outstanding_read_m1 = value |
| 1105 | def get_max_outstanding_read_m1(self): value = self.bits.max_outstanding_read_m1; return value |
| 1106 | def set_max_outstanding_write_m1(self, value): self.bits.max_outstanding_write_m1 = value |
| 1107 | def get_max_outstanding_write_m1(self): value = self.bits.max_outstanding_write_m1; return value |
| 1108 | |
| 1109 | |
| 1110 | class axi_limit1_r(Union): |
| 1111 | class _bitfield(Structure): |
| 1112 | _fields_ = [ |
| 1113 | ("max_beats", c_uint32, 2), |
| 1114 | ("reserved0", c_uint32, 2), |
| 1115 | ("memtype", c_uint32, 4), |
| 1116 | ("reserved1", c_uint32, 8), |
| 1117 | ("max_outstanding_read_m1", c_uint32, 8), |
| 1118 | ("max_outstanding_write_m1", c_uint32, 8), |
| 1119 | ] |
| 1120 | _fields_ = [("bits", _bitfield), |
| 1121 | ("word", c_uint32)] |
| 1122 | def set_max_beats(self, value): self.bits.max_beats = value |
| 1123 | def get_max_beats(self): value = self.bits.max_beats; return value |
| 1124 | def set_memtype(self, value): self.bits.memtype = value |
| 1125 | def get_memtype(self): value = self.bits.memtype; return value |
| 1126 | def set_max_outstanding_read_m1(self, value): self.bits.max_outstanding_read_m1 = value |
| 1127 | def get_max_outstanding_read_m1(self): value = self.bits.max_outstanding_read_m1; return value |
| 1128 | def set_max_outstanding_write_m1(self, value): self.bits.max_outstanding_write_m1 = value |
| 1129 | def get_max_outstanding_write_m1(self): value = self.bits.max_outstanding_write_m1; return value |
| 1130 | |
| 1131 | |
| 1132 | class axi_limit2_r(Union): |
| 1133 | class _bitfield(Structure): |
| 1134 | _fields_ = [ |
| 1135 | ("max_beats", c_uint32, 2), |
| 1136 | ("reserved0", c_uint32, 2), |
| 1137 | ("memtype", c_uint32, 4), |
| 1138 | ("reserved1", c_uint32, 8), |
| 1139 | ("max_outstanding_read_m1", c_uint32, 8), |
| 1140 | ("max_outstanding_write_m1", c_uint32, 8), |
| 1141 | ] |
| 1142 | _fields_ = [("bits", _bitfield), |
| 1143 | ("word", c_uint32)] |
| 1144 | def set_max_beats(self, value): self.bits.max_beats = value |
| 1145 | def get_max_beats(self): value = self.bits.max_beats; return value |
| 1146 | def set_memtype(self, value): self.bits.memtype = value |
| 1147 | def get_memtype(self): value = self.bits.memtype; return value |
| 1148 | def set_max_outstanding_read_m1(self, value): self.bits.max_outstanding_read_m1 = value |
| 1149 | def get_max_outstanding_read_m1(self): value = self.bits.max_outstanding_read_m1; return value |
| 1150 | def set_max_outstanding_write_m1(self, value): self.bits.max_outstanding_write_m1 = value |
| 1151 | def get_max_outstanding_write_m1(self): value = self.bits.max_outstanding_write_m1; return value |
| 1152 | |
| 1153 | |
| 1154 | class axi_limit3_r(Union): |
| 1155 | class _bitfield(Structure): |
| 1156 | _fields_ = [ |
| 1157 | ("max_beats", c_uint32, 2), |
| 1158 | ("reserved0", c_uint32, 2), |
| 1159 | ("memtype", c_uint32, 4), |
| 1160 | ("reserved1", c_uint32, 8), |
| 1161 | ("max_outstanding_read_m1", c_uint32, 8), |
| 1162 | ("max_outstanding_write_m1", c_uint32, 8), |
| 1163 | ] |
| 1164 | _fields_ = [("bits", _bitfield), |
| 1165 | ("word", c_uint32)] |
| 1166 | def set_max_beats(self, value): self.bits.max_beats = value |
| 1167 | def get_max_beats(self): value = self.bits.max_beats; return value |
| 1168 | def set_memtype(self, value): self.bits.memtype = value |
| 1169 | def get_memtype(self): value = self.bits.memtype; return value |
| 1170 | def set_max_outstanding_read_m1(self, value): self.bits.max_outstanding_read_m1 = value |
| 1171 | def get_max_outstanding_read_m1(self): value = self.bits.max_outstanding_read_m1; return value |
| 1172 | def set_max_outstanding_write_m1(self, value): self.bits.max_outstanding_write_m1 = value |
| 1173 | def get_max_outstanding_write_m1(self): value = self.bits.max_outstanding_write_m1; return value |
| 1174 | |
| 1175 | |
| 1176 | class basep0_r(Union): |
| 1177 | class _bitfield(Structure): |
| 1178 | _fields_ = [ |
| 1179 | ("addr_word", c_uint32, 32), |
| 1180 | ] |
| 1181 | _fields_ = [("bits", _bitfield), |
| 1182 | ("word", c_uint32)] |
| 1183 | def set_addr_word(self, value): self.bits.addr_word = value |
| 1184 | def get_addr_word(self): value = self.bits.addr_word; return value |
| 1185 | |
| 1186 | |
| 1187 | class basep1_r(Union): |
| 1188 | class _bitfield(Structure): |
| 1189 | _fields_ = [ |
| 1190 | ("addr_word", c_uint32, 32), |
| 1191 | ] |
| 1192 | _fields_ = [("bits", _bitfield), |
| 1193 | ("word", c_uint32)] |
| 1194 | def set_addr_word(self, value): self.bits.addr_word = value |
| 1195 | def get_addr_word(self): value = self.bits.addr_word; return value |
| 1196 | |
| 1197 | |
| 1198 | class basep2_r(Union): |
| 1199 | class _bitfield(Structure): |
| 1200 | _fields_ = [ |
| 1201 | ("addr_word", c_uint32, 32), |
| 1202 | ] |
| 1203 | _fields_ = [("bits", _bitfield), |
| 1204 | ("word", c_uint32)] |
| 1205 | def set_addr_word(self, value): self.bits.addr_word = value |
| 1206 | def get_addr_word(self): value = self.bits.addr_word; return value |
| 1207 | |
| 1208 | |
| 1209 | class basep3_r(Union): |
| 1210 | class _bitfield(Structure): |
| 1211 | _fields_ = [ |
| 1212 | ("addr_word", c_uint32, 32), |
| 1213 | ] |
| 1214 | _fields_ = [("bits", _bitfield), |
| 1215 | ("word", c_uint32)] |
| 1216 | def set_addr_word(self, value): self.bits.addr_word = value |
| 1217 | def get_addr_word(self): value = self.bits.addr_word; return value |
| 1218 | |
| 1219 | |
| 1220 | class basep4_r(Union): |
| 1221 | class _bitfield(Structure): |
| 1222 | _fields_ = [ |
| 1223 | ("addr_word", c_uint32, 32), |
| 1224 | ] |
| 1225 | _fields_ = [("bits", _bitfield), |
| 1226 | ("word", c_uint32)] |
| 1227 | def set_addr_word(self, value): self.bits.addr_word = value |
| 1228 | def get_addr_word(self): value = self.bits.addr_word; return value |
| 1229 | |
| 1230 | |
| 1231 | class basep5_r(Union): |
| 1232 | class _bitfield(Structure): |
| 1233 | _fields_ = [ |
| 1234 | ("addr_word", c_uint32, 32), |
| 1235 | ] |
| 1236 | _fields_ = [("bits", _bitfield), |
| 1237 | ("word", c_uint32)] |
| 1238 | def set_addr_word(self, value): self.bits.addr_word = value |
| 1239 | def get_addr_word(self): value = self.bits.addr_word; return value |
| 1240 | |
| 1241 | |
| 1242 | class basep6_r(Union): |
| 1243 | class _bitfield(Structure): |
| 1244 | _fields_ = [ |
| 1245 | ("addr_word", c_uint32, 32), |
| 1246 | ] |
| 1247 | _fields_ = [("bits", _bitfield), |
| 1248 | ("word", c_uint32)] |
| 1249 | def set_addr_word(self, value): self.bits.addr_word = value |
| 1250 | def get_addr_word(self): value = self.bits.addr_word; return value |
| 1251 | |
| 1252 | |
| 1253 | class basep7_r(Union): |
| 1254 | class _bitfield(Structure): |
| 1255 | _fields_ = [ |
| 1256 | ("addr_word", c_uint32, 32), |
| 1257 | ] |
| 1258 | _fields_ = [("bits", _bitfield), |
| 1259 | ("word", c_uint32)] |
| 1260 | def set_addr_word(self, value): self.bits.addr_word = value |
| 1261 | def get_addr_word(self): value = self.bits.addr_word; return value |
| 1262 | |
| 1263 | |
| 1264 | class basep8_r(Union): |
| 1265 | class _bitfield(Structure): |
| 1266 | _fields_ = [ |
| 1267 | ("addr_word", c_uint32, 32), |
| 1268 | ] |
| 1269 | _fields_ = [("bits", _bitfield), |
| 1270 | ("word", c_uint32)] |
| 1271 | def set_addr_word(self, value): self.bits.addr_word = value |
| 1272 | def get_addr_word(self): value = self.bits.addr_word; return value |
| 1273 | |
| 1274 | |
| 1275 | class basep9_r(Union): |
| 1276 | class _bitfield(Structure): |
| 1277 | _fields_ = [ |
| 1278 | ("addr_word", c_uint32, 32), |
| 1279 | ] |
| 1280 | _fields_ = [("bits", _bitfield), |
| 1281 | ("word", c_uint32)] |
| 1282 | def set_addr_word(self, value): self.bits.addr_word = value |
| 1283 | def get_addr_word(self): value = self.bits.addr_word; return value |
| 1284 | |
| 1285 | |
| 1286 | class basep10_r(Union): |
| 1287 | class _bitfield(Structure): |
| 1288 | _fields_ = [ |
| 1289 | ("addr_word", c_uint32, 32), |
| 1290 | ] |
| 1291 | _fields_ = [("bits", _bitfield), |
| 1292 | ("word", c_uint32)] |
| 1293 | def set_addr_word(self, value): self.bits.addr_word = value |
| 1294 | def get_addr_word(self): value = self.bits.addr_word; return value |
| 1295 | |
| 1296 | |
| 1297 | class basep11_r(Union): |
| 1298 | class _bitfield(Structure): |
| 1299 | _fields_ = [ |
| 1300 | ("addr_word", c_uint32, 32), |
| 1301 | ] |
| 1302 | _fields_ = [("bits", _bitfield), |
| 1303 | ("word", c_uint32)] |
| 1304 | def set_addr_word(self, value): self.bits.addr_word = value |
| 1305 | def get_addr_word(self): value = self.bits.addr_word; return value |
| 1306 | |
| 1307 | |
| 1308 | class basep12_r(Union): |
| 1309 | class _bitfield(Structure): |
| 1310 | _fields_ = [ |
| 1311 | ("addr_word", c_uint32, 32), |
| 1312 | ] |
| 1313 | _fields_ = [("bits", _bitfield), |
| 1314 | ("word", c_uint32)] |
| 1315 | def set_addr_word(self, value): self.bits.addr_word = value |
| 1316 | def get_addr_word(self): value = self.bits.addr_word; return value |
| 1317 | |
| 1318 | |
| 1319 | class basep13_r(Union): |
| 1320 | class _bitfield(Structure): |
| 1321 | _fields_ = [ |
| 1322 | ("addr_word", c_uint32, 32), |
| 1323 | ] |
| 1324 | _fields_ = [("bits", _bitfield), |
| 1325 | ("word", c_uint32)] |
| 1326 | def set_addr_word(self, value): self.bits.addr_word = value |
| 1327 | def get_addr_word(self): value = self.bits.addr_word; return value |
| 1328 | |
| 1329 | |
| 1330 | class basep14_r(Union): |
| 1331 | class _bitfield(Structure): |
| 1332 | _fields_ = [ |
| 1333 | ("addr_word", c_uint32, 32), |
| 1334 | ] |
| 1335 | _fields_ = [("bits", _bitfield), |
| 1336 | ("word", c_uint32)] |
| 1337 | def set_addr_word(self, value): self.bits.addr_word = value |
| 1338 | def get_addr_word(self): value = self.bits.addr_word; return value |
| 1339 | |
| 1340 | |
| 1341 | class basep15_r(Union): |
| 1342 | class _bitfield(Structure): |
| 1343 | _fields_ = [ |
| 1344 | ("addr_word", c_uint32, 32), |
| 1345 | ] |
| 1346 | _fields_ = [("bits", _bitfield), |
| 1347 | ("word", c_uint32)] |
| 1348 | def set_addr_word(self, value): self.bits.addr_word = value |
| 1349 | def get_addr_word(self): value = self.bits.addr_word; return value |
| 1350 | |
| 1351 | |
Douglas Troha | 22df2ad | 2020-05-08 13:09:13 +0200 | [diff] [blame] | 1352 | class wd_status_r(Union): |
| 1353 | class _bitfield(Structure): |
| 1354 | _fields_ = [ |
| 1355 | ("core_slice_state", c_uint32, 2), |
| 1356 | ("core_idle", c_uint32, 1), |
| 1357 | ("ctrl_state", c_uint32, 2), |
| 1358 | ("ctrl_idle", c_uint32, 1), |
| 1359 | ("write_buf_index0", c_uint32, 3), |
| 1360 | ("write_buf_valid0", c_uint32, 1), |
| 1361 | ("write_buf_idle0", c_uint32, 1), |
| 1362 | ("write_buf_index1", c_uint32, 3), |
| 1363 | ("write_buf_valid1", c_uint32, 1), |
| 1364 | ("write_buf_idle1", c_uint32, 1), |
| 1365 | ("events", c_uint32, 12), |
| 1366 | ("reserved0", c_uint32, 4), |
| 1367 | ] |
| 1368 | _fields_ = [("bits", _bitfield), |
| 1369 | ("word", c_uint32)] |
| 1370 | def set_core_slice_state(self, value): self.bits.core_slice_state = value |
| 1371 | def get_core_slice_state(self): value = self.bits.core_slice_state; return value |
| 1372 | def set_core_idle(self, value): self.bits.core_idle = value |
| 1373 | def get_core_idle(self): value = self.bits.core_idle; return value |
| 1374 | def set_ctrl_state(self, value): self.bits.ctrl_state = value |
| 1375 | def get_ctrl_state(self): value = self.bits.ctrl_state; return value |
| 1376 | def set_ctrl_idle(self, value): self.bits.ctrl_idle = value |
| 1377 | def get_ctrl_idle(self): value = self.bits.ctrl_idle; return value |
| 1378 | def set_write_buf_index0(self, value): self.bits.write_buf_index0 = value |
| 1379 | def get_write_buf_index0(self): value = self.bits.write_buf_index0; return value |
| 1380 | def set_write_buf_valid0(self, value): self.bits.write_buf_valid0 = value |
| 1381 | def get_write_buf_valid0(self): value = self.bits.write_buf_valid0; return value |
| 1382 | def set_write_buf_idle0(self, value): self.bits.write_buf_idle0 = value |
| 1383 | def get_write_buf_idle0(self): value = self.bits.write_buf_idle0; return value |
| 1384 | def set_write_buf_index1(self, value): self.bits.write_buf_index1 = value |
| 1385 | def get_write_buf_index1(self): value = self.bits.write_buf_index1; return value |
| 1386 | def set_write_buf_valid1(self, value): self.bits.write_buf_valid1 = value |
| 1387 | def get_write_buf_valid1(self): value = self.bits.write_buf_valid1; return value |
| 1388 | def set_write_buf_idle1(self, value): self.bits.write_buf_idle1 = value |
| 1389 | def get_write_buf_idle1(self): value = self.bits.write_buf_idle1; return value |
| 1390 | def set_events(self, value): self.bits.events = value |
| 1391 | def get_events(self): value = self.bits.events; return value |
| 1392 | |
| 1393 | |
| 1394 | class mac_status_r(Union): |
| 1395 | class _bitfield(Structure): |
| 1396 | _fields_ = [ |
| 1397 | ("block_cfg_valid", c_uint32, 1), |
| 1398 | ("trav_en", c_uint32, 1), |
| 1399 | ("wait_for_ib", c_uint32, 1), |
| 1400 | ("wait_for_acc_buf", c_uint32, 1), |
| 1401 | ("wait_for_weights", c_uint32, 1), |
| 1402 | ("stall_stripe", c_uint32, 1), |
| 1403 | ("dw_sel", c_uint32, 1), |
| 1404 | ("wait_for_dw0_ready", c_uint32, 1), |
| 1405 | ("wait_for_dw1_ready", c_uint32, 1), |
| 1406 | ("acc_buf_sel_ai", c_uint32, 1), |
| 1407 | ("wait_for_acc0_ready", c_uint32, 1), |
| 1408 | ("wait_for_acc1_ready", c_uint32, 1), |
| 1409 | ("acc_buf_sel_aa", c_uint32, 1), |
| 1410 | ("acc0_valid", c_uint32, 1), |
| 1411 | ("acc1_valid", c_uint32, 1), |
| 1412 | ("reserved0", c_uint32, 1), |
| 1413 | ("events", c_uint32, 11), |
| 1414 | ("reserved1", c_uint32, 5), |
| 1415 | ] |
| 1416 | _fields_ = [("bits", _bitfield), |
| 1417 | ("word", c_uint32)] |
| 1418 | def set_block_cfg_valid(self, value): self.bits.block_cfg_valid = value |
| 1419 | def get_block_cfg_valid(self): value = self.bits.block_cfg_valid; return value |
| 1420 | def set_trav_en(self, value): self.bits.trav_en = value |
| 1421 | def get_trav_en(self): value = self.bits.trav_en; return value |
| 1422 | def set_wait_for_ib(self, value): self.bits.wait_for_ib = value |
| 1423 | def get_wait_for_ib(self): value = self.bits.wait_for_ib; return value |
| 1424 | def set_wait_for_acc_buf(self, value): self.bits.wait_for_acc_buf = value |
| 1425 | def get_wait_for_acc_buf(self): value = self.bits.wait_for_acc_buf; return value |
| 1426 | def set_wait_for_weights(self, value): self.bits.wait_for_weights = value |
| 1427 | def get_wait_for_weights(self): value = self.bits.wait_for_weights; return value |
| 1428 | def set_stall_stripe(self, value): self.bits.stall_stripe = value |
| 1429 | def get_stall_stripe(self): value = self.bits.stall_stripe; return value |
| 1430 | def set_dw_sel(self, value): self.bits.dw_sel = value |
| 1431 | def get_dw_sel(self): value = self.bits.dw_sel; return value |
| 1432 | def set_wait_for_dw0_ready(self, value): self.bits.wait_for_dw0_ready = value |
| 1433 | def get_wait_for_dw0_ready(self): value = self.bits.wait_for_dw0_ready; return value |
| 1434 | def set_wait_for_dw1_ready(self, value): self.bits.wait_for_dw1_ready = value |
| 1435 | def get_wait_for_dw1_ready(self): value = self.bits.wait_for_dw1_ready; return value |
| 1436 | def set_acc_buf_sel_ai(self, value): self.bits.acc_buf_sel_ai = value |
| 1437 | def get_acc_buf_sel_ai(self): value = self.bits.acc_buf_sel_ai; return value |
| 1438 | def set_wait_for_acc0_ready(self, value): self.bits.wait_for_acc0_ready = value |
| 1439 | def get_wait_for_acc0_ready(self): value = self.bits.wait_for_acc0_ready; return value |
| 1440 | def set_wait_for_acc1_ready(self, value): self.bits.wait_for_acc1_ready = value |
| 1441 | def get_wait_for_acc1_ready(self): value = self.bits.wait_for_acc1_ready; return value |
| 1442 | def set_acc_buf_sel_aa(self, value): self.bits.acc_buf_sel_aa = value |
| 1443 | def get_acc_buf_sel_aa(self): value = self.bits.acc_buf_sel_aa; return value |
| 1444 | def set_acc0_valid(self, value): self.bits.acc0_valid = value |
| 1445 | def get_acc0_valid(self): value = self.bits.acc0_valid; return value |
| 1446 | def set_acc1_valid(self, value): self.bits.acc1_valid = value |
| 1447 | def get_acc1_valid(self): value = self.bits.acc1_valid; return value |
| 1448 | def set_events(self, value): self.bits.events = value |
| 1449 | def get_events(self): value = self.bits.events; return value |
| 1450 | |
| 1451 | |
| 1452 | class ao_status_r(Union): |
| 1453 | class _bitfield(Structure): |
| 1454 | _fields_ = [ |
| 1455 | ("cmd_sbw_valid", c_uint32, 1), |
| 1456 | ("cmd_act_valid", c_uint32, 1), |
| 1457 | ("cmd_ctl_valid", c_uint32, 1), |
| 1458 | ("cmd_scl_valid", c_uint32, 1), |
| 1459 | ("cmd_sbr_valid", c_uint32, 1), |
| 1460 | ("cmd_ofm_valid", c_uint32, 1), |
| 1461 | ("blk_cmd_ready", c_uint32, 1), |
| 1462 | ("blk_cmd_valid", c_uint32, 1), |
| 1463 | ("reserved0", c_uint32, 8), |
| 1464 | ("events", c_uint32, 8), |
| 1465 | ("reserved1", c_uint32, 8), |
| 1466 | ] |
| 1467 | _fields_ = [("bits", _bitfield), |
| 1468 | ("word", c_uint32)] |
| 1469 | def set_cmd_sbw_valid(self, value): self.bits.cmd_sbw_valid = value |
| 1470 | def get_cmd_sbw_valid(self): value = self.bits.cmd_sbw_valid; return value |
| 1471 | def set_cmd_act_valid(self, value): self.bits.cmd_act_valid = value |
| 1472 | def get_cmd_act_valid(self): value = self.bits.cmd_act_valid; return value |
| 1473 | def set_cmd_ctl_valid(self, value): self.bits.cmd_ctl_valid = value |
| 1474 | def get_cmd_ctl_valid(self): value = self.bits.cmd_ctl_valid; return value |
| 1475 | def set_cmd_scl_valid(self, value): self.bits.cmd_scl_valid = value |
| 1476 | def get_cmd_scl_valid(self): value = self.bits.cmd_scl_valid; return value |
| 1477 | def set_cmd_sbr_valid(self, value): self.bits.cmd_sbr_valid = value |
| 1478 | def get_cmd_sbr_valid(self): value = self.bits.cmd_sbr_valid; return value |
| 1479 | def set_cmd_ofm_valid(self, value): self.bits.cmd_ofm_valid = value |
| 1480 | def get_cmd_ofm_valid(self): value = self.bits.cmd_ofm_valid; return value |
| 1481 | def set_blk_cmd_ready(self, value): self.bits.blk_cmd_ready = value |
| 1482 | def get_blk_cmd_ready(self): value = self.bits.blk_cmd_ready; return value |
| 1483 | def set_blk_cmd_valid(self, value): self.bits.blk_cmd_valid = value |
| 1484 | def get_blk_cmd_valid(self): value = self.bits.blk_cmd_valid; return value |
| 1485 | def set_events(self, value): self.bits.events = value |
| 1486 | def get_events(self): value = self.bits.events; return value |
| 1487 | |
| 1488 | |
| 1489 | class dma_status0_r(Union): |
| 1490 | class _bitfield(Structure): |
| 1491 | _fields_ = [ |
| 1492 | ("cmd_idle", c_uint32, 1), |
| 1493 | ("ifm_idle", c_uint32, 1), |
| 1494 | ("wgt_idle_c0", c_uint32, 1), |
| 1495 | ("bas_idle_c0", c_uint32, 1), |
| 1496 | ("m2m_idle", c_uint32, 1), |
| 1497 | ("ofm_idle", c_uint32, 1), |
| 1498 | ("halt_req", c_uint32, 1), |
| 1499 | ("halt_ack", c_uint32, 1), |
| 1500 | ("pause_req", c_uint32, 1), |
| 1501 | ("pause_ack", c_uint32, 1), |
| 1502 | ("ib0_ai_valid_c0", c_uint32, 1), |
| 1503 | ("ib0_ai_ready_c0", c_uint32, 1), |
| 1504 | ("ib1_ai_valid_c0", c_uint32, 1), |
| 1505 | ("ib1_ai_ready_c0", c_uint32, 1), |
| 1506 | ("ib0_ao_valid_c0", c_uint32, 1), |
| 1507 | ("ib0_ao_ready_c0", c_uint32, 1), |
| 1508 | ("ib1_ao_valid_c0", c_uint32, 1), |
| 1509 | ("ib1_ao_ready_c0", c_uint32, 1), |
| 1510 | ("ob0_valid_c0", c_uint32, 1), |
| 1511 | ("ob0_ready_c0", c_uint32, 1), |
| 1512 | ("ob1_valid_c0", c_uint32, 1), |
| 1513 | ("ob1_ready_c0", c_uint32, 1), |
| 1514 | ("cmd_valid", c_uint32, 1), |
| 1515 | ("cmd_ready", c_uint32, 1), |
| 1516 | ("wd_bitstream_valid_c0", c_uint32, 1), |
| 1517 | ("wd_bitstream_ready_c0", c_uint32, 1), |
| 1518 | ("bs_bitstream_valid_c0", c_uint32, 1), |
| 1519 | ("bs_bitstream_ready_c0", c_uint32, 1), |
| 1520 | ("axi0_ar_stalled", c_uint32, 1), |
| 1521 | ("axi0_rd_limit_stall", c_uint32, 1), |
| 1522 | ("axi0_aw_stalled", c_uint32, 1), |
| 1523 | ("axi0_w_stalled", c_uint32, 1), |
| 1524 | ] |
| 1525 | _fields_ = [("bits", _bitfield), |
| 1526 | ("word", c_uint32)] |
| 1527 | def set_cmd_idle(self, value): self.bits.cmd_idle = value |
| 1528 | def get_cmd_idle(self): value = self.bits.cmd_idle; return value |
| 1529 | def set_ifm_idle(self, value): self.bits.ifm_idle = value |
| 1530 | def get_ifm_idle(self): value = self.bits.ifm_idle; return value |
| 1531 | def set_wgt_idle_c0(self, value): self.bits.wgt_idle_c0 = value |
| 1532 | def get_wgt_idle_c0(self): value = self.bits.wgt_idle_c0; return value |
| 1533 | def set_bas_idle_c0(self, value): self.bits.bas_idle_c0 = value |
| 1534 | def get_bas_idle_c0(self): value = self.bits.bas_idle_c0; return value |
| 1535 | def set_m2m_idle(self, value): self.bits.m2m_idle = value |
| 1536 | def get_m2m_idle(self): value = self.bits.m2m_idle; return value |
| 1537 | def set_ofm_idle(self, value): self.bits.ofm_idle = value |
| 1538 | def get_ofm_idle(self): value = self.bits.ofm_idle; return value |
| 1539 | def set_halt_req(self, value): self.bits.halt_req = value |
| 1540 | def get_halt_req(self): value = self.bits.halt_req; return value |
| 1541 | def set_halt_ack(self, value): self.bits.halt_ack = value |
| 1542 | def get_halt_ack(self): value = self.bits.halt_ack; return value |
| 1543 | def set_pause_req(self, value): self.bits.pause_req = value |
| 1544 | def get_pause_req(self): value = self.bits.pause_req; return value |
| 1545 | def set_pause_ack(self, value): self.bits.pause_ack = value |
| 1546 | def get_pause_ack(self): value = self.bits.pause_ack; return value |
| 1547 | def set_ib0_ai_valid_c0(self, value): self.bits.ib0_ai_valid_c0 = value |
| 1548 | def get_ib0_ai_valid_c0(self): value = self.bits.ib0_ai_valid_c0; return value |
| 1549 | def set_ib0_ai_ready_c0(self, value): self.bits.ib0_ai_ready_c0 = value |
| 1550 | def get_ib0_ai_ready_c0(self): value = self.bits.ib0_ai_ready_c0; return value |
| 1551 | def set_ib1_ai_valid_c0(self, value): self.bits.ib1_ai_valid_c0 = value |
| 1552 | def get_ib1_ai_valid_c0(self): value = self.bits.ib1_ai_valid_c0; return value |
| 1553 | def set_ib1_ai_ready_c0(self, value): self.bits.ib1_ai_ready_c0 = value |
| 1554 | def get_ib1_ai_ready_c0(self): value = self.bits.ib1_ai_ready_c0; return value |
| 1555 | def set_ib0_ao_valid_c0(self, value): self.bits.ib0_ao_valid_c0 = value |
| 1556 | def get_ib0_ao_valid_c0(self): value = self.bits.ib0_ao_valid_c0; return value |
| 1557 | def set_ib0_ao_ready_c0(self, value): self.bits.ib0_ao_ready_c0 = value |
| 1558 | def get_ib0_ao_ready_c0(self): value = self.bits.ib0_ao_ready_c0; return value |
| 1559 | def set_ib1_ao_valid_c0(self, value): self.bits.ib1_ao_valid_c0 = value |
| 1560 | def get_ib1_ao_valid_c0(self): value = self.bits.ib1_ao_valid_c0; return value |
| 1561 | def set_ib1_ao_ready_c0(self, value): self.bits.ib1_ao_ready_c0 = value |
| 1562 | def get_ib1_ao_ready_c0(self): value = self.bits.ib1_ao_ready_c0; return value |
| 1563 | def set_ob0_valid_c0(self, value): self.bits.ob0_valid_c0 = value |
| 1564 | def get_ob0_valid_c0(self): value = self.bits.ob0_valid_c0; return value |
| 1565 | def set_ob0_ready_c0(self, value): self.bits.ob0_ready_c0 = value |
| 1566 | def get_ob0_ready_c0(self): value = self.bits.ob0_ready_c0; return value |
| 1567 | def set_ob1_valid_c0(self, value): self.bits.ob1_valid_c0 = value |
| 1568 | def get_ob1_valid_c0(self): value = self.bits.ob1_valid_c0; return value |
| 1569 | def set_ob1_ready_c0(self, value): self.bits.ob1_ready_c0 = value |
| 1570 | def get_ob1_ready_c0(self): value = self.bits.ob1_ready_c0; return value |
| 1571 | def set_cmd_valid(self, value): self.bits.cmd_valid = value |
| 1572 | def get_cmd_valid(self): value = self.bits.cmd_valid; return value |
| 1573 | def set_cmd_ready(self, value): self.bits.cmd_ready = value |
| 1574 | def get_cmd_ready(self): value = self.bits.cmd_ready; return value |
| 1575 | def set_wd_bitstream_valid_c0(self, value): self.bits.wd_bitstream_valid_c0 = value |
| 1576 | def get_wd_bitstream_valid_c0(self): value = self.bits.wd_bitstream_valid_c0; return value |
| 1577 | def set_wd_bitstream_ready_c0(self, value): self.bits.wd_bitstream_ready_c0 = value |
| 1578 | def get_wd_bitstream_ready_c0(self): value = self.bits.wd_bitstream_ready_c0; return value |
| 1579 | def set_bs_bitstream_valid_c0(self, value): self.bits.bs_bitstream_valid_c0 = value |
| 1580 | def get_bs_bitstream_valid_c0(self): value = self.bits.bs_bitstream_valid_c0; return value |
| 1581 | def set_bs_bitstream_ready_c0(self, value): self.bits.bs_bitstream_ready_c0 = value |
| 1582 | def get_bs_bitstream_ready_c0(self): value = self.bits.bs_bitstream_ready_c0; return value |
| 1583 | def set_axi0_ar_stalled(self, value): self.bits.axi0_ar_stalled = value |
| 1584 | def get_axi0_ar_stalled(self): value = self.bits.axi0_ar_stalled; return value |
| 1585 | def set_axi0_rd_limit_stall(self, value): self.bits.axi0_rd_limit_stall = value |
| 1586 | def get_axi0_rd_limit_stall(self): value = self.bits.axi0_rd_limit_stall; return value |
| 1587 | def set_axi0_aw_stalled(self, value): self.bits.axi0_aw_stalled = value |
| 1588 | def get_axi0_aw_stalled(self): value = self.bits.axi0_aw_stalled; return value |
| 1589 | def set_axi0_w_stalled(self, value): self.bits.axi0_w_stalled = value |
| 1590 | def get_axi0_w_stalled(self): value = self.bits.axi0_w_stalled; return value |
| 1591 | |
| 1592 | |
| 1593 | class dma_status1_r(Union): |
| 1594 | class _bitfield(Structure): |
| 1595 | _fields_ = [ |
| 1596 | ("axi0_wr_limit_stall", c_uint32, 1), |
| 1597 | ("axi1_ar_stalled", c_uint32, 1), |
| 1598 | ("axi1_rd_limit_stall", c_uint32, 1), |
| 1599 | ("axi1_wr_stalled", c_uint32, 1), |
| 1600 | ("axi1_w_stalled", c_uint32, 1), |
| 1601 | ("axi1_wr_limit_stall", c_uint32, 1), |
| 1602 | ("wgt_idle_c1", c_uint32, 1), |
| 1603 | ("bas_idle_c1", c_uint32, 1), |
| 1604 | ("ib0_ai_valid_c1", c_uint32, 1), |
| 1605 | ("ib0_ai_ready_c1", c_uint32, 1), |
| 1606 | ("ib1_ai_valid_c1", c_uint32, 1), |
| 1607 | ("ib1_ai_ready_c1", c_uint32, 1), |
| 1608 | ("ib0_ao_valid_c1", c_uint32, 1), |
| 1609 | ("ib0_ao_ready_c1", c_uint32, 1), |
| 1610 | ("ib1_ao_valid_c1", c_uint32, 1), |
| 1611 | ("ib1_ao_ready_c1", c_uint32, 1), |
| 1612 | ("ob0_valid_c1", c_uint32, 1), |
| 1613 | ("ob0_ready_c1", c_uint32, 1), |
| 1614 | ("ob1_valid_c1", c_uint32, 1), |
| 1615 | ("ob1_ready_c1", c_uint32, 1), |
| 1616 | ("wd_bitstream_valid_c1", c_uint32, 1), |
| 1617 | ("wd_bitstream_ready_c1", c_uint32, 1), |
| 1618 | ("bs_bitstream_valid_c1", c_uint32, 1), |
| 1619 | ("bs_bitstream_ready_c1", c_uint32, 1), |
| 1620 | ("reserved0", c_uint32, 8), |
| 1621 | ] |
| 1622 | _fields_ = [("bits", _bitfield), |
| 1623 | ("word", c_uint32)] |
| 1624 | def set_axi0_wr_limit_stall(self, value): self.bits.axi0_wr_limit_stall = value |
| 1625 | def get_axi0_wr_limit_stall(self): value = self.bits.axi0_wr_limit_stall; return value |
| 1626 | def set_axi1_ar_stalled(self, value): self.bits.axi1_ar_stalled = value |
| 1627 | def get_axi1_ar_stalled(self): value = self.bits.axi1_ar_stalled; return value |
| 1628 | def set_axi1_rd_limit_stall(self, value): self.bits.axi1_rd_limit_stall = value |
| 1629 | def get_axi1_rd_limit_stall(self): value = self.bits.axi1_rd_limit_stall; return value |
| 1630 | def set_axi1_wr_stalled(self, value): self.bits.axi1_wr_stalled = value |
| 1631 | def get_axi1_wr_stalled(self): value = self.bits.axi1_wr_stalled; return value |
| 1632 | def set_axi1_w_stalled(self, value): self.bits.axi1_w_stalled = value |
| 1633 | def get_axi1_w_stalled(self): value = self.bits.axi1_w_stalled; return value |
| 1634 | def set_axi1_wr_limit_stall(self, value): self.bits.axi1_wr_limit_stall = value |
| 1635 | def get_axi1_wr_limit_stall(self): value = self.bits.axi1_wr_limit_stall; return value |
| 1636 | def set_wgt_idle_c1(self, value): self.bits.wgt_idle_c1 = value |
| 1637 | def get_wgt_idle_c1(self): value = self.bits.wgt_idle_c1; return value |
| 1638 | def set_bas_idle_c1(self, value): self.bits.bas_idle_c1 = value |
| 1639 | def get_bas_idle_c1(self): value = self.bits.bas_idle_c1; return value |
| 1640 | def set_ib0_ai_valid_c1(self, value): self.bits.ib0_ai_valid_c1 = value |
| 1641 | def get_ib0_ai_valid_c1(self): value = self.bits.ib0_ai_valid_c1; return value |
| 1642 | def set_ib0_ai_ready_c1(self, value): self.bits.ib0_ai_ready_c1 = value |
| 1643 | def get_ib0_ai_ready_c1(self): value = self.bits.ib0_ai_ready_c1; return value |
| 1644 | def set_ib1_ai_valid_c1(self, value): self.bits.ib1_ai_valid_c1 = value |
| 1645 | def get_ib1_ai_valid_c1(self): value = self.bits.ib1_ai_valid_c1; return value |
| 1646 | def set_ib1_ai_ready_c1(self, value): self.bits.ib1_ai_ready_c1 = value |
| 1647 | def get_ib1_ai_ready_c1(self): value = self.bits.ib1_ai_ready_c1; return value |
| 1648 | def set_ib0_ao_valid_c1(self, value): self.bits.ib0_ao_valid_c1 = value |
| 1649 | def get_ib0_ao_valid_c1(self): value = self.bits.ib0_ao_valid_c1; return value |
| 1650 | def set_ib0_ao_ready_c1(self, value): self.bits.ib0_ao_ready_c1 = value |
| 1651 | def get_ib0_ao_ready_c1(self): value = self.bits.ib0_ao_ready_c1; return value |
| 1652 | def set_ib1_ao_valid_c1(self, value): self.bits.ib1_ao_valid_c1 = value |
| 1653 | def get_ib1_ao_valid_c1(self): value = self.bits.ib1_ao_valid_c1; return value |
| 1654 | def set_ib1_ao_ready_c1(self, value): self.bits.ib1_ao_ready_c1 = value |
| 1655 | def get_ib1_ao_ready_c1(self): value = self.bits.ib1_ao_ready_c1; return value |
| 1656 | def set_ob0_valid_c1(self, value): self.bits.ob0_valid_c1 = value |
| 1657 | def get_ob0_valid_c1(self): value = self.bits.ob0_valid_c1; return value |
| 1658 | def set_ob0_ready_c1(self, value): self.bits.ob0_ready_c1 = value |
| 1659 | def get_ob0_ready_c1(self): value = self.bits.ob0_ready_c1; return value |
| 1660 | def set_ob1_valid_c1(self, value): self.bits.ob1_valid_c1 = value |
| 1661 | def get_ob1_valid_c1(self): value = self.bits.ob1_valid_c1; return value |
| 1662 | def set_ob1_ready_c1(self, value): self.bits.ob1_ready_c1 = value |
| 1663 | def get_ob1_ready_c1(self): value = self.bits.ob1_ready_c1; return value |
| 1664 | def set_wd_bitstream_valid_c1(self, value): self.bits.wd_bitstream_valid_c1 = value |
| 1665 | def get_wd_bitstream_valid_c1(self): value = self.bits.wd_bitstream_valid_c1; return value |
| 1666 | def set_wd_bitstream_ready_c1(self, value): self.bits.wd_bitstream_ready_c1 = value |
| 1667 | def get_wd_bitstream_ready_c1(self): value = self.bits.wd_bitstream_ready_c1; return value |
| 1668 | def set_bs_bitstream_valid_c1(self, value): self.bits.bs_bitstream_valid_c1 = value |
| 1669 | def get_bs_bitstream_valid_c1(self): value = self.bits.bs_bitstream_valid_c1; return value |
| 1670 | def set_bs_bitstream_ready_c1(self, value): self.bits.bs_bitstream_ready_c1 = value |
| 1671 | def get_bs_bitstream_ready_c1(self): value = self.bits.bs_bitstream_ready_c1; return value |
| 1672 | |
| 1673 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 1674 | class clkforce_r(Union): |
| 1675 | class _bitfield(Structure): |
| 1676 | _fields_ = [ |
| 1677 | ("top_level_clk", c_uint32, 1), |
| 1678 | ("cc_clk", c_uint32, 1), |
| 1679 | ("dma_clk", c_uint32, 1), |
| 1680 | ("mac_clk", c_uint32, 1), |
| 1681 | ("ao_clk", c_uint32, 1), |
| 1682 | ("wd_clk", c_uint32, 1), |
| 1683 | ("reserved0", c_uint32, 26), |
| 1684 | ] |
| 1685 | _fields_ = [("bits", _bitfield), |
| 1686 | ("word", c_uint32)] |
| 1687 | def set_top_level_clk(self, value): self.bits.top_level_clk = value |
| 1688 | def get_top_level_clk(self): value = self.bits.top_level_clk; return value |
| 1689 | def set_cc_clk(self, value): self.bits.cc_clk = value |
| 1690 | def get_cc_clk(self): value = self.bits.cc_clk; return value |
| 1691 | def set_dma_clk(self, value): self.bits.dma_clk = value |
| 1692 | def get_dma_clk(self): value = self.bits.dma_clk; return value |
| 1693 | def set_mac_clk(self, value): self.bits.mac_clk = value |
| 1694 | def get_mac_clk(self): value = self.bits.mac_clk; return value |
| 1695 | def set_ao_clk(self, value): self.bits.ao_clk = value |
| 1696 | def get_ao_clk(self): value = self.bits.ao_clk; return value |
| 1697 | def set_wd_clk(self, value): self.bits.wd_clk = value |
| 1698 | def get_wd_clk(self): value = self.bits.wd_clk; return value |
| 1699 | |
| 1700 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 1701 | class pid4_r(Union): |
| 1702 | class _bitfield(Structure): |
| 1703 | _fields_ = [ |
| 1704 | ("pid4", c_uint32, 32), |
| 1705 | ] |
| 1706 | _fields_ = [("bits", _bitfield), |
| 1707 | ("word", c_uint32)] |
| 1708 | def set_pid4(self, value): self.bits.pid4 = value |
| 1709 | def get_pid4(self): value = self.bits.pid4; return value |
| 1710 | |
| 1711 | |
| 1712 | class pid5_r(Union): |
| 1713 | class _bitfield(Structure): |
| 1714 | _fields_ = [ |
| 1715 | ("pid5", c_uint32, 32), |
| 1716 | ] |
| 1717 | _fields_ = [("bits", _bitfield), |
| 1718 | ("word", c_uint32)] |
| 1719 | def set_pid5(self, value): self.bits.pid5 = value |
| 1720 | def get_pid5(self): value = self.bits.pid5; return value |
| 1721 | |
| 1722 | |
| 1723 | class pid6_r(Union): |
| 1724 | class _bitfield(Structure): |
| 1725 | _fields_ = [ |
| 1726 | ("pid6", c_uint32, 32), |
| 1727 | ] |
| 1728 | _fields_ = [("bits", _bitfield), |
| 1729 | ("word", c_uint32)] |
| 1730 | def set_pid6(self, value): self.bits.pid6 = value |
| 1731 | def get_pid6(self): value = self.bits.pid6; return value |
| 1732 | |
| 1733 | |
| 1734 | class pid7_r(Union): |
| 1735 | class _bitfield(Structure): |
| 1736 | _fields_ = [ |
| 1737 | ("pid7", c_uint32, 32), |
| 1738 | ] |
| 1739 | _fields_ = [("bits", _bitfield), |
| 1740 | ("word", c_uint32)] |
| 1741 | def set_pid7(self, value): self.bits.pid7 = value |
| 1742 | def get_pid7(self): value = self.bits.pid7; return value |
| 1743 | |
| 1744 | |
| 1745 | class pid0_r(Union): |
| 1746 | class _bitfield(Structure): |
| 1747 | _fields_ = [ |
| 1748 | ("pid0", c_uint32, 32), |
| 1749 | ] |
| 1750 | _fields_ = [("bits", _bitfield), |
| 1751 | ("word", c_uint32)] |
| 1752 | def set_pid0(self, value): self.bits.pid0 = value |
| 1753 | def get_pid0(self): value = self.bits.pid0; return value |
| 1754 | |
| 1755 | |
| 1756 | class pid1_r(Union): |
| 1757 | class _bitfield(Structure): |
| 1758 | _fields_ = [ |
| 1759 | ("pid1", c_uint32, 32), |
| 1760 | ] |
| 1761 | _fields_ = [("bits", _bitfield), |
| 1762 | ("word", c_uint32)] |
| 1763 | def set_pid1(self, value): self.bits.pid1 = value |
| 1764 | def get_pid1(self): value = self.bits.pid1; return value |
| 1765 | |
| 1766 | |
| 1767 | class pid2_r(Union): |
| 1768 | class _bitfield(Structure): |
| 1769 | _fields_ = [ |
| 1770 | ("pid2", c_uint32, 32), |
| 1771 | ] |
| 1772 | _fields_ = [("bits", _bitfield), |
| 1773 | ("word", c_uint32)] |
| 1774 | def set_pid2(self, value): self.bits.pid2 = value |
| 1775 | def get_pid2(self): value = self.bits.pid2; return value |
| 1776 | |
| 1777 | |
| 1778 | class pid3_r(Union): |
| 1779 | class _bitfield(Structure): |
| 1780 | _fields_ = [ |
| 1781 | ("pid3", c_uint32, 32), |
| 1782 | ] |
| 1783 | _fields_ = [("bits", _bitfield), |
| 1784 | ("word", c_uint32)] |
| 1785 | def set_pid3(self, value): self.bits.pid3 = value |
| 1786 | def get_pid3(self): value = self.bits.pid3; return value |
| 1787 | |
| 1788 | |
| 1789 | class cid0_r(Union): |
| 1790 | class _bitfield(Structure): |
| 1791 | _fields_ = [ |
| 1792 | ("cid0", c_uint32, 32), |
| 1793 | ] |
| 1794 | _fields_ = [("bits", _bitfield), |
| 1795 | ("word", c_uint32)] |
| 1796 | def set_cid0(self, value): self.bits.cid0 = value |
| 1797 | def get_cid0(self): value = self.bits.cid0; return value |
| 1798 | |
| 1799 | |
| 1800 | class cid1_r(Union): |
| 1801 | class _bitfield(Structure): |
| 1802 | _fields_ = [ |
| 1803 | ("cid1", c_uint32, 32), |
| 1804 | ] |
| 1805 | _fields_ = [("bits", _bitfield), |
| 1806 | ("word", c_uint32)] |
| 1807 | def set_cid1(self, value): self.bits.cid1 = value |
| 1808 | def get_cid1(self): value = self.bits.cid1; return value |
| 1809 | |
| 1810 | |
| 1811 | class cid2_r(Union): |
| 1812 | class _bitfield(Structure): |
| 1813 | _fields_ = [ |
| 1814 | ("cid2", c_uint32, 32), |
| 1815 | ] |
| 1816 | _fields_ = [("bits", _bitfield), |
| 1817 | ("word", c_uint32)] |
| 1818 | def set_cid2(self, value): self.bits.cid2 = value |
| 1819 | def get_cid2(self): value = self.bits.cid2; return value |
| 1820 | |
| 1821 | |
| 1822 | class cid3_r(Union): |
| 1823 | class _bitfield(Structure): |
| 1824 | _fields_ = [ |
| 1825 | ("cid3", c_uint32, 32), |
| 1826 | ] |
| 1827 | _fields_ = [("bits", _bitfield), |
| 1828 | ("word", c_uint32)] |
| 1829 | def set_cid3(self, value): self.bits.cid3 = value |
| 1830 | def get_cid3(self): value = self.bits.cid3; return value |
| 1831 | |
| 1832 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 1833 | class pmcr_r(Union): |
| 1834 | class _bitfield(Structure): |
| 1835 | _fields_ = [ |
| 1836 | ("cnt_en", c_uint32, 1), |
| 1837 | ("event_cnt_rst", c_uint32, 1), |
| 1838 | ("cycle_cnt_rst", c_uint32, 1), |
| 1839 | ("mask_en", c_uint32, 1), |
| 1840 | ("reserved0", c_uint32, 7), |
| 1841 | ("num_event_cnt", c_uint32, 5), |
| 1842 | ("reserved1", c_uint32, 16), |
| 1843 | ] |
| 1844 | _fields_ = [("bits", _bitfield), |
| 1845 | ("word", c_uint32)] |
| 1846 | def set_cnt_en(self, value): self.bits.cnt_en = value |
| 1847 | def get_cnt_en(self): value = self.bits.cnt_en; return value |
| 1848 | def set_event_cnt_rst(self, value): self.bits.event_cnt_rst = value |
| 1849 | def get_event_cnt_rst(self): value = self.bits.event_cnt_rst; return value |
| 1850 | def set_cycle_cnt_rst(self, value): self.bits.cycle_cnt_rst = value |
| 1851 | def get_cycle_cnt_rst(self): value = self.bits.cycle_cnt_rst; return value |
| 1852 | def set_mask_en(self, value): self.bits.mask_en = value |
| 1853 | def get_mask_en(self): value = self.bits.mask_en; return value |
| 1854 | def set_num_event_cnt(self, value): self.bits.num_event_cnt = value |
| 1855 | def get_num_event_cnt(self): value = self.bits.num_event_cnt; return value |
| 1856 | |
| 1857 | |
| 1858 | class pmcntenset_r(Union): |
| 1859 | class _bitfield(Structure): |
| 1860 | _fields_ = [ |
| 1861 | ("event_cnt_0", c_uint32, 1), |
| 1862 | ("event_cnt_1", c_uint32, 1), |
| 1863 | ("event_cnt_2", c_uint32, 1), |
| 1864 | ("event_cnt_3", c_uint32, 1), |
| 1865 | ("reserved0", c_uint32, 27), |
| 1866 | ("cycle_cnt", c_uint32, 1), |
| 1867 | ] |
| 1868 | _fields_ = [("bits", _bitfield), |
| 1869 | ("word", c_uint32)] |
| 1870 | def set_event_cnt_0(self, value): self.bits.event_cnt_0 = value |
| 1871 | def get_event_cnt_0(self): value = self.bits.event_cnt_0; return value |
| 1872 | def set_event_cnt_1(self, value): self.bits.event_cnt_1 = value |
| 1873 | def get_event_cnt_1(self): value = self.bits.event_cnt_1; return value |
| 1874 | def set_event_cnt_2(self, value): self.bits.event_cnt_2 = value |
| 1875 | def get_event_cnt_2(self): value = self.bits.event_cnt_2; return value |
| 1876 | def set_event_cnt_3(self, value): self.bits.event_cnt_3 = value |
| 1877 | def get_event_cnt_3(self): value = self.bits.event_cnt_3; return value |
| 1878 | def set_cycle_cnt(self, value): self.bits.cycle_cnt = value |
| 1879 | def get_cycle_cnt(self): value = self.bits.cycle_cnt; return value |
| 1880 | |
| 1881 | |
| 1882 | class pmcntenclr_r(Union): |
| 1883 | class _bitfield(Structure): |
| 1884 | _fields_ = [ |
| 1885 | ("event_cnt_0", c_uint32, 1), |
| 1886 | ("event_cnt_1", c_uint32, 1), |
| 1887 | ("event_cnt_2", c_uint32, 1), |
| 1888 | ("event_cnt_3", c_uint32, 1), |
| 1889 | ("reserved0", c_uint32, 27), |
| 1890 | ("cycle_cnt", c_uint32, 1), |
| 1891 | ] |
| 1892 | _fields_ = [("bits", _bitfield), |
| 1893 | ("word", c_uint32)] |
| 1894 | def set_event_cnt_0(self, value): self.bits.event_cnt_0 = value |
| 1895 | def get_event_cnt_0(self): value = self.bits.event_cnt_0; return value |
| 1896 | def set_event_cnt_1(self, value): self.bits.event_cnt_1 = value |
| 1897 | def get_event_cnt_1(self): value = self.bits.event_cnt_1; return value |
| 1898 | def set_event_cnt_2(self, value): self.bits.event_cnt_2 = value |
| 1899 | def get_event_cnt_2(self): value = self.bits.event_cnt_2; return value |
| 1900 | def set_event_cnt_3(self, value): self.bits.event_cnt_3 = value |
| 1901 | def get_event_cnt_3(self): value = self.bits.event_cnt_3; return value |
| 1902 | def set_cycle_cnt(self, value): self.bits.cycle_cnt = value |
| 1903 | def get_cycle_cnt(self): value = self.bits.cycle_cnt; return value |
| 1904 | |
| 1905 | |
| 1906 | class pmovsset_r(Union): |
| 1907 | class _bitfield(Structure): |
| 1908 | _fields_ = [ |
| 1909 | ("event_cnt_0_ovf", c_uint32, 1), |
| 1910 | ("event_cnt_1_ovf", c_uint32, 1), |
| 1911 | ("event_cnt_2_ovf", c_uint32, 1), |
| 1912 | ("event_cnt_3_ovf", c_uint32, 1), |
| 1913 | ("reserved0", c_uint32, 27), |
| 1914 | ("cycle_cnt_ovf", c_uint32, 1), |
| 1915 | ] |
| 1916 | _fields_ = [("bits", _bitfield), |
| 1917 | ("word", c_uint32)] |
| 1918 | def set_event_cnt_0_ovf(self, value): self.bits.event_cnt_0_ovf = value |
| 1919 | def get_event_cnt_0_ovf(self): value = self.bits.event_cnt_0_ovf; return value |
| 1920 | def set_event_cnt_1_ovf(self, value): self.bits.event_cnt_1_ovf = value |
| 1921 | def get_event_cnt_1_ovf(self): value = self.bits.event_cnt_1_ovf; return value |
| 1922 | def set_event_cnt_2_ovf(self, value): self.bits.event_cnt_2_ovf = value |
| 1923 | def get_event_cnt_2_ovf(self): value = self.bits.event_cnt_2_ovf; return value |
| 1924 | def set_event_cnt_3_ovf(self, value): self.bits.event_cnt_3_ovf = value |
| 1925 | def get_event_cnt_3_ovf(self): value = self.bits.event_cnt_3_ovf; return value |
| 1926 | def set_cycle_cnt_ovf(self, value): self.bits.cycle_cnt_ovf = value |
| 1927 | def get_cycle_cnt_ovf(self): value = self.bits.cycle_cnt_ovf; return value |
| 1928 | |
| 1929 | |
| 1930 | class pmovsclr_r(Union): |
| 1931 | class _bitfield(Structure): |
| 1932 | _fields_ = [ |
| 1933 | ("event_cnt_0_ovf", c_uint32, 1), |
| 1934 | ("event_cnt_1_ovf", c_uint32, 1), |
| 1935 | ("event_cnt_2_ovf", c_uint32, 1), |
| 1936 | ("event_cnt_3_ovf", c_uint32, 1), |
| 1937 | ("reserved0", c_uint32, 27), |
| 1938 | ("cycle_cnt_ovf", c_uint32, 1), |
| 1939 | ] |
| 1940 | _fields_ = [("bits", _bitfield), |
| 1941 | ("word", c_uint32)] |
| 1942 | def set_event_cnt_0_ovf(self, value): self.bits.event_cnt_0_ovf = value |
| 1943 | def get_event_cnt_0_ovf(self): value = self.bits.event_cnt_0_ovf; return value |
| 1944 | def set_event_cnt_1_ovf(self, value): self.bits.event_cnt_1_ovf = value |
| 1945 | def get_event_cnt_1_ovf(self): value = self.bits.event_cnt_1_ovf; return value |
| 1946 | def set_event_cnt_2_ovf(self, value): self.bits.event_cnt_2_ovf = value |
| 1947 | def get_event_cnt_2_ovf(self): value = self.bits.event_cnt_2_ovf; return value |
| 1948 | def set_event_cnt_3_ovf(self, value): self.bits.event_cnt_3_ovf = value |
| 1949 | def get_event_cnt_3_ovf(self): value = self.bits.event_cnt_3_ovf; return value |
| 1950 | def set_cycle_cnt_ovf(self, value): self.bits.cycle_cnt_ovf = value |
| 1951 | def get_cycle_cnt_ovf(self): value = self.bits.cycle_cnt_ovf; return value |
| 1952 | |
| 1953 | |
| 1954 | class pmintset_r(Union): |
| 1955 | class _bitfield(Structure): |
| 1956 | _fields_ = [ |
| 1957 | ("event_cnt_0_int", c_uint32, 1), |
| 1958 | ("event_cnt_1_int", c_uint32, 1), |
| 1959 | ("event_cnt_2_int", c_uint32, 1), |
| 1960 | ("event_cnt_3_int", c_uint32, 1), |
| 1961 | ("reserved0", c_uint32, 27), |
| 1962 | ("cycle_cnt_int", c_uint32, 1), |
| 1963 | ] |
| 1964 | _fields_ = [("bits", _bitfield), |
| 1965 | ("word", c_uint32)] |
| 1966 | def set_event_cnt_0_int(self, value): self.bits.event_cnt_0_int = value |
| 1967 | def get_event_cnt_0_int(self): value = self.bits.event_cnt_0_int; return value |
| 1968 | def set_event_cnt_1_int(self, value): self.bits.event_cnt_1_int = value |
| 1969 | def get_event_cnt_1_int(self): value = self.bits.event_cnt_1_int; return value |
| 1970 | def set_event_cnt_2_int(self, value): self.bits.event_cnt_2_int = value |
| 1971 | def get_event_cnt_2_int(self): value = self.bits.event_cnt_2_int; return value |
| 1972 | def set_event_cnt_3_int(self, value): self.bits.event_cnt_3_int = value |
| 1973 | def get_event_cnt_3_int(self): value = self.bits.event_cnt_3_int; return value |
| 1974 | def set_cycle_cnt_int(self, value): self.bits.cycle_cnt_int = value |
| 1975 | def get_cycle_cnt_int(self): value = self.bits.cycle_cnt_int; return value |
| 1976 | |
| 1977 | |
| 1978 | class pmintclr_r(Union): |
| 1979 | class _bitfield(Structure): |
| 1980 | _fields_ = [ |
| 1981 | ("event_cnt_0_int", c_uint32, 1), |
| 1982 | ("event_cnt_1_int", c_uint32, 1), |
| 1983 | ("event_cnt_2_int", c_uint32, 1), |
| 1984 | ("event_cnt_3_int", c_uint32, 1), |
| 1985 | ("reserved0", c_uint32, 27), |
| 1986 | ("cycle_cnt_int", c_uint32, 1), |
| 1987 | ] |
| 1988 | _fields_ = [("bits", _bitfield), |
| 1989 | ("word", c_uint32)] |
| 1990 | def set_event_cnt_0_int(self, value): self.bits.event_cnt_0_int = value |
| 1991 | def get_event_cnt_0_int(self): value = self.bits.event_cnt_0_int; return value |
| 1992 | def set_event_cnt_1_int(self, value): self.bits.event_cnt_1_int = value |
| 1993 | def get_event_cnt_1_int(self): value = self.bits.event_cnt_1_int; return value |
| 1994 | def set_event_cnt_2_int(self, value): self.bits.event_cnt_2_int = value |
| 1995 | def get_event_cnt_2_int(self): value = self.bits.event_cnt_2_int; return value |
| 1996 | def set_event_cnt_3_int(self, value): self.bits.event_cnt_3_int = value |
| 1997 | def get_event_cnt_3_int(self): value = self.bits.event_cnt_3_int; return value |
| 1998 | def set_cycle_cnt_int(self, value): self.bits.cycle_cnt_int = value |
| 1999 | def get_cycle_cnt_int(self): value = self.bits.cycle_cnt_int; return value |
| 2000 | |
| 2001 | |
| 2002 | class pmccntr_lo_r(Union): |
| 2003 | class _bitfield(Structure): |
| 2004 | _fields_ = [ |
| 2005 | ("cycle_cnt_lo", c_uint32, 32), |
| 2006 | ] |
| 2007 | _fields_ = [("bits", _bitfield), |
| 2008 | ("word", c_uint32)] |
| 2009 | def set_cycle_cnt_lo(self, value): self.bits.cycle_cnt_lo = value |
| 2010 | def get_cycle_cnt_lo(self): value = self.bits.cycle_cnt_lo; return value |
| 2011 | |
| 2012 | |
| 2013 | class pmccntr_hi_r(Union): |
| 2014 | class _bitfield(Structure): |
| 2015 | _fields_ = [ |
| 2016 | ("cycle_cnt_hi", c_uint32, 16), |
| 2017 | ("reserved0", c_uint32, 16), |
| 2018 | ] |
| 2019 | _fields_ = [("bits", _bitfield), |
| 2020 | ("word", c_uint32)] |
| 2021 | def set_cycle_cnt_hi(self, value): self.bits.cycle_cnt_hi = value |
| 2022 | def get_cycle_cnt_hi(self): value = self.bits.cycle_cnt_hi; return value |
| 2023 | |
| 2024 | |
| 2025 | class pmccntr_cfg_r(Union): |
| 2026 | class _bitfield(Structure): |
| 2027 | _fields_ = [ |
| 2028 | ("cycle_cnt_cfg_start", c_uint32, 10), |
| 2029 | ("reserved0", c_uint32, 6), |
| 2030 | ("cycle_cnt_cfg_stop", c_uint32, 10), |
| 2031 | ("reserved1", c_uint32, 6), |
| 2032 | ] |
| 2033 | _fields_ = [("bits", _bitfield), |
| 2034 | ("word", c_uint32)] |
| 2035 | def set_cycle_cnt_cfg_start(self, value): self.bits.cycle_cnt_cfg_start = value |
| 2036 | def get_cycle_cnt_cfg_start(self): value = self.bits.cycle_cnt_cfg_start; return value |
| 2037 | def set_cycle_cnt_cfg_stop(self, value): self.bits.cycle_cnt_cfg_stop = value |
| 2038 | def get_cycle_cnt_cfg_stop(self): value = self.bits.cycle_cnt_cfg_stop; return value |
| 2039 | |
| 2040 | |
| 2041 | class pmcaxi_chan_r(Union): |
| 2042 | class _bitfield(Structure): |
| 2043 | _fields_ = [ |
Douglas Troha | 22df2ad | 2020-05-08 13:09:13 +0200 | [diff] [blame] | 2044 | ("ch_sel", c_uint32, 4), |
| 2045 | ("reserved0", c_uint32, 4), |
| 2046 | ("axi_cnt_sel", c_uint32, 2), |
| 2047 | ("bw_ch_sel_en", c_uint32, 1), |
| 2048 | ("reserved1", c_uint32, 21), |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 2049 | ] |
| 2050 | _fields_ = [("bits", _bitfield), |
| 2051 | ("word", c_uint32)] |
Douglas Troha | 22df2ad | 2020-05-08 13:09:13 +0200 | [diff] [blame] | 2052 | def set_ch_sel(self, value): self.bits.ch_sel = value |
| 2053 | def get_ch_sel(self): value = self.bits.ch_sel; return value |
| 2054 | def set_axi_cnt_sel(self, value): self.bits.axi_cnt_sel = value |
| 2055 | def get_axi_cnt_sel(self): value = self.bits.axi_cnt_sel; return value |
| 2056 | def set_bw_ch_sel_en(self, value): self.bits.bw_ch_sel_en = value |
| 2057 | def get_bw_ch_sel_en(self): value = self.bits.bw_ch_sel_en; return value |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 2058 | |
| 2059 | |
| 2060 | class pmevtyper0_r(Union): |
| 2061 | class _bitfield(Structure): |
| 2062 | _fields_ = [ |
| 2063 | ("ev_type", c_uint32, 10), |
| 2064 | ("reserved0", c_uint32, 22), |
| 2065 | ] |
| 2066 | _fields_ = [("bits", _bitfield), |
| 2067 | ("word", c_uint32)] |
| 2068 | def set_ev_type(self, value): self.bits.ev_type = value |
| 2069 | def get_ev_type(self): value = self.bits.ev_type; return value |
| 2070 | |
| 2071 | |
| 2072 | class pmevtyper1_r(Union): |
| 2073 | class _bitfield(Structure): |
| 2074 | _fields_ = [ |
| 2075 | ("ev_type", c_uint32, 10), |
| 2076 | ("reserved0", c_uint32, 22), |
| 2077 | ] |
| 2078 | _fields_ = [("bits", _bitfield), |
| 2079 | ("word", c_uint32)] |
| 2080 | def set_ev_type(self, value): self.bits.ev_type = value |
| 2081 | def get_ev_type(self): value = self.bits.ev_type; return value |
| 2082 | |
| 2083 | |
| 2084 | class pmevtyper2_r(Union): |
| 2085 | class _bitfield(Structure): |
| 2086 | _fields_ = [ |
| 2087 | ("ev_type", c_uint32, 10), |
| 2088 | ("reserved0", c_uint32, 22), |
| 2089 | ] |
| 2090 | _fields_ = [("bits", _bitfield), |
| 2091 | ("word", c_uint32)] |
| 2092 | def set_ev_type(self, value): self.bits.ev_type = value |
| 2093 | def get_ev_type(self): value = self.bits.ev_type; return value |
| 2094 | |
| 2095 | |
| 2096 | class pmevtyper3_r(Union): |
| 2097 | class _bitfield(Structure): |
| 2098 | _fields_ = [ |
| 2099 | ("ev_type", c_uint32, 10), |
| 2100 | ("reserved0", c_uint32, 22), |
| 2101 | ] |
| 2102 | _fields_ = [("bits", _bitfield), |
| 2103 | ("word", c_uint32)] |
| 2104 | def set_ev_type(self, value): self.bits.ev_type = value |
| 2105 | def get_ev_type(self): value = self.bits.ev_type; return value |
| 2106 | |
| 2107 | class command_no_payload_t(Structure): |
| 2108 | _fields_ = [ |
| 2109 | ("cmd_code", c_uint32, 10), |
| 2110 | ("must_be_zero0", c_uint32, 6), |
| 2111 | ("param", c_uint32, 16), |
| 2112 | ] |
| 2113 | def valid(self): return must_be_zero0==0; |
| 2114 | def get_cmd_code(self): return cmd_code |
| 2115 | def set_cmd_code(self, value): cmd_code = value |
| 2116 | def get_param(self): return param |
| 2117 | def set_param(self, value): param = value |
| 2118 | |
| 2119 | class command_with_payload_t(Structure): |
| 2120 | _fields_ = [ |
| 2121 | ("cmd_code", c_uint32, 10), |
| 2122 | ("must_be_zero", c_uint32, 4), |
| 2123 | ("payload_size", c_uint32, 2), |
| 2124 | ("param", c_uint32, 16), |
| 2125 | ("data", c_uint32, 32), |
| 2126 | ] |
| 2127 | def valid(self): return must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 2128 | def get_cmd_code(self): return cmd_code |
| 2129 | def set_cmd_code(self, value): cmd_code = value |
| 2130 | def get_data(self): return data |
| 2131 | def set_data(self, value): data = value |
| 2132 | def get_param(self): return param |
| 2133 | def set_param(self, value): param = value |
| 2134 | def get_payload_size(self): return payload_size |
| 2135 | def set_payload_size(self, value): payload_size = value |
| 2136 | |
| 2137 | class npu_op_stop_t(Structure): |
| 2138 | _fields_ = [ |
| 2139 | ("cmd_code", c_uint32, 10), |
| 2140 | ("must_be_zero0", c_uint32, 6), |
| 2141 | ("mask", c_uint32, 16), |
| 2142 | ] |
| 2143 | def valid(self): return cmd_code==cmd0.NPU_OP_STOP and must_be_zero0==0; |
| 2144 | def get_cmd_code(self): return cmd_code |
| 2145 | def set_cmd_code(self, value): cmd_code = value |
| 2146 | def get_mask(self): return mask |
| 2147 | def set_mask(self, value): mask = value |
| 2148 | |
| 2149 | class npu_op_irq_t(Structure): |
| 2150 | _fields_ = [ |
| 2151 | ("cmd_code", c_uint32, 10), |
| 2152 | ("must_be_zero0", c_uint32, 6), |
| 2153 | ("mask", c_uint32, 16), |
| 2154 | ] |
| 2155 | def valid(self): return cmd_code==cmd0.NPU_OP_IRQ and must_be_zero0==0; |
| 2156 | def get_cmd_code(self): return cmd_code |
| 2157 | def set_cmd_code(self, value): cmd_code = value |
| 2158 | def get_mask(self): return mask |
| 2159 | def set_mask(self, value): mask = value |
| 2160 | |
| 2161 | class npu_op_conv_t(Structure): |
| 2162 | _fields_ = [ |
| 2163 | ("cmd_code", c_uint32, 10), |
| 2164 | ("must_be_zero0", c_uint32, 6), |
| 2165 | ("reserved0", c_uint32, 16), |
| 2166 | ] |
| 2167 | def valid(self): return cmd_code==cmd0.NPU_OP_CONV and must_be_zero0==0; |
| 2168 | def get_cmd_code(self): return cmd_code |
| 2169 | def set_cmd_code(self, value): cmd_code = value |
| 2170 | |
| 2171 | class npu_op_depthwise_t(Structure): |
| 2172 | _fields_ = [ |
| 2173 | ("cmd_code", c_uint32, 10), |
| 2174 | ("must_be_zero0", c_uint32, 6), |
| 2175 | ("reserved0", c_uint32, 16), |
| 2176 | ] |
| 2177 | def valid(self): return cmd_code==cmd0.NPU_OP_DEPTHWISE and must_be_zero0==0; |
| 2178 | def get_cmd_code(self): return cmd_code |
| 2179 | def set_cmd_code(self, value): cmd_code = value |
| 2180 | |
| 2181 | class npu_op_pool_t(Structure): |
| 2182 | _fields_ = [ |
| 2183 | ("cmd_code", c_uint32, 10), |
| 2184 | ("must_be_zero0", c_uint32, 6), |
| 2185 | ("mode", c_uint32, 16), |
| 2186 | ] |
| 2187 | def valid(self): return cmd_code==cmd0.NPU_OP_POOL and must_be_zero0==0; |
| 2188 | def get_cmd_code(self): return cmd_code |
| 2189 | def set_cmd_code(self, value): cmd_code = value |
| 2190 | def get_mode(self): return mode |
| 2191 | def set_mode(self, value): mode = value |
| 2192 | |
| 2193 | class npu_op_elementwise_t(Structure): |
| 2194 | _fields_ = [ |
| 2195 | ("cmd_code", c_uint32, 10), |
| 2196 | ("must_be_zero0", c_uint32, 6), |
| 2197 | ("mode", c_uint32, 16), |
| 2198 | ] |
| 2199 | def valid(self): return cmd_code==cmd0.NPU_OP_ELEMENTWISE and must_be_zero0==0; |
| 2200 | def get_cmd_code(self): return cmd_code |
| 2201 | def set_cmd_code(self, value): cmd_code = value |
| 2202 | def get_mode(self): return mode |
| 2203 | def set_mode(self, value): mode = value |
| 2204 | |
| 2205 | class npu_op_dma_start_t(Structure): |
| 2206 | _fields_ = [ |
| 2207 | ("cmd_code", c_uint32, 10), |
| 2208 | ("must_be_zero0", c_uint32, 6), |
| 2209 | ("channel_mode", c_uint32, 16), |
| 2210 | ] |
| 2211 | def valid(self): return cmd_code==cmd0.NPU_OP_DMA_START and must_be_zero0==0; |
| 2212 | def get_channel_mode(self): return channel_mode |
| 2213 | def set_channel_mode(self, value): channel_mode = value |
| 2214 | def get_cmd_code(self): return cmd_code |
| 2215 | def set_cmd_code(self, value): cmd_code = value |
| 2216 | |
| 2217 | class npu_op_dma_wait_t(Structure): |
| 2218 | _fields_ = [ |
| 2219 | ("cmd_code", c_uint32, 10), |
| 2220 | ("must_be_zero0", c_uint32, 6), |
| 2221 | ("reserved0", c_uint32, 16), |
| 2222 | ] |
| 2223 | def valid(self): return cmd_code==cmd0.NPU_OP_DMA_WAIT and must_be_zero0==0; |
| 2224 | def get_cmd_code(self): return cmd_code |
| 2225 | def set_cmd_code(self, value): cmd_code = value |
| 2226 | |
| 2227 | class npu_op_kernel_wait_t(Structure): |
| 2228 | _fields_ = [ |
| 2229 | ("cmd_code", c_uint32, 10), |
| 2230 | ("must_be_zero0", c_uint32, 6), |
| 2231 | ("param", c_uint32, 16), |
| 2232 | ] |
| 2233 | def valid(self): return cmd_code==cmd0.NPU_OP_KERNEL_WAIT and must_be_zero0==0; |
| 2234 | def get_cmd_code(self): return cmd_code |
| 2235 | def set_cmd_code(self, value): cmd_code = value |
| 2236 | def get_param(self): return param |
| 2237 | def set_param(self, value): param = value |
| 2238 | |
| 2239 | class npu_op_pmu_mask_t(Structure): |
| 2240 | _fields_ = [ |
| 2241 | ("cmd_code", c_uint32, 10), |
| 2242 | ("must_be_zero0", c_uint32, 6), |
| 2243 | ("param", c_uint32, 16), |
| 2244 | ] |
| 2245 | def valid(self): return cmd_code==cmd0.NPU_OP_PMU_MASK and must_be_zero0==0; |
| 2246 | def get_cmd_code(self): return cmd_code |
| 2247 | def set_cmd_code(self, value): cmd_code = value |
| 2248 | def get_param(self): return param |
| 2249 | def set_param(self, value): param = value |
| 2250 | |
| 2251 | class npu_set_ifm_pad_top_t(Structure): |
| 2252 | _fields_ = [ |
| 2253 | ("cmd_code", c_uint32, 10), |
| 2254 | ("must_be_zero0", c_uint32, 6), |
| 2255 | ("param", c_uint32, 16), |
| 2256 | ] |
| 2257 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM_PAD_TOP and must_be_zero0==0; |
| 2258 | def get_cmd_code(self): return cmd_code |
| 2259 | def set_cmd_code(self, value): cmd_code = value |
| 2260 | def get_param(self): return param |
| 2261 | def set_param(self, value): param = value |
| 2262 | |
| 2263 | class npu_set_ifm_pad_left_t(Structure): |
| 2264 | _fields_ = [ |
| 2265 | ("cmd_code", c_uint32, 10), |
| 2266 | ("must_be_zero0", c_uint32, 6), |
| 2267 | ("param", c_uint32, 16), |
| 2268 | ] |
| 2269 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM_PAD_LEFT and must_be_zero0==0; |
| 2270 | def get_cmd_code(self): return cmd_code |
| 2271 | def set_cmd_code(self, value): cmd_code = value |
| 2272 | def get_param(self): return param |
| 2273 | def set_param(self, value): param = value |
| 2274 | |
| 2275 | class npu_set_ifm_pad_right_t(Structure): |
| 2276 | _fields_ = [ |
| 2277 | ("cmd_code", c_uint32, 10), |
| 2278 | ("must_be_zero0", c_uint32, 6), |
| 2279 | ("param", c_uint32, 16), |
| 2280 | ] |
| 2281 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM_PAD_RIGHT and must_be_zero0==0; |
| 2282 | def get_cmd_code(self): return cmd_code |
| 2283 | def set_cmd_code(self, value): cmd_code = value |
| 2284 | def get_param(self): return param |
| 2285 | def set_param(self, value): param = value |
| 2286 | |
| 2287 | class npu_set_ifm_pad_bottom_t(Structure): |
| 2288 | _fields_ = [ |
| 2289 | ("cmd_code", c_uint32, 10), |
| 2290 | ("must_be_zero0", c_uint32, 6), |
| 2291 | ("param", c_uint32, 16), |
| 2292 | ] |
| 2293 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM_PAD_BOTTOM and must_be_zero0==0; |
| 2294 | def get_cmd_code(self): return cmd_code |
| 2295 | def set_cmd_code(self, value): cmd_code = value |
| 2296 | def get_param(self): return param |
| 2297 | def set_param(self, value): param = value |
| 2298 | |
| 2299 | class npu_set_ifm_depth_m1_t(Structure): |
| 2300 | _fields_ = [ |
| 2301 | ("cmd_code", c_uint32, 10), |
| 2302 | ("must_be_zero0", c_uint32, 6), |
| 2303 | ("param", c_uint32, 16), |
| 2304 | ] |
| 2305 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM_DEPTH_M1 and must_be_zero0==0; |
| 2306 | def get_cmd_code(self): return cmd_code |
| 2307 | def set_cmd_code(self, value): cmd_code = value |
| 2308 | def get_param(self): return param |
| 2309 | def set_param(self, value): param = value |
| 2310 | |
| 2311 | class npu_set_ifm_precision_t(Structure): |
| 2312 | _fields_ = [ |
| 2313 | ("cmd_code", c_uint32, 10), |
| 2314 | ("must_be_zero0", c_uint32, 6), |
Diqing Zhong | fed918b | 2020-04-27 10:27:34 +0200 | [diff] [blame] | 2315 | ("precision", c_uint32, 4), |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 2316 | ("reserved0", c_uint32, 2), |
| 2317 | ("format", c_uint32, 2), |
| 2318 | ("scale_mode", c_uint32, 2), |
| 2319 | ("reserved1", c_uint32, 4), |
| 2320 | ("round_mode", c_uint32, 2), |
| 2321 | ] |
| 2322 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM_PRECISION and must_be_zero0==0; |
| 2323 | def get_cmd_code(self): return cmd_code |
| 2324 | def set_cmd_code(self, value): cmd_code = value |
| 2325 | def get_format(self): return format |
| 2326 | def set_format(self, value): format = value |
Diqing Zhong | fed918b | 2020-04-27 10:27:34 +0200 | [diff] [blame] | 2327 | def get_precision(self): return precision |
| 2328 | def set_precision(self, value): precision = value |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 2329 | def get_round_mode(self): return round_mode |
| 2330 | def set_round_mode(self, value): round_mode = value |
| 2331 | def get_scale_mode(self): return scale_mode |
| 2332 | def set_scale_mode(self, value): scale_mode = value |
| 2333 | |
| 2334 | class npu_set_ifm_upscale_t(Structure): |
| 2335 | _fields_ = [ |
| 2336 | ("cmd_code", c_uint32, 10), |
| 2337 | ("must_be_zero0", c_uint32, 6), |
| 2338 | ("mode", c_uint32, 2), |
| 2339 | ("reserved0", c_uint32, 14), |
| 2340 | ] |
| 2341 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM_UPSCALE and must_be_zero0==0; |
| 2342 | def get_cmd_code(self): return cmd_code |
| 2343 | def set_cmd_code(self, value): cmd_code = value |
| 2344 | def get_mode(self): return mode |
| 2345 | def set_mode(self, value): mode = value |
| 2346 | |
| 2347 | class npu_set_ifm_zero_point_t(Structure): |
| 2348 | _fields_ = [ |
| 2349 | ("cmd_code", c_uint32, 10), |
| 2350 | ("must_be_zero0", c_uint32, 6), |
| 2351 | ("param", c_uint32, 16), |
| 2352 | ] |
| 2353 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM_ZERO_POINT and must_be_zero0==0; |
| 2354 | def get_cmd_code(self): return cmd_code |
| 2355 | def set_cmd_code(self, value): cmd_code = value |
| 2356 | def get_param(self): return param |
| 2357 | def set_param(self, value): param = value |
| 2358 | |
| 2359 | class npu_set_ifm_width0_m1_t(Structure): |
| 2360 | _fields_ = [ |
| 2361 | ("cmd_code", c_uint32, 10), |
| 2362 | ("must_be_zero0", c_uint32, 6), |
| 2363 | ("param", c_uint32, 16), |
| 2364 | ] |
| 2365 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM_WIDTH0_M1 and must_be_zero0==0; |
| 2366 | def get_cmd_code(self): return cmd_code |
| 2367 | def set_cmd_code(self, value): cmd_code = value |
| 2368 | def get_param(self): return param |
| 2369 | def set_param(self, value): param = value |
| 2370 | |
| 2371 | class npu_set_ifm_height0_m1_t(Structure): |
| 2372 | _fields_ = [ |
| 2373 | ("cmd_code", c_uint32, 10), |
| 2374 | ("must_be_zero0", c_uint32, 6), |
| 2375 | ("param", c_uint32, 16), |
| 2376 | ] |
| 2377 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM_HEIGHT0_M1 and must_be_zero0==0; |
| 2378 | def get_cmd_code(self): return cmd_code |
| 2379 | def set_cmd_code(self, value): cmd_code = value |
| 2380 | def get_param(self): return param |
| 2381 | def set_param(self, value): param = value |
| 2382 | |
| 2383 | class npu_set_ifm_height1_m1_t(Structure): |
| 2384 | _fields_ = [ |
| 2385 | ("cmd_code", c_uint32, 10), |
| 2386 | ("must_be_zero0", c_uint32, 6), |
| 2387 | ("param", c_uint32, 16), |
| 2388 | ] |
| 2389 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM_HEIGHT1_M1 and must_be_zero0==0; |
| 2390 | def get_cmd_code(self): return cmd_code |
| 2391 | def set_cmd_code(self, value): cmd_code = value |
| 2392 | def get_param(self): return param |
| 2393 | def set_param(self, value): param = value |
| 2394 | |
| 2395 | class npu_set_ifm_ib_end_t(Structure): |
| 2396 | _fields_ = [ |
| 2397 | ("cmd_code", c_uint32, 10), |
| 2398 | ("must_be_zero0", c_uint32, 6), |
| 2399 | ("param", c_uint32, 16), |
| 2400 | ] |
| 2401 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM_IB_END and must_be_zero0==0; |
| 2402 | def get_cmd_code(self): return cmd_code |
| 2403 | def set_cmd_code(self, value): cmd_code = value |
| 2404 | def get_param(self): return param |
| 2405 | def set_param(self, value): param = value |
| 2406 | |
| 2407 | class npu_set_ifm_region_t(Structure): |
| 2408 | _fields_ = [ |
| 2409 | ("cmd_code", c_uint32, 10), |
| 2410 | ("must_be_zero0", c_uint32, 6), |
| 2411 | ("param", c_uint32, 16), |
| 2412 | ] |
| 2413 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM_REGION and must_be_zero0==0; |
| 2414 | def get_cmd_code(self): return cmd_code |
| 2415 | def set_cmd_code(self, value): cmd_code = value |
| 2416 | def get_param(self): return param |
| 2417 | def set_param(self, value): param = value |
| 2418 | |
| 2419 | class npu_set_ofm_width_m1_t(Structure): |
| 2420 | _fields_ = [ |
| 2421 | ("cmd_code", c_uint32, 10), |
| 2422 | ("must_be_zero0", c_uint32, 6), |
| 2423 | ("param", c_uint32, 16), |
| 2424 | ] |
| 2425 | def valid(self): return cmd_code==cmd0.NPU_SET_OFM_WIDTH_M1 and must_be_zero0==0; |
| 2426 | def get_cmd_code(self): return cmd_code |
| 2427 | def set_cmd_code(self, value): cmd_code = value |
| 2428 | def get_param(self): return param |
| 2429 | def set_param(self, value): param = value |
| 2430 | |
| 2431 | class npu_set_ofm_height_m1_t(Structure): |
| 2432 | _fields_ = [ |
| 2433 | ("cmd_code", c_uint32, 10), |
| 2434 | ("must_be_zero0", c_uint32, 6), |
| 2435 | ("param", c_uint32, 16), |
| 2436 | ] |
| 2437 | def valid(self): return cmd_code==cmd0.NPU_SET_OFM_HEIGHT_M1 and must_be_zero0==0; |
| 2438 | def get_cmd_code(self): return cmd_code |
| 2439 | def set_cmd_code(self, value): cmd_code = value |
| 2440 | def get_param(self): return param |
| 2441 | def set_param(self, value): param = value |
| 2442 | |
| 2443 | class npu_set_ofm_depth_m1_t(Structure): |
| 2444 | _fields_ = [ |
| 2445 | ("cmd_code", c_uint32, 10), |
| 2446 | ("must_be_zero0", c_uint32, 6), |
| 2447 | ("param", c_uint32, 16), |
| 2448 | ] |
| 2449 | def valid(self): return cmd_code==cmd0.NPU_SET_OFM_DEPTH_M1 and must_be_zero0==0; |
| 2450 | def get_cmd_code(self): return cmd_code |
| 2451 | def set_cmd_code(self, value): cmd_code = value |
| 2452 | def get_param(self): return param |
| 2453 | def set_param(self, value): param = value |
| 2454 | |
| 2455 | class npu_set_ofm_precision_t(Structure): |
| 2456 | _fields_ = [ |
| 2457 | ("cmd_code", c_uint32, 10), |
| 2458 | ("must_be_zero0", c_uint32, 6), |
| 2459 | ("precision", c_uint32, 3), |
| 2460 | ("reserved0", c_uint32, 3), |
| 2461 | ("format", c_uint32, 2), |
| 2462 | ("scaling", c_uint32, 1), |
| 2463 | ("reserved1", c_uint32, 5), |
| 2464 | ("rounding", c_uint32, 2), |
| 2465 | ] |
| 2466 | def valid(self): return cmd_code==cmd0.NPU_SET_OFM_PRECISION and must_be_zero0==0; |
| 2467 | def get_cmd_code(self): return cmd_code |
| 2468 | def set_cmd_code(self, value): cmd_code = value |
| 2469 | def get_format(self): return format |
| 2470 | def set_format(self, value): format = value |
| 2471 | def get_precision(self): return precision |
| 2472 | def set_precision(self, value): precision = value |
| 2473 | def get_rounding(self): return rounding |
| 2474 | def set_rounding(self, value): rounding = value |
| 2475 | def get_scaling(self): return scaling |
| 2476 | def set_scaling(self, value): scaling = value |
| 2477 | |
| 2478 | class npu_set_ofm_blk_width_m1_t(Structure): |
| 2479 | _fields_ = [ |
| 2480 | ("cmd_code", c_uint32, 10), |
| 2481 | ("must_be_zero0", c_uint32, 6), |
| 2482 | ("param", c_uint32, 16), |
| 2483 | ] |
| 2484 | def valid(self): return cmd_code==cmd0.NPU_SET_OFM_BLK_WIDTH_M1 and must_be_zero0==0; |
| 2485 | def get_cmd_code(self): return cmd_code |
| 2486 | def set_cmd_code(self, value): cmd_code = value |
| 2487 | def get_param(self): return param |
| 2488 | def set_param(self, value): param = value |
| 2489 | |
| 2490 | class npu_set_ofm_blk_height_m1_t(Structure): |
| 2491 | _fields_ = [ |
| 2492 | ("cmd_code", c_uint32, 10), |
| 2493 | ("must_be_zero0", c_uint32, 6), |
| 2494 | ("param", c_uint32, 16), |
| 2495 | ] |
| 2496 | def valid(self): return cmd_code==cmd0.NPU_SET_OFM_BLK_HEIGHT_M1 and must_be_zero0==0; |
| 2497 | def get_cmd_code(self): return cmd_code |
| 2498 | def set_cmd_code(self, value): cmd_code = value |
| 2499 | def get_param(self): return param |
| 2500 | def set_param(self, value): param = value |
| 2501 | |
| 2502 | class npu_set_ofm_blk_depth_m1_t(Structure): |
| 2503 | _fields_ = [ |
| 2504 | ("cmd_code", c_uint32, 10), |
| 2505 | ("must_be_zero0", c_uint32, 6), |
| 2506 | ("param", c_uint32, 16), |
| 2507 | ] |
| 2508 | def valid(self): return cmd_code==cmd0.NPU_SET_OFM_BLK_DEPTH_M1 and must_be_zero0==0; |
| 2509 | def get_cmd_code(self): return cmd_code |
| 2510 | def set_cmd_code(self, value): cmd_code = value |
| 2511 | def get_param(self): return param |
| 2512 | def set_param(self, value): param = value |
| 2513 | |
| 2514 | class npu_set_ofm_zero_point_t(Structure): |
| 2515 | _fields_ = [ |
| 2516 | ("cmd_code", c_uint32, 10), |
| 2517 | ("must_be_zero0", c_uint32, 6), |
| 2518 | ("param", c_uint32, 16), |
| 2519 | ] |
| 2520 | def valid(self): return cmd_code==cmd0.NPU_SET_OFM_ZERO_POINT and must_be_zero0==0; |
| 2521 | def get_cmd_code(self): return cmd_code |
| 2522 | def set_cmd_code(self, value): cmd_code = value |
| 2523 | def get_param(self): return param |
| 2524 | def set_param(self, value): param = value |
| 2525 | |
| 2526 | class npu_set_ofm_width0_m1_t(Structure): |
| 2527 | _fields_ = [ |
| 2528 | ("cmd_code", c_uint32, 10), |
| 2529 | ("must_be_zero0", c_uint32, 6), |
| 2530 | ("param", c_uint32, 16), |
| 2531 | ] |
| 2532 | def valid(self): return cmd_code==cmd0.NPU_SET_OFM_WIDTH0_M1 and must_be_zero0==0; |
| 2533 | def get_cmd_code(self): return cmd_code |
| 2534 | def set_cmd_code(self, value): cmd_code = value |
| 2535 | def get_param(self): return param |
| 2536 | def set_param(self, value): param = value |
| 2537 | |
| 2538 | class npu_set_ofm_height0_m1_t(Structure): |
| 2539 | _fields_ = [ |
| 2540 | ("cmd_code", c_uint32, 10), |
| 2541 | ("must_be_zero0", c_uint32, 6), |
| 2542 | ("param", c_uint32, 16), |
| 2543 | ] |
| 2544 | def valid(self): return cmd_code==cmd0.NPU_SET_OFM_HEIGHT0_M1 and must_be_zero0==0; |
| 2545 | def get_cmd_code(self): return cmd_code |
| 2546 | def set_cmd_code(self, value): cmd_code = value |
| 2547 | def get_param(self): return param |
| 2548 | def set_param(self, value): param = value |
| 2549 | |
| 2550 | class npu_set_ofm_height1_m1_t(Structure): |
| 2551 | _fields_ = [ |
| 2552 | ("cmd_code", c_uint32, 10), |
| 2553 | ("must_be_zero0", c_uint32, 6), |
| 2554 | ("param", c_uint32, 16), |
| 2555 | ] |
| 2556 | def valid(self): return cmd_code==cmd0.NPU_SET_OFM_HEIGHT1_M1 and must_be_zero0==0; |
| 2557 | def get_cmd_code(self): return cmd_code |
| 2558 | def set_cmd_code(self, value): cmd_code = value |
| 2559 | def get_param(self): return param |
| 2560 | def set_param(self, value): param = value |
| 2561 | |
| 2562 | class npu_set_ofm_region_t(Structure): |
| 2563 | _fields_ = [ |
| 2564 | ("cmd_code", c_uint32, 10), |
| 2565 | ("must_be_zero0", c_uint32, 6), |
| 2566 | ("param", c_uint32, 16), |
| 2567 | ] |
| 2568 | def valid(self): return cmd_code==cmd0.NPU_SET_OFM_REGION and must_be_zero0==0; |
| 2569 | def get_cmd_code(self): return cmd_code |
| 2570 | def set_cmd_code(self, value): cmd_code = value |
| 2571 | def get_param(self): return param |
| 2572 | def set_param(self, value): param = value |
| 2573 | |
| 2574 | class npu_set_kernel_width_m1_t(Structure): |
| 2575 | _fields_ = [ |
| 2576 | ("cmd_code", c_uint32, 10), |
| 2577 | ("must_be_zero0", c_uint32, 6), |
| 2578 | ("param", c_uint32, 16), |
| 2579 | ] |
| 2580 | def valid(self): return cmd_code==cmd0.NPU_SET_KERNEL_WIDTH_M1 and must_be_zero0==0; |
| 2581 | def get_cmd_code(self): return cmd_code |
| 2582 | def set_cmd_code(self, value): cmd_code = value |
| 2583 | def get_param(self): return param |
| 2584 | def set_param(self, value): param = value |
| 2585 | |
| 2586 | class npu_set_kernel_height_m1_t(Structure): |
| 2587 | _fields_ = [ |
| 2588 | ("cmd_code", c_uint32, 10), |
| 2589 | ("must_be_zero0", c_uint32, 6), |
| 2590 | ("param", c_uint32, 16), |
| 2591 | ] |
| 2592 | def valid(self): return cmd_code==cmd0.NPU_SET_KERNEL_HEIGHT_M1 and must_be_zero0==0; |
| 2593 | def get_cmd_code(self): return cmd_code |
| 2594 | def set_cmd_code(self, value): cmd_code = value |
| 2595 | def get_param(self): return param |
| 2596 | def set_param(self, value): param = value |
| 2597 | |
| 2598 | class npu_set_kernel_stride_t(Structure): |
| 2599 | _fields_ = [ |
| 2600 | ("cmd_code", c_uint32, 10), |
| 2601 | ("must_be_zero0", c_uint32, 6), |
| 2602 | ("param", c_uint32, 16), |
| 2603 | ] |
| 2604 | def valid(self): return cmd_code==cmd0.NPU_SET_KERNEL_STRIDE and must_be_zero0==0; |
| 2605 | def get_cmd_code(self): return cmd_code |
| 2606 | def set_cmd_code(self, value): cmd_code = value |
| 2607 | def get_param(self): return param |
| 2608 | def set_param(self, value): param = value |
| 2609 | |
| 2610 | class npu_set_parallel_mode_t(Structure): |
| 2611 | _fields_ = [ |
| 2612 | ("cmd_code", c_uint32, 10), |
| 2613 | ("must_be_zero0", c_uint32, 6), |
| 2614 | ("param", c_uint32, 16), |
| 2615 | ] |
| 2616 | def valid(self): return cmd_code==cmd0.NPU_SET_PARALLEL_MODE and must_be_zero0==0; |
| 2617 | def get_cmd_code(self): return cmd_code |
| 2618 | def set_cmd_code(self, value): cmd_code = value |
| 2619 | def get_param(self): return param |
| 2620 | def set_param(self, value): param = value |
| 2621 | |
| 2622 | class npu_set_acc_format_t(Structure): |
| 2623 | _fields_ = [ |
| 2624 | ("cmd_code", c_uint32, 10), |
| 2625 | ("must_be_zero0", c_uint32, 6), |
| 2626 | ("param", c_uint32, 16), |
| 2627 | ] |
| 2628 | def valid(self): return cmd_code==cmd0.NPU_SET_ACC_FORMAT and must_be_zero0==0; |
| 2629 | def get_cmd_code(self): return cmd_code |
| 2630 | def set_cmd_code(self, value): cmd_code = value |
| 2631 | def get_param(self): return param |
| 2632 | def set_param(self, value): param = value |
| 2633 | |
| 2634 | class npu_set_activation_t(Structure): |
| 2635 | _fields_ = [ |
| 2636 | ("cmd_code", c_uint32, 10), |
| 2637 | ("must_be_zero0", c_uint32, 6), |
| 2638 | ("type", c_uint32, 12), |
| 2639 | ("act_clip_range", c_uint32, 4), |
| 2640 | ] |
| 2641 | def valid(self): return cmd_code==cmd0.NPU_SET_ACTIVATION and must_be_zero0==0; |
| 2642 | def get_act_clip_range(self): return act_clip_range |
| 2643 | def set_act_clip_range(self, value): act_clip_range = value |
| 2644 | def get_cmd_code(self): return cmd_code |
| 2645 | def set_cmd_code(self, value): cmd_code = value |
| 2646 | def get_type(self): return type |
| 2647 | def set_type(self, value): type = value |
| 2648 | |
| 2649 | class npu_set_activation_min_t(Structure): |
| 2650 | _fields_ = [ |
| 2651 | ("cmd_code", c_uint32, 10), |
| 2652 | ("must_be_zero0", c_uint32, 6), |
| 2653 | ("param", c_uint32, 16), |
| 2654 | ] |
| 2655 | def valid(self): return cmd_code==cmd0.NPU_SET_ACTIVATION_MIN and must_be_zero0==0; |
| 2656 | def get_cmd_code(self): return cmd_code |
| 2657 | def set_cmd_code(self, value): cmd_code = value |
| 2658 | def get_param(self): return param |
| 2659 | def set_param(self, value): param = value |
| 2660 | |
| 2661 | class npu_set_activation_max_t(Structure): |
| 2662 | _fields_ = [ |
| 2663 | ("cmd_code", c_uint32, 10), |
| 2664 | ("must_be_zero0", c_uint32, 6), |
| 2665 | ("param", c_uint32, 16), |
| 2666 | ] |
| 2667 | def valid(self): return cmd_code==cmd0.NPU_SET_ACTIVATION_MAX and must_be_zero0==0; |
| 2668 | def get_cmd_code(self): return cmd_code |
| 2669 | def set_cmd_code(self, value): cmd_code = value |
| 2670 | def get_param(self): return param |
| 2671 | def set_param(self, value): param = value |
| 2672 | |
| 2673 | class npu_set_weight_region_t(Structure): |
| 2674 | _fields_ = [ |
| 2675 | ("cmd_code", c_uint32, 10), |
| 2676 | ("must_be_zero0", c_uint32, 6), |
| 2677 | ("param", c_uint32, 16), |
| 2678 | ] |
| 2679 | def valid(self): return cmd_code==cmd0.NPU_SET_WEIGHT_REGION and must_be_zero0==0; |
| 2680 | def get_cmd_code(self): return cmd_code |
| 2681 | def set_cmd_code(self, value): cmd_code = value |
| 2682 | def get_param(self): return param |
| 2683 | def set_param(self, value): param = value |
| 2684 | |
| 2685 | class npu_set_scale_region_t(Structure): |
| 2686 | _fields_ = [ |
| 2687 | ("cmd_code", c_uint32, 10), |
| 2688 | ("must_be_zero0", c_uint32, 6), |
| 2689 | ("param", c_uint32, 16), |
| 2690 | ] |
| 2691 | def valid(self): return cmd_code==cmd0.NPU_SET_SCALE_REGION and must_be_zero0==0; |
| 2692 | def get_cmd_code(self): return cmd_code |
| 2693 | def set_cmd_code(self, value): cmd_code = value |
| 2694 | def get_param(self): return param |
| 2695 | def set_param(self, value): param = value |
| 2696 | |
| 2697 | class npu_set_ab_start_t(Structure): |
| 2698 | _fields_ = [ |
| 2699 | ("cmd_code", c_uint32, 10), |
| 2700 | ("must_be_zero0", c_uint32, 6), |
| 2701 | ("param", c_uint32, 16), |
| 2702 | ] |
| 2703 | def valid(self): return cmd_code==cmd0.NPU_SET_AB_START and must_be_zero0==0; |
| 2704 | def get_cmd_code(self): return cmd_code |
| 2705 | def set_cmd_code(self, value): cmd_code = value |
| 2706 | def get_param(self): return param |
| 2707 | def set_param(self, value): param = value |
| 2708 | |
| 2709 | class npu_set_blockdep_t(Structure): |
| 2710 | _fields_ = [ |
| 2711 | ("cmd_code", c_uint32, 10), |
| 2712 | ("must_be_zero0", c_uint32, 6), |
| 2713 | ("param", c_uint32, 16), |
| 2714 | ] |
| 2715 | def valid(self): return cmd_code==cmd0.NPU_SET_BLOCKDEP and must_be_zero0==0; |
| 2716 | def get_cmd_code(self): return cmd_code |
| 2717 | def set_cmd_code(self, value): cmd_code = value |
| 2718 | def get_param(self): return param |
| 2719 | def set_param(self, value): param = value |
| 2720 | |
| 2721 | class npu_set_dma0_src_region_t(Structure): |
| 2722 | _fields_ = [ |
| 2723 | ("cmd_code", c_uint32, 10), |
| 2724 | ("must_be_zero0", c_uint32, 6), |
| 2725 | ("region", c_uint32, 8), |
| 2726 | ("internal", c_uint32, 1), |
| 2727 | ("stride_mode", c_uint32, 2), |
| 2728 | ("reserved0", c_uint32, 5), |
| 2729 | ] |
| 2730 | def valid(self): return cmd_code==cmd0.NPU_SET_DMA0_SRC_REGION and must_be_zero0==0; |
| 2731 | def get_cmd_code(self): return cmd_code |
| 2732 | def set_cmd_code(self, value): cmd_code = value |
| 2733 | def get_internal(self): return internal |
| 2734 | def set_internal(self, value): internal = value |
| 2735 | def get_region(self): return region |
| 2736 | def set_region(self, value): region = value |
| 2737 | def get_stride_mode(self): return stride_mode |
| 2738 | def set_stride_mode(self, value): stride_mode = value |
| 2739 | |
| 2740 | class npu_set_dma0_dst_region_t(Structure): |
| 2741 | _fields_ = [ |
| 2742 | ("cmd_code", c_uint32, 10), |
| 2743 | ("must_be_zero0", c_uint32, 6), |
| 2744 | ("region", c_uint32, 8), |
| 2745 | ("internal", c_uint32, 1), |
| 2746 | ("stride_mode", c_uint32, 2), |
| 2747 | ("reserved0", c_uint32, 5), |
| 2748 | ] |
| 2749 | def valid(self): return cmd_code==cmd0.NPU_SET_DMA0_DST_REGION and must_be_zero0==0; |
| 2750 | def get_cmd_code(self): return cmd_code |
| 2751 | def set_cmd_code(self, value): cmd_code = value |
| 2752 | def get_internal(self): return internal |
| 2753 | def set_internal(self, value): internal = value |
| 2754 | def get_region(self): return region |
| 2755 | def set_region(self, value): region = value |
| 2756 | def get_stride_mode(self): return stride_mode |
| 2757 | def set_stride_mode(self, value): stride_mode = value |
| 2758 | |
| 2759 | class npu_set_dma0_size0_t(Structure): |
| 2760 | _fields_ = [ |
| 2761 | ("cmd_code", c_uint32, 10), |
| 2762 | ("must_be_zero0", c_uint32, 6), |
| 2763 | ("param", c_uint32, 16), |
| 2764 | ] |
| 2765 | def valid(self): return cmd_code==cmd0.NPU_SET_DMA0_SIZE0 and must_be_zero0==0; |
| 2766 | def get_cmd_code(self): return cmd_code |
| 2767 | def set_cmd_code(self, value): cmd_code = value |
| 2768 | def get_param(self): return param |
| 2769 | def set_param(self, value): param = value |
| 2770 | |
| 2771 | class npu_set_dma0_size1_t(Structure): |
| 2772 | _fields_ = [ |
| 2773 | ("cmd_code", c_uint32, 10), |
| 2774 | ("must_be_zero0", c_uint32, 6), |
| 2775 | ("param", c_uint32, 16), |
| 2776 | ] |
| 2777 | def valid(self): return cmd_code==cmd0.NPU_SET_DMA0_SIZE1 and must_be_zero0==0; |
| 2778 | def get_cmd_code(self): return cmd_code |
| 2779 | def set_cmd_code(self, value): cmd_code = value |
| 2780 | def get_param(self): return param |
| 2781 | def set_param(self, value): param = value |
| 2782 | |
| 2783 | class npu_set_ifm2_broadcast_t(Structure): |
| 2784 | _fields_ = [ |
| 2785 | ("cmd_code", c_uint32, 10), |
| 2786 | ("must_be_zero0", c_uint32, 6), |
| 2787 | ("broadcast_height", c_uint32, 1), |
| 2788 | ("broadcast_width", c_uint32, 1), |
| 2789 | ("broadcast_depth", c_uint32, 1), |
| 2790 | ("reserved0", c_uint32, 3), |
| 2791 | ("operand_order", c_uint32, 1), |
| 2792 | ("broadcast_scalar", c_uint32, 1), |
| 2793 | ("reserved1", c_uint32, 8), |
| 2794 | ] |
| 2795 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM2_BROADCAST and must_be_zero0==0; |
| 2796 | def get_broadcast_depth(self): return broadcast_depth |
| 2797 | def set_broadcast_depth(self, value): broadcast_depth = value |
| 2798 | def get_broadcast_height(self): return broadcast_height |
| 2799 | def set_broadcast_height(self, value): broadcast_height = value |
| 2800 | def get_broadcast_scalar(self): return broadcast_scalar |
| 2801 | def set_broadcast_scalar(self, value): broadcast_scalar = value |
| 2802 | def get_broadcast_width(self): return broadcast_width |
| 2803 | def set_broadcast_width(self, value): broadcast_width = value |
| 2804 | def get_cmd_code(self): return cmd_code |
| 2805 | def set_cmd_code(self, value): cmd_code = value |
| 2806 | def get_operand_order(self): return operand_order |
| 2807 | def set_operand_order(self, value): operand_order = value |
| 2808 | |
| 2809 | class npu_set_ifm2_scalar_t(Structure): |
| 2810 | _fields_ = [ |
| 2811 | ("cmd_code", c_uint32, 10), |
| 2812 | ("must_be_zero0", c_uint32, 6), |
| 2813 | ("param", c_uint32, 16), |
| 2814 | ] |
| 2815 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM2_SCALAR and must_be_zero0==0; |
| 2816 | def get_cmd_code(self): return cmd_code |
| 2817 | def set_cmd_code(self, value): cmd_code = value |
| 2818 | def get_param(self): return param |
| 2819 | def set_param(self, value): param = value |
| 2820 | |
| 2821 | class npu_set_ifm2_precision_t(Structure): |
| 2822 | _fields_ = [ |
| 2823 | ("cmd_code", c_uint32, 10), |
| 2824 | ("must_be_zero0", c_uint32, 6), |
Diqing Zhong | fed918b | 2020-04-27 10:27:34 +0200 | [diff] [blame] | 2825 | ("precision", c_uint32, 4), |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 2826 | ("reserved0", c_uint32, 2), |
| 2827 | ("format", c_uint32, 2), |
| 2828 | ("reserved1", c_uint32, 8), |
| 2829 | ] |
| 2830 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM2_PRECISION and must_be_zero0==0; |
| 2831 | def get_cmd_code(self): return cmd_code |
| 2832 | def set_cmd_code(self, value): cmd_code = value |
| 2833 | def get_format(self): return format |
| 2834 | def set_format(self, value): format = value |
Diqing Zhong | fed918b | 2020-04-27 10:27:34 +0200 | [diff] [blame] | 2835 | def get_precision(self): return precision |
| 2836 | def set_precision(self, value): precision = value |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 2837 | |
| 2838 | class npu_set_ifm2_zero_point_t(Structure): |
| 2839 | _fields_ = [ |
| 2840 | ("cmd_code", c_uint32, 10), |
| 2841 | ("must_be_zero0", c_uint32, 6), |
| 2842 | ("param", c_uint32, 16), |
| 2843 | ] |
| 2844 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM2_ZERO_POINT and must_be_zero0==0; |
| 2845 | def get_cmd_code(self): return cmd_code |
| 2846 | def set_cmd_code(self, value): cmd_code = value |
| 2847 | def get_param(self): return param |
| 2848 | def set_param(self, value): param = value |
| 2849 | |
| 2850 | class npu_set_ifm2_width0_m1_t(Structure): |
| 2851 | _fields_ = [ |
| 2852 | ("cmd_code", c_uint32, 10), |
| 2853 | ("must_be_zero0", c_uint32, 6), |
| 2854 | ("param", c_uint32, 16), |
| 2855 | ] |
| 2856 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM2_WIDTH0_M1 and must_be_zero0==0; |
| 2857 | def get_cmd_code(self): return cmd_code |
| 2858 | def set_cmd_code(self, value): cmd_code = value |
| 2859 | def get_param(self): return param |
| 2860 | def set_param(self, value): param = value |
| 2861 | |
| 2862 | class npu_set_ifm2_height0_m1_t(Structure): |
| 2863 | _fields_ = [ |
| 2864 | ("cmd_code", c_uint32, 10), |
| 2865 | ("must_be_zero0", c_uint32, 6), |
| 2866 | ("param", c_uint32, 16), |
| 2867 | ] |
| 2868 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM2_HEIGHT0_M1 and must_be_zero0==0; |
| 2869 | def get_cmd_code(self): return cmd_code |
| 2870 | def set_cmd_code(self, value): cmd_code = value |
| 2871 | def get_param(self): return param |
| 2872 | def set_param(self, value): param = value |
| 2873 | |
| 2874 | class npu_set_ifm2_height1_m1_t(Structure): |
| 2875 | _fields_ = [ |
| 2876 | ("cmd_code", c_uint32, 10), |
| 2877 | ("must_be_zero0", c_uint32, 6), |
| 2878 | ("param", c_uint32, 16), |
| 2879 | ] |
| 2880 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM2_HEIGHT1_M1 and must_be_zero0==0; |
| 2881 | def get_cmd_code(self): return cmd_code |
| 2882 | def set_cmd_code(self, value): cmd_code = value |
| 2883 | def get_param(self): return param |
| 2884 | def set_param(self, value): param = value |
| 2885 | |
| 2886 | class npu_set_ifm2_ib_start_t(Structure): |
| 2887 | _fields_ = [ |
| 2888 | ("cmd_code", c_uint32, 10), |
| 2889 | ("must_be_zero0", c_uint32, 6), |
| 2890 | ("param", c_uint32, 16), |
| 2891 | ] |
| 2892 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM2_IB_START and must_be_zero0==0; |
| 2893 | def get_cmd_code(self): return cmd_code |
| 2894 | def set_cmd_code(self, value): cmd_code = value |
| 2895 | def get_param(self): return param |
| 2896 | def set_param(self, value): param = value |
| 2897 | |
| 2898 | class npu_set_ifm2_region_t(Structure): |
| 2899 | _fields_ = [ |
| 2900 | ("cmd_code", c_uint32, 10), |
| 2901 | ("must_be_zero0", c_uint32, 6), |
| 2902 | ("param", c_uint32, 16), |
| 2903 | ] |
| 2904 | def valid(self): return cmd_code==cmd0.NPU_SET_IFM2_REGION and must_be_zero0==0; |
| 2905 | def get_cmd_code(self): return cmd_code |
| 2906 | def set_cmd_code(self, value): cmd_code = value |
| 2907 | def get_param(self): return param |
| 2908 | def set_param(self, value): param = value |
| 2909 | |
| 2910 | class npu_set_ifm_base0_t(Structure): |
| 2911 | _fields_ = [ |
| 2912 | ("cmd_code", c_uint32, 10), |
| 2913 | ("must_be_zero", c_uint32, 4), |
| 2914 | ("payload_size", c_uint32, 2), |
| 2915 | ("reserved0", c_uint32, 16), |
| 2916 | ("data", c_uint32, 32), |
| 2917 | ] |
| 2918 | def valid(self): return cmd_code==cmd1.NPU_SET_IFM_BASE0 and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 2919 | def get_cmd_code(self): return cmd_code |
| 2920 | def set_cmd_code(self, value): cmd_code = value |
| 2921 | def get_data(self): return data |
| 2922 | def set_data(self, value): data = value |
| 2923 | def get_payload_size(self): return payload_size |
| 2924 | def set_payload_size(self, value): payload_size = value |
| 2925 | |
| 2926 | class npu_set_ifm_base1_t(Structure): |
| 2927 | _fields_ = [ |
| 2928 | ("cmd_code", c_uint32, 10), |
| 2929 | ("must_be_zero", c_uint32, 4), |
| 2930 | ("payload_size", c_uint32, 2), |
| 2931 | ("reserved0", c_uint32, 16), |
| 2932 | ("data", c_uint32, 32), |
| 2933 | ] |
| 2934 | def valid(self): return cmd_code==cmd1.NPU_SET_IFM_BASE1 and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 2935 | def get_cmd_code(self): return cmd_code |
| 2936 | def set_cmd_code(self, value): cmd_code = value |
| 2937 | def get_data(self): return data |
| 2938 | def set_data(self, value): data = value |
| 2939 | def get_payload_size(self): return payload_size |
| 2940 | def set_payload_size(self, value): payload_size = value |
| 2941 | |
| 2942 | class npu_set_ifm_base2_t(Structure): |
| 2943 | _fields_ = [ |
| 2944 | ("cmd_code", c_uint32, 10), |
| 2945 | ("must_be_zero", c_uint32, 4), |
| 2946 | ("payload_size", c_uint32, 2), |
| 2947 | ("reserved0", c_uint32, 16), |
| 2948 | ("data", c_uint32, 32), |
| 2949 | ] |
| 2950 | def valid(self): return cmd_code==cmd1.NPU_SET_IFM_BASE2 and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 2951 | def get_cmd_code(self): return cmd_code |
| 2952 | def set_cmd_code(self, value): cmd_code = value |
| 2953 | def get_data(self): return data |
| 2954 | def set_data(self, value): data = value |
| 2955 | def get_payload_size(self): return payload_size |
| 2956 | def set_payload_size(self, value): payload_size = value |
| 2957 | |
| 2958 | class npu_set_ifm_base3_t(Structure): |
| 2959 | _fields_ = [ |
| 2960 | ("cmd_code", c_uint32, 10), |
| 2961 | ("must_be_zero", c_uint32, 4), |
| 2962 | ("payload_size", c_uint32, 2), |
| 2963 | ("reserved0", c_uint32, 16), |
| 2964 | ("data", c_uint32, 32), |
| 2965 | ] |
| 2966 | def valid(self): return cmd_code==cmd1.NPU_SET_IFM_BASE3 and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 2967 | def get_cmd_code(self): return cmd_code |
| 2968 | def set_cmd_code(self, value): cmd_code = value |
| 2969 | def get_data(self): return data |
| 2970 | def set_data(self, value): data = value |
| 2971 | def get_payload_size(self): return payload_size |
| 2972 | def set_payload_size(self, value): payload_size = value |
| 2973 | |
| 2974 | class npu_set_ifm_stride_x_t(Structure): |
| 2975 | _fields_ = [ |
| 2976 | ("cmd_code", c_uint32, 10), |
| 2977 | ("must_be_zero", c_uint32, 4), |
| 2978 | ("payload_size", c_uint32, 2), |
| 2979 | ("reserved0", c_uint32, 16), |
| 2980 | ("data", c_uint32, 32), |
| 2981 | ] |
| 2982 | def valid(self): return cmd_code==cmd1.NPU_SET_IFM_STRIDE_X and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 2983 | def get_cmd_code(self): return cmd_code |
| 2984 | def set_cmd_code(self, value): cmd_code = value |
| 2985 | def get_data(self): return data |
| 2986 | def set_data(self, value): data = value |
| 2987 | def get_payload_size(self): return payload_size |
| 2988 | def set_payload_size(self, value): payload_size = value |
| 2989 | |
| 2990 | class npu_set_ifm_stride_y_t(Structure): |
| 2991 | _fields_ = [ |
| 2992 | ("cmd_code", c_uint32, 10), |
| 2993 | ("must_be_zero", c_uint32, 4), |
| 2994 | ("payload_size", c_uint32, 2), |
| 2995 | ("reserved0", c_uint32, 16), |
| 2996 | ("data", c_uint32, 32), |
| 2997 | ] |
| 2998 | def valid(self): return cmd_code==cmd1.NPU_SET_IFM_STRIDE_Y and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 2999 | def get_cmd_code(self): return cmd_code |
| 3000 | def set_cmd_code(self, value): cmd_code = value |
| 3001 | def get_data(self): return data |
| 3002 | def set_data(self, value): data = value |
| 3003 | def get_payload_size(self): return payload_size |
| 3004 | def set_payload_size(self, value): payload_size = value |
| 3005 | |
| 3006 | class npu_set_ifm_stride_c_t(Structure): |
| 3007 | _fields_ = [ |
| 3008 | ("cmd_code", c_uint32, 10), |
| 3009 | ("must_be_zero", c_uint32, 4), |
| 3010 | ("payload_size", c_uint32, 2), |
| 3011 | ("reserved0", c_uint32, 16), |
| 3012 | ("data", c_uint32, 32), |
| 3013 | ] |
| 3014 | def valid(self): return cmd_code==cmd1.NPU_SET_IFM_STRIDE_C and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3015 | def get_cmd_code(self): return cmd_code |
| 3016 | def set_cmd_code(self, value): cmd_code = value |
| 3017 | def get_data(self): return data |
| 3018 | def set_data(self, value): data = value |
| 3019 | def get_payload_size(self): return payload_size |
| 3020 | def set_payload_size(self, value): payload_size = value |
| 3021 | |
| 3022 | class npu_set_ofm_base0_t(Structure): |
| 3023 | _fields_ = [ |
| 3024 | ("cmd_code", c_uint32, 10), |
| 3025 | ("must_be_zero", c_uint32, 4), |
| 3026 | ("payload_size", c_uint32, 2), |
| 3027 | ("reserved0", c_uint32, 16), |
| 3028 | ("data", c_uint32, 32), |
| 3029 | ] |
| 3030 | def valid(self): return cmd_code==cmd1.NPU_SET_OFM_BASE0 and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3031 | def get_cmd_code(self): return cmd_code |
| 3032 | def set_cmd_code(self, value): cmd_code = value |
| 3033 | def get_data(self): return data |
| 3034 | def set_data(self, value): data = value |
| 3035 | def get_payload_size(self): return payload_size |
| 3036 | def set_payload_size(self, value): payload_size = value |
| 3037 | |
| 3038 | class npu_set_ofm_base1_t(Structure): |
| 3039 | _fields_ = [ |
| 3040 | ("cmd_code", c_uint32, 10), |
| 3041 | ("must_be_zero", c_uint32, 4), |
| 3042 | ("payload_size", c_uint32, 2), |
| 3043 | ("reserved0", c_uint32, 16), |
| 3044 | ("data", c_uint32, 32), |
| 3045 | ] |
| 3046 | def valid(self): return cmd_code==cmd1.NPU_SET_OFM_BASE1 and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3047 | def get_cmd_code(self): return cmd_code |
| 3048 | def set_cmd_code(self, value): cmd_code = value |
| 3049 | def get_data(self): return data |
| 3050 | def set_data(self, value): data = value |
| 3051 | def get_payload_size(self): return payload_size |
| 3052 | def set_payload_size(self, value): payload_size = value |
| 3053 | |
| 3054 | class npu_set_ofm_base2_t(Structure): |
| 3055 | _fields_ = [ |
| 3056 | ("cmd_code", c_uint32, 10), |
| 3057 | ("must_be_zero", c_uint32, 4), |
| 3058 | ("payload_size", c_uint32, 2), |
| 3059 | ("reserved0", c_uint32, 16), |
| 3060 | ("data", c_uint32, 32), |
| 3061 | ] |
| 3062 | def valid(self): return cmd_code==cmd1.NPU_SET_OFM_BASE2 and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3063 | def get_cmd_code(self): return cmd_code |
| 3064 | def set_cmd_code(self, value): cmd_code = value |
| 3065 | def get_data(self): return data |
| 3066 | def set_data(self, value): data = value |
| 3067 | def get_payload_size(self): return payload_size |
| 3068 | def set_payload_size(self, value): payload_size = value |
| 3069 | |
| 3070 | class npu_set_ofm_base3_t(Structure): |
| 3071 | _fields_ = [ |
| 3072 | ("cmd_code", c_uint32, 10), |
| 3073 | ("must_be_zero", c_uint32, 4), |
| 3074 | ("payload_size", c_uint32, 2), |
| 3075 | ("reserved0", c_uint32, 16), |
| 3076 | ("data", c_uint32, 32), |
| 3077 | ] |
| 3078 | def valid(self): return cmd_code==cmd1.NPU_SET_OFM_BASE3 and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3079 | def get_cmd_code(self): return cmd_code |
| 3080 | def set_cmd_code(self, value): cmd_code = value |
| 3081 | def get_data(self): return data |
| 3082 | def set_data(self, value): data = value |
| 3083 | def get_payload_size(self): return payload_size |
| 3084 | def set_payload_size(self, value): payload_size = value |
| 3085 | |
| 3086 | class npu_set_ofm_stride_x_t(Structure): |
| 3087 | _fields_ = [ |
| 3088 | ("cmd_code", c_uint32, 10), |
| 3089 | ("must_be_zero", c_uint32, 4), |
| 3090 | ("payload_size", c_uint32, 2), |
| 3091 | ("reserved0", c_uint32, 16), |
| 3092 | ("data", c_uint32, 32), |
| 3093 | ] |
| 3094 | def valid(self): return cmd_code==cmd1.NPU_SET_OFM_STRIDE_X and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3095 | def get_cmd_code(self): return cmd_code |
| 3096 | def set_cmd_code(self, value): cmd_code = value |
| 3097 | def get_data(self): return data |
| 3098 | def set_data(self, value): data = value |
| 3099 | def get_payload_size(self): return payload_size |
| 3100 | def set_payload_size(self, value): payload_size = value |
| 3101 | |
| 3102 | class npu_set_ofm_stride_y_t(Structure): |
| 3103 | _fields_ = [ |
| 3104 | ("cmd_code", c_uint32, 10), |
| 3105 | ("must_be_zero", c_uint32, 4), |
| 3106 | ("payload_size", c_uint32, 2), |
| 3107 | ("reserved0", c_uint32, 16), |
| 3108 | ("data", c_uint32, 32), |
| 3109 | ] |
| 3110 | def valid(self): return cmd_code==cmd1.NPU_SET_OFM_STRIDE_Y and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3111 | def get_cmd_code(self): return cmd_code |
| 3112 | def set_cmd_code(self, value): cmd_code = value |
| 3113 | def get_data(self): return data |
| 3114 | def set_data(self, value): data = value |
| 3115 | def get_payload_size(self): return payload_size |
| 3116 | def set_payload_size(self, value): payload_size = value |
| 3117 | |
| 3118 | class npu_set_ofm_stride_c_t(Structure): |
| 3119 | _fields_ = [ |
| 3120 | ("cmd_code", c_uint32, 10), |
| 3121 | ("must_be_zero", c_uint32, 4), |
| 3122 | ("payload_size", c_uint32, 2), |
| 3123 | ("reserved0", c_uint32, 16), |
| 3124 | ("data", c_uint32, 32), |
| 3125 | ] |
| 3126 | def valid(self): return cmd_code==cmd1.NPU_SET_OFM_STRIDE_C and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3127 | def get_cmd_code(self): return cmd_code |
| 3128 | def set_cmd_code(self, value): cmd_code = value |
| 3129 | def get_data(self): return data |
| 3130 | def set_data(self, value): data = value |
| 3131 | def get_payload_size(self): return payload_size |
| 3132 | def set_payload_size(self, value): payload_size = value |
| 3133 | |
| 3134 | class npu_set_weight_base_t(Structure): |
| 3135 | _fields_ = [ |
| 3136 | ("cmd_code", c_uint32, 10), |
| 3137 | ("must_be_zero", c_uint32, 4), |
| 3138 | ("payload_size", c_uint32, 2), |
| 3139 | ("reserved0", c_uint32, 16), |
| 3140 | ("data", c_uint32, 32), |
| 3141 | ] |
| 3142 | def valid(self): return cmd_code==cmd1.NPU_SET_WEIGHT_BASE and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3143 | def get_cmd_code(self): return cmd_code |
| 3144 | def set_cmd_code(self, value): cmd_code = value |
| 3145 | def get_data(self): return data |
| 3146 | def set_data(self, value): data = value |
| 3147 | def get_payload_size(self): return payload_size |
| 3148 | def set_payload_size(self, value): payload_size = value |
| 3149 | |
| 3150 | class npu_set_weight_length_t(Structure): |
| 3151 | _fields_ = [ |
| 3152 | ("cmd_code", c_uint32, 10), |
| 3153 | ("must_be_zero", c_uint32, 4), |
| 3154 | ("payload_size", c_uint32, 2), |
| 3155 | ("reserved0", c_uint32, 16), |
| 3156 | ("data", c_uint32, 32), |
| 3157 | ] |
| 3158 | def valid(self): return cmd_code==cmd1.NPU_SET_WEIGHT_LENGTH and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3159 | def get_cmd_code(self): return cmd_code |
| 3160 | def set_cmd_code(self, value): cmd_code = value |
| 3161 | def get_data(self): return data |
| 3162 | def set_data(self, value): data = value |
| 3163 | def get_payload_size(self): return payload_size |
| 3164 | def set_payload_size(self, value): payload_size = value |
| 3165 | |
| 3166 | class npu_set_scale_base_t(Structure): |
| 3167 | _fields_ = [ |
| 3168 | ("cmd_code", c_uint32, 10), |
| 3169 | ("must_be_zero", c_uint32, 4), |
| 3170 | ("payload_size", c_uint32, 2), |
| 3171 | ("reserved0", c_uint32, 16), |
| 3172 | ("data", c_uint32, 32), |
| 3173 | ] |
| 3174 | def valid(self): return cmd_code==cmd1.NPU_SET_SCALE_BASE and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3175 | def get_cmd_code(self): return cmd_code |
| 3176 | def set_cmd_code(self, value): cmd_code = value |
| 3177 | def get_data(self): return data |
| 3178 | def set_data(self, value): data = value |
| 3179 | def get_payload_size(self): return payload_size |
| 3180 | def set_payload_size(self, value): payload_size = value |
| 3181 | |
| 3182 | class npu_set_scale_length_t(Structure): |
| 3183 | _fields_ = [ |
| 3184 | ("cmd_code", c_uint32, 10), |
| 3185 | ("must_be_zero", c_uint32, 4), |
| 3186 | ("payload_size", c_uint32, 2), |
| 3187 | ("reserved0", c_uint32, 16), |
| 3188 | ("data", c_uint32, 32), |
| 3189 | ] |
| 3190 | def valid(self): return cmd_code==cmd1.NPU_SET_SCALE_LENGTH and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3191 | def get_cmd_code(self): return cmd_code |
| 3192 | def set_cmd_code(self, value): cmd_code = value |
| 3193 | def get_data(self): return data |
| 3194 | def set_data(self, value): data = value |
| 3195 | def get_payload_size(self): return payload_size |
| 3196 | def set_payload_size(self, value): payload_size = value |
| 3197 | |
| 3198 | class npu_set_ofm_scale_t(Structure): |
| 3199 | _fields_ = [ |
| 3200 | ("cmd_code", c_uint32, 10), |
| 3201 | ("must_be_zero", c_uint32, 4), |
| 3202 | ("payload_size", c_uint32, 2), |
| 3203 | ("shift", c_uint32, 16), |
| 3204 | ("data", c_uint32, 32), |
| 3205 | ] |
| 3206 | def valid(self): return cmd_code==cmd1.NPU_SET_OFM_SCALE and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3207 | def get_cmd_code(self): return cmd_code |
| 3208 | def set_cmd_code(self, value): cmd_code = value |
| 3209 | def get_data(self): return data |
| 3210 | def set_data(self, value): data = value |
| 3211 | def get_payload_size(self): return payload_size |
| 3212 | def set_payload_size(self, value): payload_size = value |
| 3213 | def get_shift(self): return shift |
| 3214 | def set_shift(self, value): shift = value |
| 3215 | |
| 3216 | class npu_set_opa_scale_t(Structure): |
| 3217 | _fields_ = [ |
| 3218 | ("cmd_code", c_uint32, 10), |
| 3219 | ("must_be_zero", c_uint32, 4), |
| 3220 | ("payload_size", c_uint32, 2), |
| 3221 | ("shift", c_uint32, 16), |
| 3222 | ("data", c_uint32, 32), |
| 3223 | ] |
| 3224 | def valid(self): return cmd_code==cmd1.NPU_SET_OPA_SCALE and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3225 | def get_cmd_code(self): return cmd_code |
| 3226 | def set_cmd_code(self, value): cmd_code = value |
| 3227 | def get_data(self): return data |
| 3228 | def set_data(self, value): data = value |
| 3229 | def get_payload_size(self): return payload_size |
| 3230 | def set_payload_size(self, value): payload_size = value |
| 3231 | def get_shift(self): return shift |
| 3232 | def set_shift(self, value): shift = value |
| 3233 | |
| 3234 | class npu_set_opb_scale_t(Structure): |
| 3235 | _fields_ = [ |
| 3236 | ("cmd_code", c_uint32, 10), |
| 3237 | ("must_be_zero", c_uint32, 4), |
| 3238 | ("payload_size", c_uint32, 2), |
| 3239 | ("reserved0", c_uint32, 16), |
| 3240 | ("data", c_uint32, 32), |
| 3241 | ] |
| 3242 | def valid(self): return cmd_code==cmd1.NPU_SET_OPB_SCALE and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3243 | def get_cmd_code(self): return cmd_code |
| 3244 | def set_cmd_code(self, value): cmd_code = value |
| 3245 | def get_data(self): return data |
| 3246 | def set_data(self, value): data = value |
| 3247 | def get_payload_size(self): return payload_size |
| 3248 | def set_payload_size(self, value): payload_size = value |
| 3249 | |
| 3250 | class npu_set_dma0_src_t(Structure): |
| 3251 | _fields_ = [ |
| 3252 | ("cmd_code", c_uint32, 10), |
| 3253 | ("must_be_zero", c_uint32, 4), |
| 3254 | ("payload_size", c_uint32, 2), |
| 3255 | ("reserved0", c_uint32, 16), |
| 3256 | ("data", c_uint32, 32), |
| 3257 | ] |
| 3258 | def valid(self): return cmd_code==cmd1.NPU_SET_DMA0_SRC and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3259 | def get_cmd_code(self): return cmd_code |
| 3260 | def set_cmd_code(self, value): cmd_code = value |
| 3261 | def get_data(self): return data |
| 3262 | def set_data(self, value): data = value |
| 3263 | def get_payload_size(self): return payload_size |
| 3264 | def set_payload_size(self, value): payload_size = value |
| 3265 | |
| 3266 | class npu_set_dma0_dst_t(Structure): |
| 3267 | _fields_ = [ |
| 3268 | ("cmd_code", c_uint32, 10), |
| 3269 | ("must_be_zero", c_uint32, 4), |
| 3270 | ("payload_size", c_uint32, 2), |
| 3271 | ("reserved0", c_uint32, 16), |
| 3272 | ("data", c_uint32, 32), |
| 3273 | ] |
| 3274 | def valid(self): return cmd_code==cmd1.NPU_SET_DMA0_DST and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3275 | def get_cmd_code(self): return cmd_code |
| 3276 | def set_cmd_code(self, value): cmd_code = value |
| 3277 | def get_data(self): return data |
| 3278 | def set_data(self, value): data = value |
| 3279 | def get_payload_size(self): return payload_size |
| 3280 | def set_payload_size(self, value): payload_size = value |
| 3281 | |
| 3282 | class npu_set_dma0_len_t(Structure): |
| 3283 | _fields_ = [ |
| 3284 | ("cmd_code", c_uint32, 10), |
| 3285 | ("must_be_zero", c_uint32, 4), |
| 3286 | ("payload_size", c_uint32, 2), |
| 3287 | ("reserved0", c_uint32, 16), |
| 3288 | ("data", c_uint32, 32), |
| 3289 | ] |
| 3290 | def valid(self): return cmd_code==cmd1.NPU_SET_DMA0_LEN and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3291 | def get_cmd_code(self): return cmd_code |
| 3292 | def set_cmd_code(self, value): cmd_code = value |
| 3293 | def get_data(self): return data |
| 3294 | def set_data(self, value): data = value |
| 3295 | def get_payload_size(self): return payload_size |
| 3296 | def set_payload_size(self, value): payload_size = value |
| 3297 | |
| 3298 | class npu_set_dma0_skip0_t(Structure): |
| 3299 | _fields_ = [ |
| 3300 | ("cmd_code", c_uint32, 10), |
| 3301 | ("must_be_zero", c_uint32, 4), |
| 3302 | ("payload_size", c_uint32, 2), |
| 3303 | ("param", c_uint32, 16), |
| 3304 | ("data", c_uint32, 32), |
| 3305 | ] |
| 3306 | def valid(self): return cmd_code==cmd1.NPU_SET_DMA0_SKIP0 and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3307 | def get_cmd_code(self): return cmd_code |
| 3308 | def set_cmd_code(self, value): cmd_code = value |
| 3309 | def get_data(self): return data |
| 3310 | def set_data(self, value): data = value |
| 3311 | def get_param(self): return param |
| 3312 | def set_param(self, value): param = value |
| 3313 | def get_payload_size(self): return payload_size |
| 3314 | def set_payload_size(self, value): payload_size = value |
| 3315 | |
| 3316 | class npu_set_dma0_skip1_t(Structure): |
| 3317 | _fields_ = [ |
| 3318 | ("cmd_code", c_uint32, 10), |
| 3319 | ("must_be_zero", c_uint32, 4), |
| 3320 | ("payload_size", c_uint32, 2), |
| 3321 | ("param", c_uint32, 16), |
| 3322 | ("data", c_uint32, 32), |
| 3323 | ] |
| 3324 | def valid(self): return cmd_code==cmd1.NPU_SET_DMA0_SKIP1 and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3325 | def get_cmd_code(self): return cmd_code |
| 3326 | def set_cmd_code(self, value): cmd_code = value |
| 3327 | def get_data(self): return data |
| 3328 | def set_data(self, value): data = value |
| 3329 | def get_param(self): return param |
| 3330 | def set_param(self, value): param = value |
| 3331 | def get_payload_size(self): return payload_size |
| 3332 | def set_payload_size(self, value): payload_size = value |
| 3333 | |
| 3334 | class npu_set_ifm2_base0_t(Structure): |
| 3335 | _fields_ = [ |
| 3336 | ("cmd_code", c_uint32, 10), |
| 3337 | ("must_be_zero", c_uint32, 4), |
| 3338 | ("payload_size", c_uint32, 2), |
| 3339 | ("reserved0", c_uint32, 16), |
| 3340 | ("data", c_uint32, 32), |
| 3341 | ] |
| 3342 | def valid(self): return cmd_code==cmd1.NPU_SET_IFM2_BASE0 and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3343 | def get_cmd_code(self): return cmd_code |
| 3344 | def set_cmd_code(self, value): cmd_code = value |
| 3345 | def get_data(self): return data |
| 3346 | def set_data(self, value): data = value |
| 3347 | def get_payload_size(self): return payload_size |
| 3348 | def set_payload_size(self, value): payload_size = value |
| 3349 | |
| 3350 | class npu_set_ifm2_base1_t(Structure): |
| 3351 | _fields_ = [ |
| 3352 | ("cmd_code", c_uint32, 10), |
| 3353 | ("must_be_zero", c_uint32, 4), |
| 3354 | ("payload_size", c_uint32, 2), |
| 3355 | ("reserved0", c_uint32, 16), |
| 3356 | ("data", c_uint32, 32), |
| 3357 | ] |
| 3358 | def valid(self): return cmd_code==cmd1.NPU_SET_IFM2_BASE1 and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3359 | def get_cmd_code(self): return cmd_code |
| 3360 | def set_cmd_code(self, value): cmd_code = value |
| 3361 | def get_data(self): return data |
| 3362 | def set_data(self, value): data = value |
| 3363 | def get_payload_size(self): return payload_size |
| 3364 | def set_payload_size(self, value): payload_size = value |
| 3365 | |
| 3366 | class npu_set_ifm2_base2_t(Structure): |
| 3367 | _fields_ = [ |
| 3368 | ("cmd_code", c_uint32, 10), |
| 3369 | ("must_be_zero", c_uint32, 4), |
| 3370 | ("payload_size", c_uint32, 2), |
| 3371 | ("reserved0", c_uint32, 16), |
| 3372 | ("data", c_uint32, 32), |
| 3373 | ] |
| 3374 | def valid(self): return cmd_code==cmd1.NPU_SET_IFM2_BASE2 and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3375 | def get_cmd_code(self): return cmd_code |
| 3376 | def set_cmd_code(self, value): cmd_code = value |
| 3377 | def get_data(self): return data |
| 3378 | def set_data(self, value): data = value |
| 3379 | def get_payload_size(self): return payload_size |
| 3380 | def set_payload_size(self, value): payload_size = value |
| 3381 | |
| 3382 | class npu_set_ifm2_base3_t(Structure): |
| 3383 | _fields_ = [ |
| 3384 | ("cmd_code", c_uint32, 10), |
| 3385 | ("must_be_zero", c_uint32, 4), |
| 3386 | ("payload_size", c_uint32, 2), |
| 3387 | ("reserved0", c_uint32, 16), |
| 3388 | ("data", c_uint32, 32), |
| 3389 | ] |
| 3390 | def valid(self): return cmd_code==cmd1.NPU_SET_IFM2_BASE3 and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3391 | def get_cmd_code(self): return cmd_code |
| 3392 | def set_cmd_code(self, value): cmd_code = value |
| 3393 | def get_data(self): return data |
| 3394 | def set_data(self, value): data = value |
| 3395 | def get_payload_size(self): return payload_size |
| 3396 | def set_payload_size(self, value): payload_size = value |
| 3397 | |
| 3398 | class npu_set_ifm2_stride_x_t(Structure): |
| 3399 | _fields_ = [ |
| 3400 | ("cmd_code", c_uint32, 10), |
| 3401 | ("must_be_zero", c_uint32, 4), |
| 3402 | ("payload_size", c_uint32, 2), |
| 3403 | ("reserved0", c_uint32, 16), |
| 3404 | ("data", c_uint32, 32), |
| 3405 | ] |
| 3406 | def valid(self): return cmd_code==cmd1.NPU_SET_IFM2_STRIDE_X and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3407 | def get_cmd_code(self): return cmd_code |
| 3408 | def set_cmd_code(self, value): cmd_code = value |
| 3409 | def get_data(self): return data |
| 3410 | def set_data(self, value): data = value |
| 3411 | def get_payload_size(self): return payload_size |
| 3412 | def set_payload_size(self, value): payload_size = value |
| 3413 | |
| 3414 | class npu_set_ifm2_stride_y_t(Structure): |
| 3415 | _fields_ = [ |
| 3416 | ("cmd_code", c_uint32, 10), |
| 3417 | ("must_be_zero", c_uint32, 4), |
| 3418 | ("payload_size", c_uint32, 2), |
| 3419 | ("reserved0", c_uint32, 16), |
| 3420 | ("data", c_uint32, 32), |
| 3421 | ] |
| 3422 | def valid(self): return cmd_code==cmd1.NPU_SET_IFM2_STRIDE_Y and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3423 | def get_cmd_code(self): return cmd_code |
| 3424 | def set_cmd_code(self, value): cmd_code = value |
| 3425 | def get_data(self): return data |
| 3426 | def set_data(self, value): data = value |
| 3427 | def get_payload_size(self): return payload_size |
| 3428 | def set_payload_size(self, value): payload_size = value |
| 3429 | |
| 3430 | class npu_set_ifm2_stride_c_t(Structure): |
| 3431 | _fields_ = [ |
| 3432 | ("cmd_code", c_uint32, 10), |
| 3433 | ("must_be_zero", c_uint32, 4), |
| 3434 | ("payload_size", c_uint32, 2), |
| 3435 | ("reserved0", c_uint32, 16), |
| 3436 | ("data", c_uint32, 32), |
| 3437 | ] |
| 3438 | def valid(self): return cmd_code==cmd1.NPU_SET_IFM2_STRIDE_C and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3439 | def get_cmd_code(self): return cmd_code |
| 3440 | def set_cmd_code(self, value): cmd_code = value |
| 3441 | def get_data(self): return data |
| 3442 | def set_data(self, value): data = value |
| 3443 | def get_payload_size(self): return payload_size |
| 3444 | def set_payload_size(self, value): payload_size = value |
| 3445 | |
| 3446 | class npu_set_weight1_base_t(Structure): |
| 3447 | _fields_ = [ |
| 3448 | ("cmd_code", c_uint32, 10), |
| 3449 | ("must_be_zero", c_uint32, 4), |
| 3450 | ("payload_size", c_uint32, 2), |
| 3451 | ("param", c_uint32, 16), |
| 3452 | ("data", c_uint32, 32), |
| 3453 | ] |
| 3454 | def valid(self): return cmd_code==cmd1.NPU_SET_WEIGHT1_BASE and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3455 | def get_cmd_code(self): return cmd_code |
| 3456 | def set_cmd_code(self, value): cmd_code = value |
| 3457 | def get_data(self): return data |
| 3458 | def set_data(self, value): data = value |
| 3459 | def get_param(self): return param |
| 3460 | def set_param(self, value): param = value |
| 3461 | def get_payload_size(self): return payload_size |
| 3462 | def set_payload_size(self, value): payload_size = value |
| 3463 | |
| 3464 | class npu_set_weight1_length_t(Structure): |
| 3465 | _fields_ = [ |
| 3466 | ("cmd_code", c_uint32, 10), |
| 3467 | ("must_be_zero", c_uint32, 4), |
| 3468 | ("payload_size", c_uint32, 2), |
| 3469 | ("reserved0", c_uint32, 16), |
| 3470 | ("data", c_uint32, 32), |
| 3471 | ] |
| 3472 | def valid(self): return cmd_code==cmd1.NPU_SET_WEIGHT1_LENGTH and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3473 | def get_cmd_code(self): return cmd_code |
| 3474 | def set_cmd_code(self, value): cmd_code = value |
| 3475 | def get_data(self): return data |
| 3476 | def set_data(self, value): data = value |
| 3477 | def get_payload_size(self): return payload_size |
| 3478 | def set_payload_size(self, value): payload_size = value |
| 3479 | |
| 3480 | class npu_set_scale1_base_t(Structure): |
| 3481 | _fields_ = [ |
| 3482 | ("cmd_code", c_uint32, 10), |
| 3483 | ("must_be_zero", c_uint32, 4), |
| 3484 | ("payload_size", c_uint32, 2), |
| 3485 | ("param", c_uint32, 16), |
| 3486 | ("data", c_uint32, 32), |
| 3487 | ] |
| 3488 | def valid(self): return cmd_code==cmd1.NPU_SET_SCALE1_BASE and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3489 | def get_cmd_code(self): return cmd_code |
| 3490 | def set_cmd_code(self, value): cmd_code = value |
| 3491 | def get_data(self): return data |
| 3492 | def set_data(self, value): data = value |
| 3493 | def get_param(self): return param |
| 3494 | def set_param(self, value): param = value |
| 3495 | def get_payload_size(self): return payload_size |
| 3496 | def set_payload_size(self, value): payload_size = value |
| 3497 | |
| 3498 | class npu_set_scale1_length_t(Structure): |
| 3499 | _fields_ = [ |
| 3500 | ("cmd_code", c_uint32, 10), |
| 3501 | ("must_be_zero", c_uint32, 4), |
| 3502 | ("payload_size", c_uint32, 2), |
| 3503 | ("reserved0", c_uint32, 16), |
| 3504 | ("data", c_uint32, 32), |
| 3505 | ] |
| 3506 | def valid(self): return cmd_code==cmd1.NPU_SET_SCALE1_LENGTH and must_be_zero==0 and payload_size>=1 and payload_size<=2; |
| 3507 | def get_cmd_code(self): return cmd_code |
| 3508 | def set_cmd_code(self, value): cmd_code = value |
| 3509 | def get_data(self): return data |
| 3510 | def set_data(self, value): data = value |
| 3511 | def get_payload_size(self): return payload_size |
| 3512 | def set_payload_size(self, value): payload_size = value |
Diqing Zhong | b731170 | 2020-04-14 12:31:44 +0200 | [diff] [blame] | 3513 | |