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review.mlplatform.org / ml / armnn / 0506ef0a099f5ba564af5e110e6857a68f462080 / . / docs / 02_operator_list.dox
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Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]1/// Copyright (c) 2021 ARM Limited and Contributors. All rights reserved.
2///
3/// SPDX-License-Identifier: MIT
4///
5
6namespace armnn
7{
8/**
9@page operator_list Arm NN Operators
10
11@tableofcontents
12
13@section S5_1_operator_list Arm NN Operators
14
15Arm NN supports operators that are listed in below table.
16
17Arm NN supports a wide list of data-types.
18The main data-types that the Machine Learning functions support are the following:
19 <ul>
20 <li><b>BFLOAT16:</b> 16-bit non-standard brain floating point
21 <li><b>QASYMMU8:</b> 8-bit unsigned asymmetric quantized
22 <li><b>QASYMMS8:</b> 8-bit signed asymmetric quantized
23 <li><b>QUANTIZEDSYMM8PERAXIS:</b> 8-bit signed symmetric quantized
Cathal Corbettb85113e2022-02-22 11:51:43 +0000[diff] [blame]24 <li><b>QSYMMS8:</b> 8-bit signed symmetric quantized
25 <li><b>QSYMMS16:</b> 16-bit signed symmetric quantized
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]26 <li><b>FLOAT32:</b> 32-bit single precision floating point
27 <li><b>FLOAT16:</b> 16-bit half precision floating point
28 <li><b>SIGNED32:</b> 32-bit signed integer
29 <li><b>BOOLEAN:</b> 8-bit unsigned char
30 <li><b>All:</b> Agnostic to any specific data type
31 </ul>
32
33Arm NN supports the following data layouts (fast changing dimension from right to left):
34 <ul>
35 <li><b>NHWC:</b> Layout where channels are in the fastest changing dimension
36 <li><b>NCHW:</b> Layout where width is in the fastest changing dimension
37 <li><b>All:</b> Agnostic to any specific data layout
38 </ul>
39where N = batches, C = channels, H = height, W = width
40
41<table>
42<caption id="multi_row"></caption>
43<tr>
44 <th>Operator
45 <th>Description
46 <th>Equivalent Android NNAPI Operator
47 <th>Backends
48 <th>Data Layouts
49 <th>Data Types
50<tr>
51 <td rowspan="3">AbsLayer
52 <td rowspan="3"> Layer to perform absolute operation.
53 <td rowspan="3">
54 <ul>
55 <li>ANEURALNETWORKS_ABS
56 </ul>
57 <td>CpuRef
58 <td>
59 <ul>
60 <li>All
61 </ul>
62 <td>
63 <table>
64 <tr><th>
65 <tr><td>BFLOAT16
66 <tr><td>FLOAT16
67 <tr><td>FLOAT32
68 <tr><td>QASYMMS8
69 <tr><td>QASYMMU8
70 <tr><td>QSYMMS16
71 <tr><td>SIGNED32
72 </table>
73<tr>
74 <td>CpuAcc
75 <td>
76 <ul>
77 <li>All
78 </ul>
79 <td>
80 <table>
81 <tr><th>
82 <tr><td>FLOAT16
83 <tr><td>FLOAT32
84 <tr><td>SIGNED32
85 </table>
86<tr>
87 <td>GpuAcc
88 <td>
89 <ul>
90 <li>All
91 </ul>
92 <td>
93 <table>
94 <tr><th>
95 <tr><td>FLOAT16
96 <tr><td>FLOAT32
97 </table>
98<tr>
99 <td rowspan="3">ActivationLayer
100 <td rowspan="3" style="width:200px;"> Layer to simulate an activation layer with the specified activation function.
101 <td rowspan="3">
102 <ul>
103 <li>ANEURALNETWORKS_ABS
104 <li>ANEURALNETWORKS_ELU
105 <li>ANEURALNETWORKS_HARD_SWISH
106 <li>ANEURALNETWORKS_LOGISTIC
107 <li>ANEURALNETWORKS_PRELU
108 <li>ANEURALNETWORKS_RELU
109 <li>ANEURALNETWORKS_RELU1
110 <li>ANEURALNETWORKS_RELU6
111 <li>ANEURALNETWORKS_SQRT
112 <li>ANEURALNETWORKS_TANH
113 </ul>
114 <td>CpuRef
115 <td>
116 <ul>
117 <li>All
118 </ul>
119 <td>
120 <table>
121 <tr><th>
122 <tr><td>BFLOAT16
123 <tr><td>FLOAT16
124 <tr><td>FLOAT32
125 <tr><td>QASYMMS8
126 <tr><td>QASYMMU8
127 <tr><td>QSYMMS16
128 </table>
129<tr>
130 <td>CpuAcc
131 <td>
132 <ul>
133 <li>All
134 </ul>
135 <td>
136 <table>
137 <tr><th>
138 <tr><td>QASYMMU8
139 <tr><td>QASYMMS8
140 <tr><td>QSYMMS16
141 <tr><td>FLOAT16
142 <tr><td>FLOAT32
143 </table>
144<tr>
145 <td>GpuAcc
146 <td>
147 <ul>
148 <li>All
149 </ul>
150 <td>
151 <table>
152 <tr><th>
153 <tr><td>QASYMMU8
154 <tr><td>QASYMMS8
155 <tr><td>QSYMMS16
156 <tr><td>FLOAT16
157 <tr><td>FLOAT32
158 </table>
159<tr>
160 <td rowspan="3">AdditionLayer
161 <td rowspan="3" style="width:200px;"> Layer to add 2 tensors.
162 <td rowspan="3">
163 <ul>
164 <li>ANEURALNETWORKS_ADD
165 </ul>
166 <td>CpuRef
167 <td>
168 <ul>
169 <li>All
170 </ul>
171 <td>
172 <table>
173 <tr><th>
174 <tr><td>BFLOAT16
175 <tr><td>FLOAT16
176 <tr><td>FLOAT32
177 <tr><td>QASYMMS8
178 <tr><td>QASYMMU8
179 <tr><td>QSYMMS16
180 <tr><td>SIGNED32
181 </table>
182<tr>
183 <td>CpuAcc
184 <td>
185 <ul>
186 <li>All
187 </ul>
188 <td>
189 <table>
190 <tr><th>
191 <tr><td>QASYMMU8
192 <tr><td>QASYMMS8
193 <tr><td>QSYMMS16
194 <tr><td>SIGNED32
195 <tr><td>FLOAT16
196 <tr><td>FLOAT32
197 </table>
198<tr>
199 <td>GpuAcc
200 <td>
201 <ul>
202 <li>All
203 </ul>
204 <td>
205 <table>
206 <tr><th>
207 <tr><td>QASYMMU8
208 <tr><td>QASYMMS8
209 <tr><td>QSYMMS16
210 <tr><td>SIGNED32
211 <tr><td>FLOAT16
212 <tr><td>FLOAT32
213 </table>
214<tr>
215 <td rowspan="3">ArgMinMaxLayer
216 <td rowspan="3" style="width:200px;"> Layer to calculate the index of the minimum or maximum values in a tensor
217 based on an axis.
218 <td rowspan="3">
219 <ul>
220 <li>ANEURALNETWORKS_ARGMAX
221 <li>ANEURALNETWORKS_ARGMIN
222 </ul>
223 <td>CpuRef
224 <td>
225 <ul>
226 <li>All
227 </ul>
228 <td>
229 <table>
230 <tr><th>
231 <tr><td>BFLOAT16
232 <tr><td>FLOAT16
233 <tr><td>FLOAT32
234 <tr><td>QASYMMS8
235 <tr><td>QASYMMU8
236 <tr><td>QSYMMS16
237 <tr><td>SIGNED32
238 <tr><td>SIGNED64
239 </table>
240<tr>
241 <td>CpuAcc
242 <td>
243 <ul>
244 <li>All
245 </ul>
246 <td>
247 <table>
248 <tr><th>
249 <tr><td>QASYMMU8
250 <tr><td>QASYMMS8
251 <tr><td>SIGNED32
252 <tr><td>FLOAT16
253 <tr><td>FLOAT32
254 </table>
255<tr>
256 <td>GpuAcc
257 <td>
258 <ul>
259 <li>All
260 </ul>
261 <td>
262 <table>
263 <tr><th>
264 <tr><td>QASYMMU8
265 <tr><td>QASYMMS8
266 <tr><td>SIGNED32
267 <tr><td>FLOAT16
268 <tr><td>FLOAT32
269 </table>
270<tr>
Samuel Yap6b478092022-07-06 15:36:03 +0100[diff] [blame]271 <td rowspan="3">BatchMatMulLayer
272 <td rowspan="3" style="width:200px;"> Layer to perform batch matrix multiplication.
273 <td rowspan="3">
274 <ul>
275 <li>N/A
276 </ul>
277 <td>CpuRef
278 <td>
279 <ul>
280 <li>All
281 </ul>
282 <td>
283 <table>
284 <tr><th>
285 <tr><td>BFLOAT16
286 <tr><td>FLOAT16
287 <tr><td>FLOAT32
288 <tr><td>QASYMMS8
289 <tr><td>QASYMMU8
290 <tr><td>QSYMMS16
291 </table>
292<tr>
293 <td>CpuAcc
294 <td>
295 <ul>
Teresa Charlin0f86ecf2022-10-13 15:47:08 +0100[diff] [blame]296 <li>All
Samuel Yap6b478092022-07-06 15:36:03 +0100[diff] [blame]297 </ul>
298 <td>
Teresa Charlin0f86ecf2022-10-13 15:47:08 +0100[diff] [blame]299 <table>
300 <tr><th>
301 <tr><td>FLOAT32
302 </table>
Samuel Yap6b478092022-07-06 15:36:03 +0100[diff] [blame]303<tr>
304 <td>GpuAcc
305 <td>
306 <ul>
307 <li>N/A
308 </ul>
309 <td>
310 <ul>
311 <li>N/A
312 </ul>
313<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]314 <td rowspan="3">BatchNormalizationLayer
315 <td rowspan="3" style="width:200px;"> Layer to perform batch normalization.
316 <td rowspan="3">
317 <ul>
318 <li>N/A
319 </ul>
320 <td>CpuRef
321 <td>
322 <ul>
323 <li>All
324 </ul>
325 <td>
326 <table>
327 <tr><th>
328 <tr><td>BFLOAT16
329 <tr><td>FLOAT16
330 <tr><td>FLOAT32
331 <tr><td>QASYMMS8
332 <tr><td>QASYMMU8
333 <tr><td>QSYMMS16
334 </table>
335<tr>
336 <td>CpuAcc
337 <td>
338 <ul>
339 <li>NHWC
340 <li>NCHW
341 </ul>
342 <td>
343 <table>
344 <tr><th>
345 <tr><td>FLOAT32
346 <tr><td>FLOAT16
347 </table>
348<tr>
349 <td>GpuAcc
350 <td>
351 <ul>
352 <li>NHWC
353 <li>NCHW
354 </ul>
355 <td>
356 <table>
357 <tr><th>
358 <tr><td>FLOAT32
359 <tr><td>FLOAT16
360 </table>
361<tr>
362 <td rowspan="3">BatchToSpaceNdLayer
363 <td rowspan="3" style="width:200px;"> Layer to perform a batch to space transformation.
364 <td rowspan="3">
365 <ul>
366 <li>ANEURALNETWORKS_BATCH_TO_SPACE_ND
367 </ul>
368 <td>CpuRef
369 <td>
370 <ul>
371 <li>All
372 </ul>
373 <td>
374 <table>
375 <tr><th>
376 <tr><td>BFLOAT16
377 <tr><td>FLOAT16
378 <tr><td>FLOAT32
379 <tr><td>QASYMMS8
380 <tr><td>QASYMMU8
381 <tr><td>QSYMMS16
382 </table>
383<tr>
384 <td>CpuAcc
385 <td>
386 <ul>
387 <li>NHWC
388 <li>NCHW
389 </ul>
390 <td>
391 <table>
392 <tr><th>
393 <tr><td>All
394 </table>
395<tr>
396 <td>GpuAcc
397 <td>
398 <ul>
399 <li>NHWC
400 <li>NCHW
401 </ul>
402 <td>
403 <table>
404 <tr><th>
405 <tr><td>All
406 </table>
407<tr>
408 <td rowspan="3">CastLayer
409 <td rowspan="3" style="width:200px;"> Layer to cast a tensor to a type.
410 <td rowspan="3">
411 <ul>
412 <li>ANEURALNETWORKS_CAST
413 </ul>
414 <td>CpuRef
415 <td>
416 <ul>
417 <li>All
418 </ul>
419 <td>
420 <table>
421 <tr><th>
422 <tr><td>BFLOAT16
423 <tr><td>FLOAT16
424 <tr><td>FLOAT32
425 <tr><td>QSYMMS8
426 <tr><td>QASYMMS8
427 <tr><td>QASYMMU8
428 <tr><td>QSYMMS16
429 <tr><td>SIGNED32
430 </table>
431<tr>
432 <td>CpuAcc
433 <td>
434 <ul>
435 <li>All
436 </ul>
437 <td>
438 <table>
439 <tr><th>
440 <tr><td>QASYMMS8
441 <tr><td>QASYMMU8
442 <tr><td>FLOAT16
443 <tr><td>SIGNED32
444 <tr><td>FLOAT32
445 </table>
446<tr>
447 <td>GpuAcc
448 <td>
449 <ul>
450 <li>All
451 </ul>
452 <td>
453 <table>
454 <tr><th>
455 <tr><td>QASYMMS8
456 <tr><td>QASYMMU8
457 <tr><td>SIGNED32
458 <tr><td>FLOAT16
459 <tr><td>FLOAT32
460 </table>
461<tr>
Teresa Charlincd203852021-09-24 18:15:39 +0100[diff] [blame]462 <td rowspan="3">ChannelShuffleLayer
463 <td rowspan="3" style="width:200px;"> Layer to reorganize the channels of a tensor.
464 <td rowspan="3">
465 <ul>
466 <li>ANEURALNETWORKS_CHANNEL_SHUFFLE
467 </ul>
468 <td>CpuRef
469 <td>
470 <ul>
471 <li>All
472 </ul>
473 <td>
474 <table>
475 <tr><th>
476 <tr><td>FLOAT16
477 <tr><td>FLOAT32
478 <tr><td>QSYMMS8
479 <tr><td>QASYMMS8
480 <tr><td>QASYMMU8
481 </table>
482<tr>
483 <td>CpuAcc
484 <td>
485 <ul>
486 <li>All
487 </ul>
488 <td>
489 <table>
490 <tr><th>
491 <tr><td>QASYMMS8
492 <tr><td>QASYMMU8
493 <tr><td>FLOAT16
494 <tr><td>FLOAT32
495 </table>
496<tr>
497 <td>GpuAcc
498 <td>
499 <ul>
500 <li>All
501 </ul>
502 <td>
503 <table>
504 <tr><th>
505 <tr><td>QASYMMS8
506 <tr><td>QASYMMU8
507 <tr><td>FLOAT16
508 <tr><td>FLOAT32
509 </table>
510<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]511 <td rowspan="3">ComparisonLayer
512 <td rowspan="3" style="width:200px;"> Layer to compare 2 tensors.
513 <td rowspan="3">
514 <ul>
515 <li>ANEURALNETWORKS_EQUAL
516 <li>ANEURALNETWORKS_GREATER
517 <li>ANEURALNETWORKS_GREATER_EQUAL
518 <li>ANEURALNETWORKS_LESS
519 <li>ANEURALNETWORKS_LESS_EQUAL
520 <li>ANEURALNETWORKS_NOT_EQUAL
521 </ul>
522 <td>CpuRef
523 <td>
524 <ul>
525 <li>All
526 </ul>
527 <td>
528 <table>
529 <tr><th>
530 <tr><td>BFLOAT16
531 <tr><td>FLOAT16
532 <tr><td>FLOAT32
533 <tr><td>BOOLEAN
534 <tr><td>QASYMMS8
535 <tr><td>QASYMMU8
536 <tr><td>QSYMMS16
537 <tr><td>SIGNED32
538 </table>
539<tr>
540 <td>CpuAcc
541 <td>
542 <ul>
543 <li>All
544 </ul>
545 <td>
546 <table>
547 <tr><th>
548 <tr><td>All
549 </table>
550<tr>
551 <td>GpuAcc
552 <td>
553 <ul>
554 <li>All
555 </ul>
556 <td>
557 <table>
558 <tr><th>
559 <tr><td>All
560 </table>
561<tr>
562 <td rowspan="3">ConcatLayer
563 <td rowspan="3" style="width:200px;"> Layer to concatenate tensors along a given axis.
564 <td rowspan="3">
565 <ul>
566 <li>ANEURALNETWORKS_CONCATENATION
567 </ul>
568 <td>CpuRef
569 <td>
570 <ul>
571 <li>All
572 </ul>
573 <td>
574 <table>
575 <tr><th>
576 <tr><td>BFLOAT16
577 <tr><td>FLOAT16
578 <tr><td>FLOAT32
579 <tr><td>QASYMMS8
580 <tr><td>QASYMMU8
581 <tr><td>QSYMMS16
582 </table>
583<tr>
584 <td>CpuAcc
585 <td>
586 <ul>
587 <li>All
588 </ul>
589 <td>
590 <table>
591 <tr><th>
592 <tr><td>QASYMMU8
593 <tr><td>QASYMMS8
594 <tr><td>FLOAT16
595 <tr><td>FLOAT32
596 </table>
597<tr>
598 <td>GpuAcc
599 <td>
600 <ul>
601 <li>All
602 </ul>
603 <td>
604 <table>
605 <tr><th>
606 <tr><td>QASYMMU8
607 <tr><td>QASYMMS8
608 <tr><td>FLOAT16
609 <tr><td>FLOAT32
610 </table>
611<tr>
612 <td rowspan="3">ConstantLayer
613 <td rowspan="3" style="width:200px;"> Layer to provide a constant tensor.
614 <td rowspan="3">
615 <ul>
616 <li>N/A
617 </ul>
618 <td>CpuRef
619 <td>
620 <ul>
621 <li>All
622 </ul>
623 <td>
624 <table>
625 <tr><th>
626 <tr><td>BFLOAT16
627 <tr><td>FLOAT16
628 <tr><td>FLOAT32
629 <tr><td>QASYMMS8
630 <tr><td>QASYMMU8
631 <tr><td>QSYMMS8
632 <tr><td>QSYMMS16
633 <tr><td>SIGNED32
634 </table>
635<tr>
636 <td>CpuAcc
637 <td>
638 <ul>
639 <li>All
640 </ul>
641 <td>
642 <table>
643 <tr><th>
644 <tr><td>All
645 </table>
646<tr>
647 <td>GpuAcc
648 <td>
649 <ul>
650 <li>All
651 </ul>
652 <td>
653 <table>
654 <tr><th>
655 <tr><td>All
656 </table>
657<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]658 <td rowspan="3">ConvertFp16ToFp32Layer
659 <td rowspan="3" style="width:200px;"> Layer to convert Float16 tensor to Float32 tensor.
660 <td rowspan="3">
661 <ul>
662 <li>N/A
663 </ul>
664 <td>CpuRef
665 <td>
666 <ul>
667 <li>All
668 </ul>
669 <td>
670 <table>
671 <tr><th>
672 <tr><td>FLOAT16
673 <tr><td>FLOAT32
674 </table>
675<tr>
676 <td>CpuAcc
677 <td>
678 <ul>
679 <li>All
680 </ul>
681 <td>
682 <table>
683 <tr><th>
684 <tr><td>FLOAT16
685 <tr><td>FLOAT32
686 </table>
687<tr>
688 <td>GpuAcc
689 <td>
690 <ul>
691 <li>All
692 </ul>
693 <td>
694 <table>
695 <tr><th>
696 <tr><td>FLOAT16
697 <tr><td>FLOAT32
698 </table>
699<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]700 <td rowspan="3">ConvertFp32ToFp16Layer
701 <td rowspan="3" style="width:200px;"> Layer to convert Float32 tensor to Float16 tensor.
702 <td rowspan="3">
703 <ul>
704 <li>N/A
705 </ul>
706 <td>CpuRef
707 <td>
708 <ul>
709 <li>All
710 </ul>
711 <td>
712 <table>
713 <tr><th>
714 <tr><td>FLOAT16
715 <tr><td>FLOAT32
716 </table>
717<tr>
718 <td>CpuAcc
719 <td>
720 <ul>
721 <li>All
722 </ul>
723 <td>
724 <table>
725 <tr><th>
726 <tr><td>FLOAT16
727 <tr><td>FLOAT32
728 </table>
729<tr>
730 <td>GpuAcc
731 <td>
732 <ul>
733 <li>All
734 </ul>
735 <td>
736 <table>
737 <tr><th>
738 <tr><td>FLOAT16
739 <tr><td>FLOAT32
740 </table>
741<tr>
742 <td rowspan="3">Convolution2dLayer
743 <td rowspan="3" style="width:200px;"> Layer to compute a convolution operation.
744 <td rowspan="3">
745 <ul>
746 <li>ANEURALNETWORKS_CONV_2D
747 <li>ANEURALNETWORKS_GROUPED_CONV_2D
748 </ul>
749 <td>CpuRef
750 <td>
751 <ul>
752 <li>All
753 </ul>
754 <td>
755 <table>
756 <tr><th>
757 <tr><td>BFLOAT16
758 <tr><td>FLOAT16
759 <tr><td>FLOAT32
760 <tr><td>QASYMMS8
761 <tr><td>QASYMMU8
762 <tr><td>QSYMMS16
763 </table>
764<tr>
765 <td>CpuAcc
766 <td>
767 <ul>
768 <li>NHWC
769 <li>NCHW
770 </ul>
771 <td>
772 <table>
773 <tr><th>
774 <tr><td>SIGNED32
775 <tr><td>FLOAT16
776 <tr><td>FLOAT32
777 <tr><td>QASYMMU8
778 <tr><td>QASYMMS8
779 <tr><td>QUANTIZEDSYMM8PERAXIS
780 </table>
781<tr>
782 <td>GpuAcc
783 <td>
784 <ul>
785 <li>NHWC
786 <li>NCHW
787 </ul>
788 <td>
789 <table>
790 <tr><th>
791 <tr><td>SIGNED32
792 <tr><td>FLOAT16
793 <tr><td>FLOAT32
794 <tr><td>QASYMMU8
795 <tr><td>QASYMMS8
796 <tr><td>QUANTIZEDSYMM8PERAXIS
797 </table>
798<tr>
Matthew Sloyanb63a3112021-09-08 13:05:51 +0100[diff] [blame]799 <td rowspan="3">Convolution3dLayer
800 <td rowspan="3" style="width:200px;"> Layer to compute a 3D convolution operation.
801 <td rowspan="3">
802 <ul>
803 <li>N/A
804 </ul>
805 <td>CpuRef
806 <td>
807 <ul>
808 <li>NDHWC
809 </ul>
810 <td>
811 <table>
812 <tr><th>
813 <tr><td>BFLOAT16
814 <tr><td>FLOAT16
815 <tr><td>FLOAT32
816 <tr><td>QASYMMS8
817 <tr><td>QASYMMU8
818 <tr><td>QSYMMS8
819 <tr><td>QSYMMS16
820 </table>
821<tr>
822 <td>CpuAcc
823 <td>
824 <ul>
825 <li>N/A
826 </ul>
827 <td>
828 <ul>
829 <li>N/A
830 </ul>
831<tr>
832 <td>GpuAcc
833 <td>
834 <ul>
835 <li>N/A
836 </ul>
837 <td>
838 <ul>
839 <li>N/A
840 </ul>
841<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]842 <td rowspan="1">DebugLayer
843 <td rowspan="1" style="width:200px;"> Layer to print out inter layer tensor information.
844 <td rowspan="1">
845 <ul>
846 <li>N/A
847 </ul>
848 <td>CpuRef
849 <td>
850 <ul>
851 <li>All
852 </ul>
853 <td>
854 <table>
855 <tr><th>
856 <tr><td>BFLOAT16
857 <tr><td>FLOAT16
858 <tr><td>FLOAT32
859 <tr><td>QASYMMS8
860 <tr><td>QASYMMU8
861 <tr><td>QSYMMS8
862 <tr><td>QSYMMS16
863 <tr><td>SIGNED32
864 </table>
865<tr>
866 <td rowspan="3">DepthToSpaceLayer
867 <td rowspan="3" style="width:200px;"> Layer to perform Depth to Space transformation.
868 <td rowspan="3">
869 <ul>
870 <li>ANEURALNETWORKS_DEPTH_TO_SPACE
871 </ul>
872 <td>CpuRef
873 <td>
874 <ul>
875 <li>All
876 </ul>
877 <td>
878 <table>
879 <tr><th>
880 <tr><td>BFLOAT16
881 <tr><td>FLOAT16
882 <tr><td>FLOAT32
883 <tr><td>QASYMMS8
884 <tr><td>QASYMMU8
885 <tr><td>QSYMMS16
886 </table>
887<tr>
888 <td>CpuAcc
889 <td>
890 <ul>
891 <li>NHWC
892 <li>NCHW
893 </ul>
894 <td>
895 <table>
896 <tr><th>
897 <tr><td>All
898 </table>
899<tr>
900 <td>GpuAcc
901 <td>
902 <ul>
903 <li>NHWC
904 <li>NCHW
905 </ul>
906 <td>
907 <table>
908 <tr><th>
909 <tr><td>All
910 </table>
911<tr>
912 <td rowspan="3">DepthwiseConvolution2dLayer
913 <td rowspan="3" style="width:200px;"> Layer to compute a deconvolution or transpose convolution.
914 <td rowspan="3">
915 <ul>
916 <li>ANEURALNETWORKS_DEPTHWISE_CONV_2D
917 </ul>
918 <td>CpuRef
919 <td>
920 <ul>
921 <li>All
922 </ul>
923 <td>
924 <table>
925 <tr><th>
926 <tr><td>BFLOAT16
927 <tr><td>FLOAT16
928 <tr><td>FLOAT32
929 <tr><td>QASYMMS8
930 <tr><td>QASYMMU8
931 <tr><td>QSYMMS8
932 <tr><td>QSYMMS16
933 </table>
934<tr>
935 <td>CpuAcc
936 <td>
937 <ul>
938 <li>NHWC
939 <li>NCHW
940 </ul>
941 <td>
942 <table>
943 <tr><th>
944 <tr><td>FLOAT16
945 <tr><td>FLOAT32
946 <tr><td>SIGNED32
947 <tr><td>QASYMMU8
948 <tr><td>QASYMMS8
949 <tr><td>QUANTIZEDSYMM8PERAXIS
950 </table>
951<tr>
952 <td>GpuAcc
953 <td>
954 <ul>
955 <li>NHWC
956 <li>NCHW
957 </ul>
958 <td>
959 <table>
960 <tr><th>
961 <tr><td>FLOAT16
962 <tr><td>FLOAT32
963 <tr><td>SIGNED32
964 <tr><td>QASYMMU8
965 <tr><td>QASYMMS8
966 <tr><td>QUANTIZEDSYMM8PERAXIS
967 </table>
968<tr>
969 <td rowspan="3">DequantizeLayer
970 <td rowspan="3" style="width:200px;"> Layer to dequantize the values in a tensor.
971 <td rowspan="3">
972 <ul>
973 <li>ANEURALNETWORKS_DEQUANTIZE
974 </ul>
975 <td>CpuRef
976 <td>
977 <ul>
978 <li>All
979 </ul>
980 <td>
981 <table>
982 <tr><th>
983 <tr><td>QASYMMS8
984 <tr><td>QASYMMU8
985 <tr><td>QSYMMS8
986 <tr><td>QSYMMS16
987 </table>
988<tr>
989 <td>CpuAcc
990 <td>
991 <ul>
992 <li>All
993 </ul>
994 <td>
995 <table>
996 <tr><th>
997 <tr><td>FLOAT16
998 <tr><td>FLOAT32
999 <tr><td>QASYMMU8
1000 <tr><td>QASYMMS8
1001 <tr><td>QUANTIZEDSYMM8PERAXIS
1002 <tr><td>QSYMMS8
1003 <tr><td>QSYMMS16
1004 </table>
1005<tr>
1006 <td>GpuAcc
1007 <td>
1008 <ul>
1009 <li>All
1010 </ul>
1011 <td>
1012 <table>
1013 <tr><th>
1014 <tr><td>FLOAT16
1015 <tr><td>FLOAT32
1016 <tr><td>QASYMMU8
1017 <tr><td>QASYMMS8
1018 <tr><td>QUANTIZEDSYMM8PERAXIS
1019 <tr><td>QSYMMS8
1020 <tr><td>QSYMMS16
1021 </table>
1022<tr>
1023 <td rowspan="2">DetectionPostProcessLayer
1024 <td rowspan="2" style="width:200px;"> Layer to generate the detection output based on center size encoded boxes, class prediction and anchors by doing non maximum suppression (NMS).
1025 <td rowspan="2">
1026 <ul>
1027 <li>ANEURALNETWORKS_DETECTION_POSTPROCESSING
1028 </ul>
1029 <td>CpuRef
1030 <td>
1031 <ul>
1032 <li>All
1033 </ul>
1034 <td>
1035 <table>
1036 <tr><th>
1037 <tr><td>BFLOAT16
1038 <tr><td>FLOAT16
1039 <tr><td>FLOAT32
1040 <tr><td>QASYMMS8
1041 <tr><td>QASYMMU8
1042 <tr><td>QSYMMS16
1043 </table>
1044<tr>
1045 <td>CpuAcc
1046 <td>
1047 <ul>
1048 <li>All
1049 </ul>
1050 <td>
1051 <table>
1052 <tr><th>
1053 <tr><td>QASYMMU8
1054 <tr><td>QASYMMS8
1055 <tr><td>FLOAT32
1056 </table>
1057<tr>
1058 <td rowspan="3">DivisionLayer
1059 <td rowspan="3" style="width:200px;"> Layer to divide 2 tensors.
1060 <td rowspan="3">
1061 <ul>
1062 <li>ANEURALNETWORKS_DIV
1063 </ul>
1064 <td>CpuRef
1065 <td>
1066 <ul>
1067 <li>All
1068 </ul>
1069 <td>
1070 <table>
1071 <tr><th>
1072 <tr><td>BFLOAT16
1073 <tr><td>FLOAT16
1074 <tr><td>FLOAT32
1075 <tr><td>QASYMMS8
1076 <tr><td>QASYMMU8
1077 <tr><td>QSYMMS16
1078 <tr><td>SIGNED32
1079 </table>
1080<tr>
1081 <td>CpuAcc
1082 <td>
1083 <ul>
1084 <li>All
1085 </ul>
1086 <td>
1087 <table>
1088 <tr><th>
1089 <tr><td>FLOAT16
1090 <tr><td>FLOAT32
1091 </table>
1092<tr>
1093 <td>GpuAcc
1094 <td>
1095 <ul>
1096 <li>All
1097 </ul>
1098 <td>
1099 <table>
1100 <tr><th>
1101 <tr><td>FLOAT16
1102 <tr><td>FLOAT32
1103 </table>
1104<tr>
1105 <td rowspan="3">ElementwiseBaseLayer
1106 <td rowspan="3" style="width:200px;"> Layer to perform Add - Div - Max - Min - Mul operations.
1107 <td rowspan="3">
1108 <ul>
1109 <li>ANEURALNETWORKS_ADD
1110 <li>ANEURALNETWORKS_DIV
1111 <li>ANEURALNETWORKS_MAXIMUM
1112 <li>ANEURALNETWORKS_MINIMUM
1113 <li>ANEURALNETWORKS_MUL
1114 </ul>
1115 <td>CpuRef
1116 <td>
1117 <ul>
1118 <li>All
1119 </ul>
1120 <td>
1121 <table>
1122 <tr><th>
1123 <tr><td>BFLOAT16
1124 <tr><td>FLOAT16
1125 <tr><td>FLOAT32
1126 <tr><td>QASYMMS8
1127 <tr><td>QASYMMU8
1128 <tr><td>QSYMMS16
1129 <tr><td>SIGNED32
1130 </table>
1131<tr>
1132 <td>CpuAcc
1133 <td>
1134 <ul>
1135 <li>All
1136 </ul>
1137 <td>
1138 <table>
1139 <tr><th>
1140 <tr><td>QASYMMU8
1141 <tr><td>QASYMMS8
1142 <tr><td>QSYMMS16
1143 <tr><td>SIGNED32
1144 <tr><td>FLOAT16
1145 <tr><td>FLOAT32
1146 </table>
1147<tr>
1148 <td>GpuAcc
1149 <td>
1150 <ul>
1151 <li>All
1152 </ul>
1153 <td>
1154 <table>
1155 <tr><th>
1156 <tr><td>QASYMMU8
1157 <tr><td>QASYMMS8
1158 <tr><td>QSYMMS16
1159 <tr><td>SIGNED32
1160 <tr><td>FLOAT16
1161 <tr><td>FLOAT32
1162 </table>
1163<tr>
1164 <td rowspan="3">ElementwiseUnaryLayer
1165 <td rowspan="3" style="width:200px;"> Layer to perform Rsqrt - Exp - Neg - Log - Abs - Sin - Sqrt operations.
1166 <td rowspan="3">
1167 <ul>
1168 <li>ANEURALNETWORKS_ABS
1169 <li>ANEURALNETWORKS_EXP
1170 <li>ANEURALNETWORKS_LOG
1171 <li>ANEURALNETWORKS_NEG
1172 <li>ANEURALNETWORKS_RSQRT
1173 <li>ANEURALNETWORKS_SIN
1174 <li>ANEURALNETWORKS_SQRT
1175 </ul>
1176 <td>CpuRef
1177 <td>
1178 <ul>
1179 <li>All
1180 </ul>
1181 <td>
1182 <table>
1183 <tr><th>
1184 <tr><td>BFLOAT16
1185 <tr><td>FLOAT16
1186 <tr><td>FLOAT32
1187 <tr><td>QASYMMS8
1188 <tr><td>QASYMMU8
1189 <tr><td>QSYMMS16
1190 </table>
1191<tr>
1192 <td>CpuAcc
1193 <td>
1194 <ul>
1195 <li>All
1196 </ul>
1197 <td>
1198 <table>
1199 <tr><th>
1200 <tr><td>FLOAT16
1201 <tr><td>FLOAT32
1202 <tr><td>SIGNED32
1203 </table>
1204<tr>
1205 <td>GpuAcc
1206 <td>
1207 <ul>
1208 <li>All
1209 </ul>
1210 <td>
1211 <table>
1212 <tr><th>
1213 <tr><td>FLOAT16
1214 <tr><td>FLOAT32
1215 </table>
1216<tr>
1217 <td rowspan="1">FakeQuantizationLayer
1218 <td rowspan="1" style="width:200px;"> Layer to quantize float values and dequantize afterwards. The current implementation does not dequantize the values.
1219 <td rowspan="1">
1220 <ul>
1221 <li>N/A
1222 </ul>
1223 <td>CpuRef
1224 <td>
1225 <ul>
1226 <li>All
1227 </ul>
1228 <td>
1229 <table>
1230 <tr><th>
1231 <tr><td>FLOAT32
1232 </table>
1233<tr>
1234 <td rowspan="3">FillLayer
1235 <td rowspan="3" style="width:200px;"> Layer to set the values of a tensor with a given value.
1236 <td rowspan="3">
1237 <ul>
1238 <li>ANEURALNETWORKS_FILL
1239 </ul>
1240 <td>CpuRef
1241 <td>
1242 <ul>
1243 <li>All
1244 </ul>
1245 <td>
1246 <table>
1247 <tr><th>
1248 <tr><td>FLOAT16
1249 <tr><td>FLOAT32
1250 <tr><td>SIGNED32
1251 </table>
1252<tr>
1253 <td>CpuAcc
1254 <td>
1255 <ul>
1256 <li>All
1257 </ul>
1258 <td>
1259 <table>
1260 <tr><th>
1261 <tr><td>All
1262 </table>
1263<tr>
1264 <td>GpuAcc
1265 <td>
1266 <ul>
1267 <li>All
1268 </ul>
1269 <td>
1270 <table>
1271 <tr><th>
1272 <tr><td>All
1273 </table>
1274<tr>
1275 <td rowspan="3">FloorLayer
1276 <td rowspan="3" style="width:200px;"> Layer to round the value to the lowest whole number.
1277 <td rowspan="3">
1278 <ul>
1279 <li>ANEURALNETWORKS_FLOOR
1280 </ul>
1281 <td>CpuRef
1282 <td>
1283 <ul>
1284 <li>All
1285 </ul>
1286 <td>
1287 <table>
1288 <tr><th>
1289 <tr><td>BFLOAT16
1290 <tr><td>FLOAT16
1291 <tr><td>FLOAT32
1292 </table>
1293<tr>
1294 <td>CpuAcc
1295 <td>
1296 <ul>
1297 <li>All
1298 </ul>
1299 <td>
1300 <table>
1301 <tr><th>
1302 <tr><td>FLOAT32
1303 <tr><td>FLOAT16
1304 </table>
1305<tr>
1306 <td>GpuAcc
1307 <td>
1308 <ul>
1309 <li>All
1310 </ul>
1311 <td>
1312 <table>
1313 <tr><th>
1314 <tr><td>FLOAT32
1315 <tr><td>FLOAT16
1316 </table>
1317<tr>
1318 <td rowspan="3">FullyConnectedLayer
1319 <td rowspan="3" style="width:200px;"> Layer to perform a fully connected / dense operation.
1320 <td rowspan="3">
1321 <ul>
1322 <li>ANEURALNETWORKS_FULLY_CONNECTED
1323 </ul>
1324 <td>CpuRef
1325 <td>
1326 <ul>
1327 <li>All
1328 </ul>
1329 <td>
1330 <table>
1331 <tr><th>
1332 <tr><td>BFLOAT16
1333 <tr><td>FLOAT16
1334 <tr><td>FLOAT32
1335 <tr><td>QASYMMS8
1336 <tr><td>QASYMMU8
1337 <tr><td>QSYMMS16
1338 </table>
1339<tr>
1340 <td>CpuAcc
1341 <td>
1342 <ul>
1343 <li>NHWC
1344 <li>NCHW
1345 </ul>
1346 <td>
1347 <table>
1348 <tr><th>
1349 <tr><td>SIGNED32
1350 <tr><td>FLOAT16
1351 <tr><td>FLOAT32
1352 <tr><td>QASYMMU8
1353 <tr><td>QASYMMS8
1354 </table>
1355<tr>
1356 <td>GpuAcc
1357 <td>
1358 <ul>
1359 <li>NHWC
1360 <li>NCHW
1361 </ul>
1362 <td>
1363 <table>
1364 <tr><th>
1365 <tr><td>SIGNED32
1366 <tr><td>FLOAT16
1367 <tr><td>FLOAT32
1368 <tr><td>QASYMMU8
1369 <tr><td>QASYMMS8
1370 </table>
1371<tr>
1372 <td rowspan="3">GatherLayer
1373 <td rowspan="3" style="width:200px;"> Layer to perform the gather operation along the chosen axis.
1374 <td rowspan="3">
1375 <ul>
1376 <li>ANEURALNETWORKS_GATHER
1377 </ul>
1378 <td>CpuRef
1379 <td>
1380 <ul>
1381 <li>All
1382 </ul>
1383 <td>
1384 <table>
1385 <tr><th>
1386 <tr><td>BFLOAT16
1387 <tr><td>FLOAT16
1388 <tr><td>FLOAT32
1389 <tr><td>QASYMMS8
1390 <tr><td>QASYMMU8
1391 <tr><td>QSYMMS16
1392 <tr><td>SIGNED32
1393 </table>
1394<tr>
1395 <td>CpuAcc
1396 <td>
1397 <ul>
1398 <li>All
1399 </ul>
1400 <td>
1401 <table>
1402 <tr><th>
1403 <tr><td>All
1404 </table>
1405<tr>
1406 <td>GpuAcc
1407 <td>
1408 <ul>
1409 <li>All
1410 </ul>
1411 <td>
1412 <table>
1413 <tr><th>
1414 <tr><td>All
1415 </table>
1416<tr>
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1417 <td rowspan="3">GatherNdLayer
1418 <td rowspan="3" style="width:200px;"> Layer to perform the gatherNd operation.
1419 <td rowspan="3">
1420 <ul>
1421 <li>N/A
1422 </ul>
1423 <td>CpuRef
1424 <td>
1425 <ul>
1426 <li>All
1427 </ul>
1428 <td>
1429 <table>
1430 <tr><th>
1431 <tr><td>BFLOAT16
1432 <tr><td>FLOAT16
1433 <tr><td>FLOAT32
1434 <tr><td>QASYMMS8
1435 <tr><td>QASYMMU8
1436 <tr><td>QSYMMS16
1437 <tr><td>SIGNED32
1438 </table>
1439<tr>
1440 <td>CpuAcc
1441 <td>
1442 <ul>
Teresa Charlinbd22c7d2022-04-26 18:14:12 +0100[diff] [blame]1443 <li>All
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1444 </ul>
1445 <td>
Teresa Charlinbd22c7d2022-04-26 18:14:12 +0100[diff] [blame]1446 <table>
1447 <tr><th>
1448 <tr><td>BFLOAT16
1449 <tr><td>FLOAT16
1450 <tr><td>FLOAT32
1451 <tr><td>QASYMMS8
1452 <tr><td>QASYMMU8
1453 <tr><td>QSYMMS16
1454 <tr><td>SIGNED32
1455 </table>
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1456<tr>
1457 <td>GpuAcc
1458 <td>
1459 <ul>
Teresa Charlin989e2f62022-04-27 16:26:11 +0100[diff] [blame]1460 <li>All
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1461 </ul>
1462 <td>
Teresa Charlin989e2f62022-04-27 16:26:11 +0100[diff] [blame]1463 <table>
1464 <tr><th>
1465 <tr><td>BFLOAT16
1466 <tr><td>FLOAT16
1467 <tr><td>FLOAT32
1468 <tr><td>QASYMMS8
1469 <tr><td>QASYMMU8
1470 <tr><td>QSYMMS16
1471 <tr><td>SIGNED32
1472 </table>
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1473<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]1474 <td rowspan="1">InputLayer
1475 <td rowspan="1" style="width:200px;"> Special layer used to provide input data to the computational network.
1476 <td rowspan="1">
1477 <ul>
1478 <li>N/A
1479 </ul>
1480 <td>All
1481 <td>
1482 <ul>
1483 <li>All
1484 </ul>
1485 <td>
1486 <table>
1487 <tr><th>
1488 <tr><td>All
1489 </table>
1490<tr>
1491 <td rowspan="3">InstanceNormalizationLayer
1492 <td rowspan="3" style="width:200px;"> Layer to perform an instance normalization on a given axis.
1493 <td rowspan="3">
1494 <ul>
1495 <li>ANEURALNETWORKS_INSTANCE_NORMALIZATION
1496 </ul>
1497 <td>CpuRef
1498 <td>
1499 <ul>
1500 <li>All
1501 </ul>
1502 <td>
1503 <table>
1504 <tr><th>
1505 <tr><td>BFLOAT16
1506 <tr><td>FLOAT16
1507 <tr><td>FLOAT32
1508 </table>
1509<tr>
1510 <td>CpuAcc
1511 <td>
1512 <ul>
1513 <li>NHWC
1514 <li>NCHW
1515 </ul>
1516 <td>
1517 <table>
1518 <tr><th>
1519 <tr><td>FLOAT16
1520 <tr><td>FLOAT32
1521 </table>
1522<tr>
1523 <td>GpuAcc
1524 <td>
1525 <ul>
1526 <li>NHWC
1527 <li>NCHW
1528 </ul>
1529 <td>
1530 <table>
1531 <tr><th>
1532 <tr><td>FLOAT16
1533 <tr><td>FLOAT32
1534 </table>
1535<tr>
1536 <td rowspan="3">L2NormalizationLayer
1537 <td rowspan="3" style="width:200px;"> Layer to perform an L2 normalization on a given axis.
1538 <td rowspan="3">
1539 <ul>
1540 <li>ANEURALNETWORKS_L2_NORMALIZATION
1541 </ul>
1542 <td>CpuRef
1543 <td>
1544 <ul>
1545 <li>All
1546 </ul>
1547 <td>
1548 <table>
1549 <tr><th>
1550 <tr><td>BFLOAT16
1551 <tr><td>FLOAT16
1552 <tr><td>FLOAT32
1553 <tr><td>QASYMMS8
1554 <tr><td>QASYMMU8
1555 <tr><td>QSYMMS16
1556 </table>
1557<tr>
1558 <td>CpuAcc
1559 <td>
1560 <ul>
1561 <li>NHWC
1562 <li>NCHW
1563 </ul>
1564 <td>
1565 <table>
1566 <tr><th>
1567 <tr><td>FLOAT16
1568 <tr><td>FLOAT32
1569 </table>
1570<tr>
1571 <td>GpuAcc
1572 <td>
1573 <ul>
1574 <li>NHWC
1575 <li>NCHW
1576 </ul>
1577 <td>
1578 <table>
1579 <tr><th>
1580 <tr><td>FLOAT16
1581 <tr><td>FLOAT32
1582 </table>
1583<tr>
1584 <td rowspan="3">LogSoftmaxLayer
1585 <td rowspan="3" style="width:200px;"> Layer to perform the log softmax activations given logits.
1586 <td rowspan="3">
1587 <ul>
1588 <li>N/A
1589 </ul>
1590 <td>CpuRef
1591 <td>
1592 <ul>
1593 <li>All
1594 </ul>
1595 <td>
1596 <table>
1597 <tr><th>
1598 <tr><td>BFLOAT16
1599 <tr><td>FLOAT16
1600 <tr><td>FLOAT32
1601 </table>
1602<tr>
1603 <td>CpuAcc
1604 <td>
1605 <ul>
1606 <li>All
1607 </ul>
1608 <td>
1609 <table>
1610 <tr><th>
1611 <tr><td>QASYMMU8
1612 <tr><td>QASYMMS8
1613 <tr><td>FLOAT16
1614 <tr><td>FLOAT32
1615 </table>
1616<tr>
1617 <td>GpuAcc
1618 <td>
1619 <ul>
1620 <li>All
1621 </ul>
1622 <td>
1623 <table>
1624 <tr><th>
1625 <tr><td>QASYMMU8
1626 <tr><td>QASYMMS8
1627 <tr><td>FLOAT16
1628 <tr><td>FLOAT32
1629 </table>
1630<tr>
1631 <td rowspan="3">LogicalBinaryLayer
1632 <td rowspan="3" style="width:200px;"> Layer to perform Logical AND - Logical NOT - Logical OR operations.
1633 <td rowspan="3">
1634 <ul>
1635 <li>ANEURALNETWORKS_LOGICAL_AND
1636 <li>ANEURALNETWORKS_LOGICAL_NOT
1637 <li>ANEURALNETWORKS_LOGICAL_OR
1638 </ul>
1639 <td>CpuRef
1640 <td>
1641 <ul>
1642 <li>All
1643 </ul>
1644 <td>
1645 <table>
1646 <tr><th>
1647 <tr><td>BOOLEAN
1648 </table>
1649<tr>
1650 <td>CpuAcc
1651 <td>
1652 <ul>
1653 <li>All
1654 </ul>
1655 <td>
1656 <table>
1657 <tr><th>
1658 <tr><td>BOOLEAN
1659 </table>
1660<tr>
1661 <td>GpuAcc
1662 <td>
1663 <ul>
1664 <li>All
1665 </ul>
1666 <td>
1667 <table>
1668 <tr><th>
1669 <tr><td>BOOLEAN
1670 </table>
1671<tr>
1672 <td rowspan="3">LstmLayer
1673 <td rowspan="3" style="width:200px;"> Layer to perform a single time step in a Long Short-Term Memory (LSTM) operation.
1674 <td rowspan="3">
1675 <ul>
1676 <li>ANEURALNETWORKS_LSTM
1677 </ul>
1678 <td>CpuRef
1679 <td>
1680 <ul>
1681 <li>All
1682 </ul>
1683 <td>
1684 <table>
1685 <tr><th>
1686 <tr><td>BFLOAT16
1687 <tr><td>FLOAT16
1688 <tr><td>QSYMMS16
1689 </table>
1690<tr>
1691 <td>CpuAcc
1692 <td>
1693 <ul>
1694 <li>All
1695 </ul>
1696 <td>
1697 <table>
1698 <tr><th>
1699 <tr><td>FLOAT16
1700 <tr><td>FLOAT32
1701 </table>
1702<tr>
1703 <td>GpuAcc
1704 <td>
1705 <ul>
1706 <li>All
1707 </ul>
1708 <td>
1709 <table>
1710 <tr><th>
1711 <tr><td>FLOAT16
1712 <tr><td>FLOAT32
1713 </table>
1714<tr>
1715 <td rowspan="3">MapLayer
1716 <td rowspan="3" style="width:200px;"> Layer to perform map operation on tensor.
1717 <td rowspan="3">
1718 <ul>
1719 <li>N/A
1720 </ul>
1721 <td>CpuRef
1722 <td>
1723 <ul>
1724 <li>All
1725 </ul>
1726 <td>
1727 <table>
1728 <tr><th>
1729 <tr><td>All
1730 </table>
1731<tr>
1732 <td>CpuAcc
1733 <td>
1734 <ul>
1735 <li>All
1736 </ul>
1737 <td>
1738 <table>
1739 <tr><th>
1740 <tr><td>All
1741 </table>
1742<tr>
1743 <td>GpuAcc
1744 <td>
1745 <ul>
1746 <li>All
1747 </ul>
1748 <td>
1749 <table>
1750 <tr><th>
1751 <tr><td>All
1752 </table>
1753<tr>
1754 <td rowspan="3">MaximumLayer
1755 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise maximum of two tensors.
1756 <td rowspan="3">
1757 <ul>
1758 <li>N/A
1759 </ul>
1760 <td>CpuRef
1761 <td>
1762 <ul>
1763 <li>All
1764 </ul>
1765 <td>
1766 <table>
1767 <tr><th>
1768 <tr><td>BFLOAT16
1769 <tr><td>FLOAT16
1770 <tr><td>FLOAT32
1771 <tr><td>QASYMMS8
1772 <tr><td>QASYMMU8
1773 <tr><td>QSYMMS16
1774 <tr><td>SIGNED32
1775 </table>
1776<tr>
1777 <td>CpuAcc
1778 <td>
1779 <ul>
1780 <li>All
1781 </ul>
1782 <td>
1783 <table>
1784 <tr><th>
1785 <tr><td>QASYMMU8
1786 <tr><td>QASYMMS8
1787 <tr><td>FLOAT16
1788 <tr><td>FLOAT32
1789 <tr><td>SIGNED32
1790 </table>
1791<tr>
1792 <td>GpuAcc
1793 <td>
1794 <ul>
1795 <li>All
1796 </ul>
1797 <td>
1798 <table>
1799 <tr><th>
1800 <tr><td>QASYMMU8
1801 <tr><td>QASYMMS8
1802 <tr><td>QSYMMS16
1803 <tr><td>FLOAT16
1804 <tr><td>FLOAT32
1805 <tr><td>SIGNED32
1806 </table>
1807<tr>
1808 <td rowspan="3">MeanLayer
1809 <td rowspan="3" style="width:200px;"> Layer to perform reduce mean operation.
1810 <td rowspan="3">
1811 <ul>
1812 <li>ANEURALNETWORKS_MEAN
1813 </ul>
1814 <td>CpuRef
1815 <td>
1816 <ul>
1817 <li>All
1818 </ul>
1819 <td>
1820 <table>
1821 <tr><th>
1822 <tr><td>BFLOAT16
1823 <tr><td>FLOAT16
1824 <tr><td>FLOAT32
1825 <tr><td>QASYMMS8
1826 <tr><td>QASYMMU8
1827 <tr><td>QSYMMS16
1828 </table>
1829<tr>
1830 <td>CpuAcc
1831 <td>
1832 <ul>
1833 <li>All
1834 </ul>
1835 <td>
1836 <table>
1837 <tr><th>
1838 <tr><td>QASYMMU8
1839 <tr><td>QASYMMS8
1840 <tr><td>FLOAT16
1841 <tr><td>FLOAT32
1842 </table>
1843<tr>
1844 <td>GpuAcc
1845 <td>
1846 <ul>
1847 <li>All
1848 </ul>
1849 <td>
1850 <table>
1851 <tr><th>
1852 <tr><td>QASYMMU8
1853 <tr><td>QASYMMS8
1854 <tr><td>FLOAT16
1855 <tr><td>FLOAT32
1856 </table>
1857<tr>
1858 <td rowspan="3">MemCopyLayer
1859 <td rowspan="3" style="width:200px;"> Layer to perform memory copy operation.
1860 <td rowspan="3">
1861 <ul>
1862 <li>N/A
1863 </ul>
1864 <td>CpuRef
1865 <td>
1866 <ul>
1867 <li>All
1868 </ul>
1869 <td>
1870 <table>
1871 <tr><th>
1872 <tr><td>BFLOAT16
1873 <tr><td>FLOAT16
1874 <tr><td>FLOAT32
1875 <tr><td>QASYMMS8
1876 <tr><td>QASYMMU8
1877 <tr><td>QSYMMS16
1878 <tr><td>BOOLEAN
1879 </table>
1880<tr>
1881 <td>CpuAcc
1882 <td>
1883 <ul>
1884 <li>All
1885 </ul>
1886 <td>
1887 <table>
1888 <tr><th>
1889 <tr><td>All
1890 </table>
1891<tr>
1892 <td>GpuAcc
1893 <td>
1894 <ul>
1895 <li>All
1896 </ul>
1897 <td>
1898 <table>
1899 <tr><th>
1900 <tr><td>All
1901 </table>
1902<tr>
1903 <td rowspan="3">MemImportLayer
1904 <td rowspan="3" style="width:200px;"> Layer to perform memory import operation.
1905 <td rowspan="3">
1906 <ul>
1907 <li>N/A
1908 </ul>
1909 <td>CpuRef
1910 <td>
1911 <ul>
1912 <li>All
1913 </ul>
1914 <td>
1915 <table>
1916 <tr><th>
1917 <tr><td>All
1918 </table>
1919<tr>
1920 <td>CpuAcc
1921 <td>
1922 <ul>
1923 <li>All
1924 </ul>
1925 <td>
1926 <table>
1927 <tr><th>
1928 <tr><td>All
1929 </table>
1930<tr>
1931 <td>GpuAcc
1932 <td>
1933 <ul>
1934 <li>All
1935 </ul>
1936 <td>
1937 <table>
1938 <tr><th>
1939 <tr><td>All
1940 </table>
1941<tr>
1942 <td rowspan="3">MergeLayer
1943 <td rowspan="3" style="width:200px;"> Layer to concatenate tensors along a given axis.
1944 <td rowspan="3">
1945 <ul>
1946 <li>ANEURALNETWORKS_CONCATENATION
1947 </ul>
1948 <td>CpuRef
1949 <td>
1950 <ul>
1951 <li>All
1952 </ul>
1953 <td>
1954 <table>
1955 <tr><th>
1956 <tr><td>BFLOAT16
1957 <tr><td>FLOAT16
1958 <tr><td>FLOAT32
1959 <tr><td>QASYMMS8
1960 <tr><td>QASYMMU8
1961 <tr><td>QSYMMS16
1962 </table>
1963<tr>
1964 <td>CpuAcc
1965 <td>
1966 <ul>
1967 <li>All
1968 </ul>
1969 <td>
1970 <table>
1971 <tr><th>
1972 <tr><td>QASYMMU8
1973 <tr><td>QASYMMS8
1974 <tr><td>FLOAT16
1975 <tr><td>FLOAT32
1976 </table>
1977<tr>
1978 <td>GpuAcc
1979 <td>
1980 <ul>
1981 <li>All
1982 </ul>
1983 <td>
1984 <table>
1985 <tr><th>
1986 <tr><td>QASYMMU8
1987 <tr><td>QASYMMS8
1988 <tr><td>FLOAT16
1989 <tr><td>FLOAT32
1990 </table>
1991<tr>
1992 <td rowspan="3">MinimumLayer
1993 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise minimum of two tensors.
1994 <td rowspan="3">
1995 <ul>
1996 <li>ANEURALNETWORKS_MINIMUM
1997 </ul>
1998 <td>CpuRef
1999 <td>
2000 <ul>
2001 <li>All
2002 </ul>
2003 <td>
2004 <table>
2005 <tr><th>
2006 <tr><td>BFLOAT16
2007 <tr><td>FLOAT16
2008 <tr><td>FLOAT32
2009 <tr><td>QASYMMS8
2010 <tr><td>QASYMMU8
2011 <tr><td>QSYMMS16
2012 <tr><td>SIGNED32
2013 </table>
2014<tr>
2015 <td>CpuAcc
2016 <td>
2017 <ul>
2018 <li>All
2019 </ul>
2020 <td>
2021 <table>
2022 <tr><th>
2023 <tr><td>QASYMMU8
2024 <tr><td>QASYMMS8
2025 <tr><td>QSYMMS16
2026 <tr><td>FLOAT16
2027 <tr><td>FLOAT32
2028 </table>
2029<tr>
2030 <td>GpuAcc
2031 <td>
2032 <ul>
2033 <li>All
2034 </ul>
2035 <td>
2036 <table>
2037 <tr><th>
2038 <tr><td>QASYMMU8
2039 <tr><td>QASYMMS8
2040 <tr><td>QSYMMS16
2041 <tr><td>FLOAT16
2042 <tr><td>FLOAT32
2043 <tr><td>SIGNED32
2044 </table>
2045<tr>
2046 <td rowspan="3">MultiplicationLayer
2047 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise multiplication of two tensors.
2048 <td rowspan="3">
2049 <ul>
2050 <li>ANEURALNETWORKS_MUL
2051 </ul>
2052 <td>CpuRef
2053 <td>
2054 <ul>
2055 <li>All
2056 </ul>
2057 <td>
2058 <table>
2059 <tr><th>
2060 <tr><td>BFLOAT16
2061 <tr><td>FLOAT16
2062 <tr><td>FLOAT32
2063 <tr><td>QASYMMS8
2064 <tr><td>QASYMMU8
2065 <tr><td>QSYMMS16
2066 <tr><td>SIGNED32
2067 </table>
2068<tr>
2069 <td>CpuAcc
2070 <td>
2071 <ul>
2072 <li>All
2073 </ul>
2074 <td>
2075 <table>
2076 <tr><th>
2077 <tr><td>QASYMMU8
2078 <tr><td>QASYMMS8
2079 <tr><td>QSYMMS16
2080 <tr><td>SIGNED32
2081 <tr><td>FLOAT16
2082 <tr><td>FLOAT32
2083 </table>
2084<tr>
2085 <td>GpuAcc
2086 <td>
2087 <ul>
2088 <li>All
2089 </ul>
2090 <td>
2091 <table>
2092 <tr><th>
2093 <tr><td>QASYMMU8
2094 <tr><td>QASYMMS8
2095 <tr><td>QSYMMS16
2096 <tr><td>SIGNED32
2097 <tr><td>FLOAT16
2098 <tr><td>FLOAT32
2099 <tr><td>SIGNED32
2100 </table>
2101<tr>
2102 <td rowspan="3">NormalizationLayer
2103 <td rowspan="3" style="width:200px;"> Layer to compute normalization operation.
2104 <td rowspan="3">
2105 <ul>
2106 <li>ANEURALNETWORKS_LOCAL_RESPONSE_NORMALIZATION
2107 </ul>
2108 <td>CpuRef
2109 <td>
2110 <ul>
2111 <li>All
2112 </ul>
2113 <td>
2114 <table>
2115 <tr><th>
2116 <tr><td>BFLOAT16
2117 <tr><td>FLOAT16
2118 <tr><td>FLOAT32
2119 <tr><td>QASYMMS8
2120 <tr><td>QASYMMU8
2121 <tr><td>QSYMMS16
2122 </table>
2123<tr>
2124 <td>CpuAcc
2125 <td>
2126 <ul>
2127 <li>NHWC
2128 <li>NCHW
2129 </ul>
2130 <td>
2131 <table>
2132 <tr><th>
2133 <tr><td>FLOAT32
2134 <tr><td>FLOAT16
2135 </table>
2136<tr>
2137 <td>GpuAcc
2138 <td>
2139 <ul>
2140 <li>NHWC
2141 <li>NCHW
2142 </ul>
2143 <td>
2144 <table>
2145 <tr><th>
2146 <tr><td>FLOAT32
2147 <tr><td>FLOAT16
2148 </table>
2149<tr>
2150 <td rowspan="1">OutputLayer
2151 <td rowspan="1" style="width:200px;"> A special layer providing access to a user supplied buffer into which the output of a network can be written.
2152 <td rowspan="1">
2153 <ul>
2154 <li>N/A
2155 </ul>
2156 <td>All
2157 <td>
2158 <ul>
2159 <li>All
2160 </ul>
2161 <td>
2162 <table>
2163 <tr><th>
2164 <tr><td>All
2165 </table>
2166<tr>
2167 <td rowspan="3">PadLayer
2168 <td rowspan="3" style="width:200px;"> Layer to pad a tensor.
2169 <td rowspan="3">
2170 <ul>
2171 <li>ANEURALNETWORKS_PAD
2172 <li>ANEURALNETWORKS_PAD_V2
2173 </ul>
2174 <td>CpuRef
2175 <td>
2176 <ul>
2177 <li>All
2178 </ul>
2179 <td>
2180 <table>
2181 <tr><th>
2182 <tr><td>BFLOAT16
2183 <tr><td>FLOAT16
2184 <tr><td>FLOAT32
2185 <tr><td>QASYMMS8
2186 <tr><td>QASYMMU8
2187 <tr><td>QSYMMS16
2188 </table>
2189<tr>
2190 <td>CpuAcc
2191 <td>
2192 <ul>
2193 <li>NHWC
2194 <li>NCHW
2195 </ul>
2196 <td>
2197 <table>
2198 <tr><th>
2199 <tr><td>All
2200 </table>
2201<tr>
2202 <td>GpuAcc
2203 <td>
2204 <ul>
2205 <li>NHWC
2206 <li>NCHW
2207 </ul>
2208 <td>
2209 <table>
2210 <tr><th>
2211 <tr><td>All
2212 </table>
2213<tr>
2214 <td rowspan="3">PermuteLayer
2215 <td rowspan="3" style="width:200px;"> Layer to transpose an ND tensor.
2216 <td rowspan="3">
2217 <ul>
2218 <li>ANEURALNETWORKS_TRANSPOSE
2219 </ul>
2220 <td>CpuRef
2221 <td>
2222 <ul>
2223 <li>All
2224 </ul>
2225 <td>
2226 <table>
2227 <tr><th>
2228 <tr><td>BFLOAT16
2229 <tr><td>FLOAT16
2230 <tr><td>FLOAT32
2231 <tr><td>QASYMMS8
2232 <tr><td>QASYMMU8
2233 <tr><td>QSYMMS16
2234 </table>
2235<tr>
2236 <td>CpuAcc
2237 <td>
2238 <ul>
2239 <li>NHWC
2240 <li>NCHW
2241 </ul>
2242 <td>
2243 <table>
2244 <tr><th>
2245 <tr><td>All
2246 </table>
2247<tr>
2248 <td>GpuAcc
2249 <td>
2250 <ul>
2251 <li>NHWC
2252 <li>NCHW
2253 </ul>
2254 <td>
2255 <table>
2256 <tr><th>
2257 <tr><td>All
2258 </table>
2259<tr>
2260 <td rowspan="3">Pooling2dLayer
Tamás Nyíri7b885b32021-10-26 14:47:57 +0100[diff] [blame]2261 <td rowspan="3" style="width:200px;"> Layer to perform 2D pooling with the specified pooling operation.
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2262 <td rowspan="3">
2263 <ul>
2264 <li>ANEURALNETWORKS_AVERAGE_POOL_2D
2265 <li>ANEURALNETWORKS_L2_POOL_2D
2266 <li>ANEURALNETWORKS_MAX_POOL_2D
2267 </ul>
2268 <td>CpuRef
2269 <td>
2270 <ul>
2271 <li>All
2272 </ul>
2273 <td>
2274 <table>
2275 <tr><th>
2276 <tr><td>BFLOAT16
2277 <tr><td>FLOAT16
2278 <tr><td>FLOAT32
2279 <tr><td>QASYMMS8
2280 <tr><td>QASYMMU8
2281 <tr><td>QSYMMS16
2282 </table>
2283<tr>
2284 <td>CpuAcc
2285 <td>
2286 <ul>
2287 <li>NHWC
2288 <li>NCHW
2289 </ul>
2290 <td>
2291 <table>
2292 <tr><th>
2293 <tr><td>QASYMMU8
2294 <tr><td>QASYMMS8
2295 <tr><td>FLOAT16
2296 <tr><td>FLOAT32
2297 </table>
2298<tr>
2299 <td>GpuAcc
2300 <td>
2301 <ul>
2302 <li>NHWC
2303 <li>NCHW
2304 </ul>
2305 <td>
2306 <table>
2307 <tr><th>
2308 <tr><td>QASYMMU8
2309 <tr><td>QASYMMS8
2310 <tr><td>FLOAT16
2311 <tr><td>FLOAT32
2312 </table>
2313<tr>
Tamás Nyíri7b885b32021-10-26 14:47:57 +0100[diff] [blame]2314 <td rowspan="3">Pooling3dLayer
2315 <td rowspan="3" style="width:200px;"> Layer to perform 3D pooling with the specified pooling operation.
2316 <td rowspan="3">
2317 <ul>
2318 <li>ANEURALNETWORKS_AVERAGE_POOL_3D
2319 <li>ANEURALNETWORKS_L2_POOL_3D
2320 <li>ANEURALNETWORKS_MAX_POOL_3D
2321 </ul>
2322 <td>CpuRef
2323 <td>
2324 <ul>
2325 <li>NDHWC
2326 </ul>
2327 <td>
2328 <table>
2329 <tr><th>
2330 <tr><td>BFLOAT16
2331 <tr><td>FLOAT16
2332 <tr><td>FLOAT32
2333 <tr><td>QASYMMS8
2334 <tr><td>QASYMMU8
2335 <tr><td>QSYMMS16
2336 </table>
2337<tr>
2338 <td>CpuAcc
2339 <td>
2340 <ul>
2341 <li>NA
2342 </ul>
2343 <td>
2344<tr>
2345 <td>GpuAcc
2346 <td>
2347 <ul>
2348 <li>NDHWC
2349 </ul>
2350<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2351 <td rowspan="1">PreCompiledLayer
2352 <td rowspan="1" style="width:200px;"> Opaque layer provided by a backend which provides an executable representation of a subgraph from the original network.
2353 <td rowspan="1">
2354 <ul>
2355 <li>N/A
2356 </ul>
2357 <td>N/A
2358 <td>N/A
2359 <td>N/A
2360<tr>
2361 <td rowspan="3">PreluLayer
2362 <td rowspan="3" style="width:200px;"> Layer to compute the activation layer with the PRELU activation function.
2363 <td rowspan="3">
2364 <ul>
2365 <li>ANEURALNETWORKS_PRELU
2366 </ul>
2367 <td>CpuRef
2368 <td>
2369 <ul>
2370 <li>All
2371 </ul>
2372 <td>
2373 <table>
2374 <tr><th>
2375 <tr><td>BFLOAT16
2376 <tr><td>FLOAT16
2377 <tr><td>FLOAT32
2378 <tr><td>QASYMMS8
2379 <tr><td>QASYMMU8
2380 <tr><td>QSYMMS16
2381 </table>
2382<tr>
2383 <td>CpuAcc
2384 <td>
2385 <ul>
2386 <li>All
2387 </ul>
2388 <td>
2389 <table>
2390 <tr><th>
2391 <tr><td>QASYMMU8
2392 <tr><td>QASYMMS8
2393 <tr><td>FLOAT16
2394 <tr><td>FLOAT32
2395 </table>
2396<tr>
2397 <td>GpuAcc
2398 <td>
2399 <ul>
2400 <li>All
2401 </ul>
2402 <td>
2403 <table>
2404 <tr><th>
2405 <tr><td>QASYMMU8
2406 <tr><td>QASYMMS8
2407 <tr><td>FLOAT16
2408 <tr><td>FLOAT32
2409 </table>
2410<tr>
2411 <td rowspan="3">QLstmLayer
2412 <td rowspan="3" style="width:200px;"> Layer to perform quantized LSTM (Long Short-Term Memory) operation.
2413 <td rowspan="3">
2414 <ul>
2415 <li>ANEURALNETWORKS_QUANTIZED_LSTM
2416 <li>ANEURALNETWORKS_QUANTIZED_16BIT_LSTM
2417 </ul>
2418 <td>CpuRef
2419 <td>
2420 <ul>
2421 <li>All
2422 </ul>
2423 <td>
2424 <table>
2425 <tr><th>
2426 <tr><td>All
2427 </table>
2428<tr>
2429 <td>CpuAcc
2430 <td>
2431 <ul>
2432 <li>All
2433 </ul>
2434 <td>
2435 <table>
2436 <tr><th>
2437 <tr><td>QASYMMS8
2438 <tr><td>QASYMMU8
2439 <tr><td>SIGNED32
2440 <tr><td>QSYMMS16
2441 </table>
2442<tr>
2443 <td>GpuAcc
2444 <td>
2445 <ul>
2446 <li>All
2447 </ul>
2448 <td>
2449 <table>
2450 <tr><th>
2451 <tr><td>QASYMMS8
2452 <tr><td>QASYMMU8
2453 <tr><td>SIGNED32
2454 <tr><td>QSYMMS16
2455 </table>
2456<tr>
2457 <td rowspan="3">QuantizeLayer
2458 <td rowspan="3" style="width:200px;"> Layer to perform quantization operation.
2459 <td rowspan="3">
2460 <ul>
2461 <li>ANEURALNETWORKS_QUANTIZE
2462 </ul>
2463 <td>CpuRef
2464 <td>
2465 <ul>
2466 <li>All
2467 </ul>
2468 <td>
2469 <table>
2470 <tr><th>
2471 <tr><td>BFLOAT16
2472 <tr><td>FLOAT16
2473 <tr><td>FLOAT32
2474 <tr><td>QASYMMS8
2475 <tr><td>QASYMMU8
2476 <tr><td>QSYMMS8
2477 <tr><td>QSYMMS16
2478 </table>
2479<tr>
2480 <td>CpuAcc
2481 <td>
2482 <ul>
2483 <li>All
2484 </ul>
2485 <td>
2486 <table>
2487 <tr><th>
2488 <tr><td>QASYMMU8
2489 <tr><td>QASYMMS8
2490 <tr><td>QASYMM16
2491 <tr><td>FLOAT16
2492 <tr><td>FLOAT32
2493 </table>
2494<tr>
2495 <td>GpuAcc
2496 <td>
2497 <ul>
2498 <li>All
2499 </ul>
2500 <td>
2501 <table>
2502 <tr><th>
2503 <tr><td>QASYMMU8
2504 <tr><td>QASYMMS8
2505 <tr><td>QASYMM16
2506 <tr><td>FLOAT16
2507 <tr><td>FLOAT32
2508 </table>
2509<tr>
2510 <td rowspan="3">QuantizedLstmLayer
2511 <td rowspan="3" style="width:200px;"> Layer to perform quantized LSTM (Long Short-Term Memory) operation.
2512 <td rowspan="3">
2513 <ul>
2514 <li>ANEURALNETWORKS_QUANTIZED_LSTM
2515 <li>ANEURALNETWORKS_QUANTIZED_16BIT_LSTM
2516 </ul>
2517 <td>CpuRef
2518 <td>
2519 <ul>
2520 <li>All
2521 </ul>
2522 <td>
2523 <table>
2524 <tr><th>
2525 <tr><td>All
2526 </table>
2527<tr>
2528 <td>CpuAcc
2529 <td>
2530 <ul>
2531 <li>All
2532 </ul>
2533 <td>
2534 <table>
2535 <tr><th>
2536 <tr><td>SIGNED32
2537 <tr><td>QASYMMU8
2538 <tr><td>QSYMMS16
2539 </table>
2540<tr>
2541 <td>GpuAcc
2542 <td>
2543 <ul>
2544 <li>All
2545 </ul>
2546 <td>
2547 <table>
2548 <tr><th>
2549 <tr><td>SIGNED32
2550 <tr><td>QASYMMU8
2551 <tr><td>QSYMMS16
2552 </table>
2553<tr>
2554 <td rowspan="3">RankLayer
2555 <td rowspan="3" style="width:200px;"> Layer to perform a rank operation.
2556 <td rowspan="3">
2557 <ul>
2558 <li>ANEURALNETWORKS_RANK
2559 </ul>
2560 <td>CpuRef
2561 <td>
2562 <ul>
2563 <li>All
2564 </ul>
2565 <td>
2566 <table>
2567 <tr><th>
2568 <tr><td>All
2569 </table>
2570<tr>
2571 <td>CpuAcc
2572 <td>
2573 <ul>
2574 <li>All
2575 </ul>
2576 <td>
2577 <table>
2578 <tr><th>
2579 <tr><td>All
2580 </table>
2581<tr>
2582 <td>GpuAcc
2583 <td>
2584 <ul>
2585 <li>All
2586 </ul>
2587 <td>
2588 <table>
2589 <tr><th>
2590 <tr><td>All
2591 </table>
2592<tr>
2593 <td rowspan="3">ReduceLayer
2594 <td rowspan="3" style="width:200px;"> Layer to perform reduce with the following operations - ARG_IDX_MAX: Index of the max value - ARG_IDX_MIN: Index of the min value - MEAN_SUM: Mean of sum - PROD: Product - SUM_SQUARE: Sum of squares - SUM: Sum - MIN: Min - MAX: Max
2595 <td rowspan="3">
2596 <ul>
2597 <li>ANEURALNETWORKS_REDUCE_MAX
2598 <li>ANEURALNETWORKS_REDUCE_MIN
2599 <li>ANEURALNETWORKS_REDUCE_SUM
Teresa Charlin32b78702021-09-03 11:25:54 +0100[diff] [blame]2600 <li>ANEURALNETWORKS_REDUCE_PROD
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2601 </ul>
2602 <td>CpuRef
2603 <td>
2604 <ul>
2605 <li>All
2606 </ul>
2607 <td>
2608 <table>
2609 <tr><th>
2610 <tr><td>BFLOAT16
2611 <tr><td>FLOAT16
2612 <tr><td>FLOAT32
2613 <tr><td>QASYMMS8
2614 <tr><td>QASYMMU8
2615 <tr><td>QSYMMS16
2616 <tr><td>SIGNED32
2617 </table>
2618<tr>
2619 <td>CpuAcc
2620 <td>
2621 <ul>
2622 <li>All
2623 </ul>
2624 <td>
2625 <table>
2626 <tr><th>
2627 <tr><td>QASYMMU8
2628 <tr><td>QASYMMS8
2629 <tr><td>FLOAT16
2630 <tr><td>FLOAT32
2631 <tr><td>SIGNED32
2632 </table>
2633<tr>
2634 <td>GpuAcc
2635 <td>
2636 <ul>
2637 <li>All
2638 </ul>
2639 <td>
2640 <table>
2641 <tr><th>
2642 <tr><td>QASYMMU8
2643 <tr><td>QASYMMS8
2644 <tr><td>FLOAT16
2645 <tr><td>FLOAT32
2646 <tr><td>SIGNED32
2647 </table>
2648<tr>
2649 <td rowspan="3">ReshapeLayer
2650 <td rowspan="3" style="width:200px;"> Layer to reshape a tensor.
2651 <td rowspan="3">
2652 <ul>
2653 <li>ANEURALNETWORKS_RESHAPE
2654 <li>ANEURALNETWORKS_SQUEEZE
2655 <li>ANEURALNETWORKS_EXPAND_DIMS
2656 </ul>
2657 <td>CpuRef
2658 <td>
2659 <ul>
2660 <li>All
2661 </ul>
2662 <td>
2663 <table>
2664 <tr><th>
2665 <tr><td>BFLOAT16
2666 <tr><td>FLOAT16
2667 <tr><td>FLOAT32
2668 <tr><td>QASYMMS8
2669 <tr><td>QASYMMU8
2670 <tr><td>QSYMMS16
2671 <tr><td>SIGNED32
2672 <tr><td>BOOLEAN
2673 </table>
2674<tr>
2675 <td>CpuAcc
2676 <td>
2677 <ul>
2678 <li>All
2679 </ul>
2680 <td>
2681 <table>
2682 <tr><th>
2683 <tr><td>All
2684 </table>
2685<tr>
2686 <td>GpuAcc
2687 <td>
2688 <ul>
2689 <li>All
2690 </ul>
2691 <td>
2692 <table>
2693 <tr><th>
2694 <tr><td>All
2695 </table>
2696<tr>
2697 <td rowspan="3">ResizeLayer
2698 <td rowspan="3" style="width:200px;"> Layer to perform resize of a tensor using one of the interpolation methods: - Bilinear - Nearest Neighbor.
2699 <td rowspan="3">
2700 <ul>
2701 <li>ANEURALNETWORKS_RESIZE_BILINEAR
2702 <li>ANEURALNETWORKS_RESIZE_NEAREST_NEIGHBOR
2703 </ul>
2704 <td>CpuRef
2705 <td>
2706 <ul>
2707 <li>All
2708 </ul>
2709 <td>
2710 <table>
2711 <tr><th>
2712 <tr><td>BFLOAT16
2713 <tr><td>FLOAT16
2714 <tr><td>FLOAT32
2715 <tr><td>QASYMMS8
2716 <tr><td>QASYMMU8
2717 <tr><td>QSYMMS16
2718 </table>
2719<tr>
2720 <td>CpuAcc
2721 <td>
2722 <ul>
2723 <li>NHWC
2724 <li>NCHW
2725 </ul>
2726 <td>
2727 <table>
2728 <tr><th>
2729 <tr><td>QASYMMU8
2730 <tr><td>QASYMMS8
2731 <tr><td>FLOAT16
2732 <tr><td>FLOAT32
2733 </table>
2734<tr>
2735 <td>GpuAcc
2736 <td>
2737 <ul>
2738 <li>NHWC
2739 <li>NCHW
2740 </ul>
2741 <td>
2742 <table>
2743 <tr><th>
2744 <tr><td>QASYMMU8
2745 <tr><td>QASYMMS8
2746 <tr><td>FLOAT16
2747 <tr><td>FLOAT32
2748 </table>
2749<tr>
2750 <td rowspan="3">RsqrtLayer
2751 <td rowspan="3" style="width:200px;"> Layer to perform Rsqrt operation.
2752 <td rowspan="3">
2753 <ul>
2754 <li>ANEURALNETWORKS_RSQRT
2755 </ul>
2756 <td>CpuRef
2757 <td>
2758 <ul>
2759 <li>All
2760 </ul>
2761 <td>
2762 <table>
2763 <tr><th>
2764 <tr><td>BFLOAT16
2765 <tr><td>FLOAT16
2766 <tr><td>FLOAT32
2767 <tr><td>QASYMMS8
2768 <tr><td>QASYMMU8
2769 <tr><td>QSYMMS16
2770 <tr><td>SIGNED32
2771 </table>
2772<tr>
2773 <td>CpuAcc
2774 <td>
2775 <ul>
2776 <li>All
2777 </ul>
2778 <td>
2779 <table>
2780 <tr><th>
2781 <tr><td>FLOAT16
2782 <tr><td>FLOAT32
2783 <tr><td>SIGNED32
2784 </table>
2785<tr>
2786 <td>GpuAcc
2787 <td>
2788 <ul>
2789 <li>All
2790 </ul>
2791 <td>
2792 <table>
2793 <tr><th>
2794 <tr><td>FLOAT16
2795 <tr><td>FLOAT32
2796 </table>
2797<tr>
2798 <td rowspan="3">ShapeLayer
2799 <td rowspan="3" style="width:200px;"> Layer to return the shape of the input tensor.
2800 <td rowspan="3">
2801 <ul>
2802 <li>N/A
2803 </ul>
2804 <td>CpuRef
2805 <td>
2806 <ul>
2807 <li>All
2808 </ul>
2809 <td>
2810 <table>
2811 <tr><th>
2812 <tr><td>All
2813 </table>
2814<tr>
2815 <td>CpuAcc
2816 <td>
2817 <ul>
2818 <li>All
2819 </ul>
2820 <td>
2821 <table>
2822 <tr><th>
2823 <tr><td>All
2824 </table>
2825<tr>
2826 <td>GpuAcc
2827 <td>
2828 <ul>
2829 <li>All
2830 </ul>
2831 <td>
2832 <table>
2833 <tr><th>
2834 <tr><td>All
2835 </table>
2836<tr>
2837 <td rowspan="3">SliceLayer
2838 <td rowspan="3" style="width:200px;"> Layer to perform tensor slicing.
2839 <td rowspan="3">
2840 <ul>
2841 <li>ANEURALNETWORKS_SLICE
2842 </ul>
2843 <td>CpuRef
2844 <td>
2845 <ul>
2846 <li>All
2847 </ul>
2848 <td>
2849 <table>
2850 <tr><th>
2851 <tr><td>BFLOAT16
2852 <tr><td>FLOAT32
2853 <tr><td>QASYMMS8
2854 <tr><td>QASYMMU8
2855 <tr><td>QSYMMS16
2856 </table>
2857<tr>
2858 <td>CpuAcc
2859 <td>
2860 <ul>
2861 <li>All
2862 </ul>
2863 <td>
2864 <table>
2865 <tr><th>
2866 <tr><td>All
2867 </table>
2868<tr>
2869 <td>GpuAcc
2870 <td>
2871 <ul>
2872 <li>All
2873 </ul>
2874 <td>
2875 <table>
2876 <tr><th>
2877 <tr><td>All
2878 </table>
2879<tr>
2880 <td rowspan="3">SoftmaxLayer
2881 <td rowspan="3" style="width:200px;"> Layer to perform softmax, log-softmax operation over the specified axis.
2882 <td rowspan="3">
2883 <ul>
2884 <li>ANEURALNETWORKS_LOG_SOFTMAX
2885 <li>ANEURALNETWORKS_SOFTMAX
2886 </ul>
2887 <td>CpuRef
2888 <td>
2889 <ul>
2890 <li>All
2891 </ul>
2892 <td>
2893 <table>
2894 <tr><th>
2895 <tr><td>BFLOAT16
2896 <tr><td>FLOAT16
2897 <tr><td>FLOAT32
2898 <tr><td>QASYMMS8
2899 <tr><td>QASYMMU8
2900 <tr><td>QSYMMS8
2901 <tr><td>QSYMMS16
2902 </table>
2903<tr>
2904 <td>CpuAcc
2905 <td>
2906 <ul>
2907 <li>All
2908 </ul>
2909 <td>
2910 <table>
2911 <tr><th>
2912 <tr><td>QASYMMU8
2913 <tr><td>QASYMMS8
2914 <tr><td>FLOAT16
2915 <tr><td>FLOAT32
2916 </table>
2917<tr>
2918 <td>GpuAcc
2919 <td>
2920 <ul>
2921 <li>All
2922 </ul>
2923 <td>
2924 <table>
2925 <tr><th>
2926 <tr><td>QASYMMU8
2927 <tr><td>QASYMMS8
2928 <tr><td>FLOAT16
2929 <tr><td>FLOAT32
2930 </table>
2931<tr>
2932 <td rowspan="3">SpaceToBatchNdLayer
2933 <td rowspan="3" style="width:200px;"> Layer to divide spatial dimensions of the tensor into a grid of blocks and interleaves these blocks with the batch dimension.
2934 <td rowspan="3">
2935 <ul>
2936 <li>ANEURALNETWORKS_SPACE_TO_BATCH_ND
2937 </ul>
2938 <td>CpuRef
2939 <td>
2940 <ul>
2941 <li>All
2942 </ul>
2943 <td>
2944 <table>
2945 <tr><th>
2946 <tr><td>BFLOAT16
2947 <tr><td>FLOAT16
2948 <tr><td>FLOAT32
2949 <tr><td>QASYMMS8
2950 <tr><td>QASYMMU8
2951 <tr><td>QSYMMS16
2952 </table>
2953<tr>
2954 <td>CpuAcc
2955 <td>
2956 <ul>
2957 <li>NHWC
2958 <li>NCHW
2959 </ul>
2960 <td>
2961 <table>
2962 <tr><th>
2963 <tr><td>All
2964 </table>
2965<tr>
2966 <td>GpuAcc
2967 <td>
2968 <ul>
2969 <li>NHWC
2970 <li>NCHW
2971 </ul>
2972 <td>
2973 <table>
2974 <tr><th>
2975 <tr><td>All
2976 </table>
2977<tr>
2978 <td rowspan="3">SpaceToDepthLayer
2979 <td rowspan="3" style="width:200px;"> Layer to rearrange blocks of spatial data into depth.
2980 <td rowspan="3">
2981 <ul>
2982 <li>ANEURALNETWORKS_SPACE_TO_DEPTH
2983 </ul>
2984 <td>CpuRef
2985 <td>
2986 <ul>
2987 <li>All
2988 </ul>
2989 <td>
2990 <table>
2991 <tr><th>
2992 <tr><td>BFLOAT16
2993 <tr><td>FLOAT16
2994 <tr><td>FLOAT32
2995 <tr><td>QASYMMS8
2996 <tr><td>QASYMMU8
2997 <tr><td>QSYMMS16
2998 </table>
2999<tr>
3000 <td>CpuAcc
3001 <td>
3002 <ul>
3003 <li>NHWC
3004 <li>NCHW
3005 </ul>
3006 <td>
3007 <table>
3008 <tr><th>
3009 <tr><td>All
3010 </table>
3011<tr>
3012 <td>GpuAcc
3013 <td>
3014 <ul>
3015 <li>NHWC
3016 <li>NCHW
3017 </ul>
3018 <td>
3019 <table>
3020 <tr><th>
3021 <tr><td>All
3022 </table>
3023<tr>
3024 <td rowspan="3">SplitterLayer
3025 <td rowspan="3" style="width:200px;"> Layer to split a tensor along a given axis.
3026 <td rowspan="3">
3027 <ul>
3028 <li>ANEURALNETWORKS_SPLIT
3029 </ul>
3030 <td>CpuRef
3031 <td>
3032 <ul>
3033 <li>All
3034 </ul>
3035 <td>
3036 <table>
3037 <tr><th>
3038 <tr><td>BFLOAT16
3039 <tr><td>FLOAT16
3040 <tr><td>FLOAT32
3041 <tr><td>QASYMMS8
3042 <tr><td>QASYMMU8
3043 <tr><td>QSYMMS16
3044 </table>
3045<tr>
3046 <td>CpuAcc
3047 <td>
3048 <ul>
3049 <li>All
3050 </ul>
3051 <td>
3052 <table>
3053 <tr><th>
3054 <tr><td>All
3055 </table>
3056<tr>
3057 <td>GpuAcc
3058 <td>
3059 <ul>
3060 <li>All
3061 </ul>
3062 <td>
3063 <table>
3064 <tr><th>
3065 <tr><td>All
3066 </table>
3067<tr>
3068 <td rowspan="3">StackLayer
3069 <td rowspan="3" style="width:200px;"> Layer to stack tensors along an axis.
3070 <td rowspan="3">
3071 <ul>
3072 <li>N/A
3073 </ul>
3074 <td>CpuRef
3075 <td>
3076 <ul>
3077 <li>All
3078 </ul>
3079 <td>
3080 <table>
3081 <tr><th>
3082 <tr><td>BFLOAT16
3083 <tr><td>FLOAT16
3084 <tr><td>FLOAT32
3085 <tr><td>QASYMMS8
3086 <tr><td>QASYMMU8
3087 <tr><td>QSYMMS16
3088 </table>
3089<tr>
3090 <td>CpuAcc
3091 <td>
3092 <ul>
3093 <li>All
3094 </ul>
3095 <td>
3096 <table>
3097 <tr><th>
3098 <tr><td>All
3099 </table>
3100<tr>
3101 <td>GpuAcc
3102 <td>
3103 <ul>
3104 <li>All
3105 </ul>
3106 <td>
3107 <table>
3108 <tr><th>
3109 <tr><td>All
3110 </table>
3111<tr>
3112 <td rowspan="1">StandInLayer
3113 <td rowspan="1" style="width:200px;"> A layer to represent "unknown" or "unsupported" operations in the input graph. It has a configurable number of input and output slots and an optional name.
3114 <td rowspan="1">
3115 <ul>
3116 <li>N/A
3117 </ul>
3118 <td>N/A
3119 <td>N/A
3120 <td>N/A
3121<tr>
3122 <td rowspan="3">StridedSliceLayer
3123 <td rowspan="3" style="width:200px;"> Layer to extract a strided slice of a tensor.
3124 <td rowspan="3">
3125 <ul>
3126 <li>ANEURALNETWORKS_STRIDED_SLICE
3127 </ul>
3128 <td>CpuRef
3129 <td>
3130 <ul>
3131 <li>All
3132 </ul>
3133 <td>
3134 <table>
3135 <tr><th>
3136 <tr><td>BFLOAT16
3137 <tr><td>FLOAT32
3138 <tr><td>QASYMMS8
3139 <tr><td>QASYMMU8
3140 <tr><td>QSYMMS16
3141 </table>
3142<tr>
3143 <td>CpuAcc
3144 <td>
3145 <ul>
3146 <li>All
3147 </ul>
3148 <td>
3149 <table>
3150 <tr><th>
3151 <tr><td>All
3152 </table>
3153<tr>
3154 <td>GpuAcc
3155 <td>
3156 <ul>
3157 <li>All
3158 </ul>
3159 <td>
3160 <table>
3161 <tr><th>
3162 <tr><td>All
3163 </table>
3164<tr>
3165 <td rowspan="3">SubtractionLayer
3166 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise subtract of 2 tensors.
3167 <td rowspan="3">
3168 <ul>
3169 <li>ANEURALNETWORKS_SUB
3170 </ul>
3171 <td>CpuRef
3172 <td>
3173 <ul>
3174 <li>All
3175 </ul>
3176 <td>
3177 <table>
3178 <tr><th>
3179 <tr><td>BFLOAT16
3180 <tr><td>FLOAT16
3181 <tr><td>FLOAT32
3182 <tr><td>QASYMMS8
3183 <tr><td>QASYMMU8
3184 <tr><td>QSYMMS16
3185 <tr><td>SIGNED32
3186 </table>
3187<tr>
3188 <td>CpuAcc
3189 <td>
3190 <ul>
3191 <li>All
3192 </ul>
3193 <td>
3194 <table>
3195 <tr><th>
3196 <tr><td>QASYMMU8
3197 <tr><td>QASYMMS8
3198 <tr><td>QSYMMS16
3199 <tr><td>SIGNED32
3200 <tr><td>FLOAT16
3201 <tr><td>FLOAT32
3202 </table>
3203<tr>
3204 <td>GpuAcc
3205 <td>
3206 <ul>
3207 <li>All
3208 </ul>
3209 <td>
3210 <table>
3211 <tr><th>
3212 <tr><td>QASYMMU8
3213 <tr><td>QASYMMS8
3214 <tr><td>QSYMMS16
3215 <tr><td>SIGNED32
3216 <tr><td>FLOAT16
3217 <tr><td>FLOAT32
3218 </table>
3219<tr>
3220 <td rowspan="3">TransposeConvolution2dLayer
3221 <td rowspan="3" style="width:200px;"> Layer to perform 2D transpose convolution (deconvolution) operation.
3222 <td rowspan="3">
3223 <ul>
3224 <li>ANEURALNETWORKS_TRANSPOSE_CONV_2D
3225 </ul>
3226 <td>CpuRef
3227 <td>
3228 <ul>
3229 <li>All
3230 </ul>
3231 <td>
3232 <table>
3233 <tr><th>
3234 <tr><td>BFLOAT16
3235 <tr><td>FLOAT16
3236 <tr><td>FLOAT32
3237 <tr><td>QASYMMS8
3238 <tr><td>QASYMMU8
3239 <tr><td>QSYMMS8
3240 <tr><td>QSYMMS16
3241 </table>
3242<tr>
3243 <td>CpuAcc
3244 <td>
3245 <ul>
3246 <li>NHWC
3247 <li>NCHW
3248 </ul>
3249 <td>
3250 <table>
3251 <tr><th>
3252 <tr><td>SIGNED32
3253 <tr><td>FLOAT16
3254 <tr><td>FLOAT32
3255 <tr><td>QASYMMU8
3256 <tr><td>QASYMMS8
3257 <tr><td>QUANTIZEDSYMM8PERAXIS
3258 </table>
3259<tr>
3260 <td>GpuAcc
3261 <td>
3262 <ul>
3263 <li>NHWC
3264 <li>NCHW
3265 </ul>
3266 <td>
3267 <table>
3268 <tr><th>
3269 <tr><td>SIGNED32
3270 <tr><td>FLOAT16
3271 <tr><td>FLOAT32
3272 <tr><td>QASYMMU8
3273 <tr><td>QASYMMS8
3274 <tr><td>QUANTIZEDSYMM8PERAXIS
3275 </table>
3276<tr>
3277 <td rowspan="3">TransposeLayer
3278 <td rowspan="3" style="width:200px;"> Layer to transpose a tensor.
3279 <td rowspan="3">
3280 <ul>
3281 <li>ANEURALNETWORKS_TRANSPOSE
3282 </ul>
3283 <td>CpuRef
3284 <td>
3285 <ul>
3286 <li>All
3287 </ul>
3288 <td>
3289 <table>
3290 <tr><th>
3291 <tr><td>BFLOAT16
3292 <tr><td>FLOAT16
3293 <tr><td>FLOAT32
3294 <tr><td>QASYMMS8
3295 <tr><td>QASYMMU8
3296 <tr><td>QSYMMS16
3297 </table>
3298<tr>
3299 <td>CpuAcc
3300 <td>
3301 <ul>
3302 <li>All
3303 </ul>
3304 <td>
3305 <table>
3306 <tr><th>
3307 <tr><td>All
3308 </table>
3309<tr>
3310 <td>GpuAcc
3311 <td>
3312 <ul>
3313 <li>All
3314 </ul>
3315 <td>
3316 <table>
3317 <tr><th>
3318 <tr><td>All
3319 </table>
3320<tr>
3321 <td rowspan="3">UnidirectionalSquenceLstmLayer
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3322 <td rowspan="3" style="width:200px;"> Layer to perform unidirectional sequence LSTM operation.
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3323 <td rowspan="3">
3324 <ul>
3325 <li>ANEURALNETWORKS_UNIDIRECTIONAL_SEQUENCE_LSTM
3326 </ul>
3327 <td>CpuRef
3328 <td>
3329 <ul>
3330 <li>All
3331 </ul>
3332 <td>
3333 <table>
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3334 <tr><th>Input Types
3335 <tr><td>FLOAT32
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3336 </table>
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3337 <table>
3338 <tr><th>Weight Types
3339 <tr><td>FLOAT32
3340 <tr><td>QASYMMS8
3341 </table>
Cathal Corbettfd5bec42022-03-03 15:13:23 +0000[diff] [blame]3342 <td>CpuAcc
3343 <td>
3344 <ul>
3345 <li>All
3346 </ul>
3347 <td>
3348 <table>
3349 <tr><th>Input Types
3350 <tr><td>FLOAT32
3351 </table>
3352 <table>
3353 <tr><th>Weight Types
3354 <tr><td>FLOAT32
3355 </table>
Cathal Corbett4952a3e2022-03-03 15:14:18 +0000[diff] [blame]3356 <td>GpuAcc
3357 <td>
3358 <ul>
3359 <li>All
3360 </ul>
3361 <td>
3362 <table>
3363 <tr><th>Input Types
3364 <tr><td>FLOAT32
3365 </table>
3366 <table>
3367 <tr><th>Weight Types
3368 <tr><td>FLOAT32
3369 </table>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3370<tr>
3371 <td rowspan="3">UnmapLayer
3372 <td rowspan="3" style="width:200px;"> Layer to perform unmap operation on tensor.
3373 <td rowspan="3">
3374 <ul>
3375 <li>N/A
3376 </ul>
3377 <td>CpuRef
3378 <td>
3379 <ul>
3380 <li>All
3381 </ul>
3382 <td>
3383 <table>
3384 <tr><th>
3385 <tr><td>All
3386 </table>
3387<tr>
3388 <td>CpuAcc
3389 <td>
3390 <ul>
3391 <li>NHWC
3392 <li>NCHW
3393 </ul>
3394 <td>
3395 <table>
3396 <tr><th>
3397 <tr><td>All
3398 </table>
3399<tr>
3400 <td>GpuAcc
3401 <td>
3402 <ul>
3403 <li>NHWC
3404 <li>NCHW
3405 </ul>
3406 <td>
3407 <table>
3408 <tr><th>
3409 <tr><td>All
3410 </table>
3411</table>
3412
3413*/
3414} // namespace