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telsoa014fcda012018-03-09 14:13:49 +00001//
2// Copyright © 2017 Arm Ltd. All rights reserved.
David Beckecb56cd2018-09-05 12:52:57 +01003// SPDX-License-Identifier: MIT
telsoa014fcda012018-03-09 14:13:49 +00004//
5#pragma once
6
7#include <array>
8
9namespace armnn
10{
11
12constexpr unsigned int MaxNumOfTensorDimensions = 4U;
13
14/// @enum Status enumeration
15/// @var Status::Successful
16/// @var Status::Failure
17enum class Status
18{
19 Success = 0,
20 Failure = 1
21};
22
23enum class DataType
24{
telsoa01c577f2c2018-08-31 09:22:23 +010025 Float16 = 0,
26 Float32 = 1,
27 QuantisedAsymm8 = 2,
28 Signed32 = 3
telsoa014fcda012018-03-09 14:13:49 +000029};
30
Derek Lamberti0cff1632018-09-18 16:02:25 +010031enum class DataLayout
32{
33 NCHW = 1,
34 NHWC = 2
35};
36
telsoa014fcda012018-03-09 14:13:49 +000037enum class ActivationFunction
38{
39 Sigmoid = 0,
40 TanH = 1,
41 Linear = 2,
42 ReLu = 3,
telsoa01c577f2c2018-08-31 09:22:23 +010043 BoundedReLu = 4, ///< min(a, max(b, input))
telsoa014fcda012018-03-09 14:13:49 +000044 SoftReLu = 5,
45 LeakyReLu = 6,
46 Abs = 7,
47 Sqrt = 8,
48 Square = 9
49};
50
51enum class PoolingAlgorithm
52{
53 Max = 0,
54 Average = 1,
55 L2 = 2
56};
57
58///
59/// The padding method modifies the output of pooling layers.
60/// In both supported methods, the values are ignored (they are
telsoa01c577f2c2018-08-31 09:22:23 +010061/// not even zeroes, which would make a difference for max pooling
telsoa014fcda012018-03-09 14:13:49 +000062/// a tensor with negative values). The difference between
telsoa01c577f2c2018-08-31 09:22:23 +010063/// IgnoreValue and Exclude is that the former counts the padding
telsoa014fcda012018-03-09 14:13:49 +000064/// fields in the divisor of Average and L2 pooling, while
65/// Exclude does not.
66///
67enum class PaddingMethod
68{
telsoa01c577f2c2018-08-31 09:22:23 +010069 /// The padding fields count, but are ignored
70 IgnoreValue = 0,
71 /// The padding fields don't count and are ignored
72 Exclude = 1
telsoa014fcda012018-03-09 14:13:49 +000073};
74
75enum class NormalizationAlgorithmChannel
76{
77 Across = 0,
78 Within = 1
79};
80
81enum class NormalizationAlgorithmMethod
82{
telsoa01c577f2c2018-08-31 09:22:23 +010083 /// Krichevsky 2012: Local Brightness Normalization
84 LocalBrightness = 0,
85 /// Jarret 2009: Local Contrast Normalization
86 LocalContrast = 1
telsoa014fcda012018-03-09 14:13:49 +000087};
88
89enum class OutputShapeRounding
90{
91 Floor = 0,
92 Ceiling = 1
93};
94
95enum class Compute
96{
telsoa01c577f2c2018-08-31 09:22:23 +010097 /// CPU Execution: Reference C++ kernels
98 CpuRef = 0,
99 /// CPU Execution: NEON: ArmCompute
100 CpuAcc = 1,
101 /// GPU Execution: OpenCL: ArmCompute
102 GpuAcc = 2,
telsoa014fcda012018-03-09 14:13:49 +0000103 Undefined = 5
104};
105
telsoa01c577f2c2018-08-31 09:22:23 +0100106class IDeviceSpec
telsoa014fcda012018-03-09 14:13:49 +0000107{
telsoa01c577f2c2018-08-31 09:22:23 +0100108protected:
109 IDeviceSpec() {};
110 virtual ~IDeviceSpec() {};
telsoa014fcda012018-03-09 14:13:49 +0000111};
112
113/// Type of identifiers for bindable layers (inputs, outputs).
114using LayerBindingId = int;
115
116class PermutationVector
117{
118public:
119 using ValueType = unsigned int;
120 using SizeType = unsigned int;
121 using ArrayType = std::array<ValueType, MaxNumOfTensorDimensions>;
122 using ConstIterator = typename ArrayType::const_iterator;
123
telsoa01c577f2c2018-08-31 09:22:23 +0100124 /// @param dimMappings - Indicates how to translate tensor elements from a given source into the target destination,
telsoa014fcda012018-03-09 14:13:49 +0000125 /// when source and target potentially have different memory layouts.
126 ///
telsoa01c577f2c2018-08-31 09:22:23 +0100127 /// E.g. For a 4-d tensor laid out in a memory with the format (Batch Element, Height, Width, Channels),
telsoa014fcda012018-03-09 14:13:49 +0000128 /// which is to be passed as an input to ArmNN, each source dimension is mapped to the corresponding
129 /// ArmNN dimension. The Batch dimension remains the same (0 -> 0). The source Height dimension is mapped
130 /// to the location of the ArmNN Height dimension (1 -> 2). Similar arguments are made for the Width and
131 /// Channels (2 -> 3 and 3 -> 1). This will lead to @ref m_DimMappings pointing to the following array:
132 /// [ 0, 2, 3, 1 ].
133 ///
134 /// Note that the mapping should be reversed if considering the case of ArmNN 4-d outputs (Batch Element,
135 /// Channels, Height, Width) being written to a destination with the format mentioned above. We now have
136 /// 0 -> 0, 2 -> 1, 3 -> 2, 1 -> 3, which, when reordered, lead to the following @ref m_DimMappings contents:
137 /// [ 0, 3, 1, 2 ].
138 ///
139 PermutationVector(const ValueType *dimMappings, SizeType numDimMappings);
140
141 PermutationVector(std::initializer_list<ValueType> dimMappings);
142
143 ValueType operator[](SizeType i) const { return m_DimMappings.at(i); }
144
145 SizeType GetSize() const { return m_NumDimMappings; }
146
147 ConstIterator begin() const { return m_DimMappings.begin(); }
148 ConstIterator end() const { return m_DimMappings.end(); }
149
150 bool IsEqual(const PermutationVector& other) const
151 {
152 return std::equal(begin(), end(), other.begin(), other.end());
153 }
154
155 bool IsInverse(const PermutationVector& other) const
156 {
157 bool isInverse = (GetSize() == other.GetSize());
158 for (SizeType i = 0; isInverse && (i < GetSize()); ++i)
159 {
160 isInverse = (m_DimMappings[other.m_DimMappings[i]] == i);
161 }
162 return isInverse;
163 }
164
165private:
166 ArrayType m_DimMappings;
167 /// Number of valid entries in @ref m_DimMappings
168 SizeType m_NumDimMappings;
169};
170
telsoa01c577f2c2018-08-31 09:22:23 +0100171/// Define LayerGuid type.
surmeh01bceff2f2018-03-29 16:29:27 +0100172using LayerGuid = unsigned int;
173
telsoa014fcda012018-03-09 14:13:49 +0000174}