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review.mlplatform.org / ml / armnn / 1fe6c8170ae2fe90b53fb71b7570aec9dfe75c45 / . / docs / 02_operator_list.dox
blob: 791565a985a4eb433ad00a194111584f57f453eb [file] [log] [blame]
Teresa Charlin1fe6c812022-11-01 15:59:50 +0000[diff] [blame^]1/// Copyright (c) 2021, 2023 ARM Limited and Contributors. All rights reserved.
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2///
3/// SPDX-License-Identifier: MIT
4///
5
6namespace armnn
7{
8/**
9@page operator_list Arm NN Operators
10
11@tableofcontents
12
13@section S5_1_operator_list Arm NN Operators
14
15Arm NN supports operators that are listed in below table.
16
17Arm NN supports a wide list of data-types.
18The main data-types that the Machine Learning functions support are the following:
19 <ul>
20 <li><b>BFLOAT16:</b> 16-bit non-standard brain floating point
21 <li><b>QASYMMU8:</b> 8-bit unsigned asymmetric quantized
22 <li><b>QASYMMS8:</b> 8-bit signed asymmetric quantized
23 <li><b>QUANTIZEDSYMM8PERAXIS:</b> 8-bit signed symmetric quantized
Cathal Corbettb85113e2022-02-22 11:51:43 +0000[diff] [blame]24 <li><b>QSYMMS8:</b> 8-bit signed symmetric quantized
25 <li><b>QSYMMS16:</b> 16-bit signed symmetric quantized
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]26 <li><b>FLOAT32:</b> 32-bit single precision floating point
27 <li><b>FLOAT16:</b> 16-bit half precision floating point
28 <li><b>SIGNED32:</b> 32-bit signed integer
29 <li><b>BOOLEAN:</b> 8-bit unsigned char
30 <li><b>All:</b> Agnostic to any specific data type
31 </ul>
32
33Arm NN supports the following data layouts (fast changing dimension from right to left):
34 <ul>
35 <li><b>NHWC:</b> Layout where channels are in the fastest changing dimension
36 <li><b>NCHW:</b> Layout where width is in the fastest changing dimension
37 <li><b>All:</b> Agnostic to any specific data layout
38 </ul>
39where N = batches, C = channels, H = height, W = width
40
41<table>
42<caption id="multi_row"></caption>
43<tr>
44 <th>Operator
45 <th>Description
46 <th>Equivalent Android NNAPI Operator
47 <th>Backends
48 <th>Data Layouts
49 <th>Data Types
50<tr>
51 <td rowspan="3">AbsLayer
52 <td rowspan="3"> Layer to perform absolute operation.
53 <td rowspan="3">
54 <ul>
55 <li>ANEURALNETWORKS_ABS
56 </ul>
57 <td>CpuRef
58 <td>
59 <ul>
60 <li>All
61 </ul>
62 <td>
63 <table>
64 <tr><th>
65 <tr><td>BFLOAT16
66 <tr><td>FLOAT16
67 <tr><td>FLOAT32
68 <tr><td>QASYMMS8
69 <tr><td>QASYMMU8
70 <tr><td>QSYMMS16
71 <tr><td>SIGNED32
72 </table>
73<tr>
74 <td>CpuAcc
75 <td>
76 <ul>
77 <li>All
78 </ul>
79 <td>
80 <table>
81 <tr><th>
82 <tr><td>FLOAT16
83 <tr><td>FLOAT32
84 <tr><td>SIGNED32
85 </table>
86<tr>
87 <td>GpuAcc
88 <td>
89 <ul>
90 <li>All
91 </ul>
92 <td>
93 <table>
94 <tr><th>
95 <tr><td>FLOAT16
96 <tr><td>FLOAT32
97 </table>
98<tr>
99 <td rowspan="3">ActivationLayer
100 <td rowspan="3" style="width:200px;"> Layer to simulate an activation layer with the specified activation function.
101 <td rowspan="3">
102 <ul>
103 <li>ANEURALNETWORKS_ABS
104 <li>ANEURALNETWORKS_ELU
105 <li>ANEURALNETWORKS_HARD_SWISH
106 <li>ANEURALNETWORKS_LOGISTIC
107 <li>ANEURALNETWORKS_PRELU
108 <li>ANEURALNETWORKS_RELU
109 <li>ANEURALNETWORKS_RELU1
110 <li>ANEURALNETWORKS_RELU6
111 <li>ANEURALNETWORKS_SQRT
112 <li>ANEURALNETWORKS_TANH
113 </ul>
114 <td>CpuRef
115 <td>
116 <ul>
117 <li>All
118 </ul>
119 <td>
120 <table>
121 <tr><th>
122 <tr><td>BFLOAT16
123 <tr><td>FLOAT16
124 <tr><td>FLOAT32
125 <tr><td>QASYMMS8
126 <tr><td>QASYMMU8
127 <tr><td>QSYMMS16
128 </table>
129<tr>
130 <td>CpuAcc
131 <td>
132 <ul>
133 <li>All
134 </ul>
135 <td>
136 <table>
137 <tr><th>
138 <tr><td>QASYMMU8
139 <tr><td>QASYMMS8
140 <tr><td>QSYMMS16
141 <tr><td>FLOAT16
142 <tr><td>FLOAT32
143 </table>
144<tr>
145 <td>GpuAcc
146 <td>
147 <ul>
148 <li>All
149 </ul>
150 <td>
151 <table>
152 <tr><th>
153 <tr><td>QASYMMU8
154 <tr><td>QASYMMS8
155 <tr><td>QSYMMS16
156 <tr><td>FLOAT16
157 <tr><td>FLOAT32
158 </table>
159<tr>
160 <td rowspan="3">AdditionLayer
161 <td rowspan="3" style="width:200px;"> Layer to add 2 tensors.
162 <td rowspan="3">
163 <ul>
164 <li>ANEURALNETWORKS_ADD
165 </ul>
166 <td>CpuRef
167 <td>
168 <ul>
169 <li>All
170 </ul>
171 <td>
172 <table>
173 <tr><th>
174 <tr><td>BFLOAT16
175 <tr><td>FLOAT16
176 <tr><td>FLOAT32
177 <tr><td>QASYMMS8
178 <tr><td>QASYMMU8
179 <tr><td>QSYMMS16
180 <tr><td>SIGNED32
181 </table>
182<tr>
183 <td>CpuAcc
184 <td>
185 <ul>
186 <li>All
187 </ul>
188 <td>
189 <table>
190 <tr><th>
191 <tr><td>QASYMMU8
192 <tr><td>QASYMMS8
193 <tr><td>QSYMMS16
194 <tr><td>SIGNED32
195 <tr><td>FLOAT16
196 <tr><td>FLOAT32
197 </table>
198<tr>
199 <td>GpuAcc
200 <td>
201 <ul>
202 <li>All
203 </ul>
204 <td>
205 <table>
206 <tr><th>
207 <tr><td>QASYMMU8
208 <tr><td>QASYMMS8
209 <tr><td>QSYMMS16
210 <tr><td>SIGNED32
211 <tr><td>FLOAT16
212 <tr><td>FLOAT32
213 </table>
214<tr>
215 <td rowspan="3">ArgMinMaxLayer
216 <td rowspan="3" style="width:200px;"> Layer to calculate the index of the minimum or maximum values in a tensor
217 based on an axis.
218 <td rowspan="3">
219 <ul>
220 <li>ANEURALNETWORKS_ARGMAX
221 <li>ANEURALNETWORKS_ARGMIN
222 </ul>
223 <td>CpuRef
224 <td>
225 <ul>
226 <li>All
227 </ul>
228 <td>
229 <table>
230 <tr><th>
231 <tr><td>BFLOAT16
232 <tr><td>FLOAT16
233 <tr><td>FLOAT32
234 <tr><td>QASYMMS8
235 <tr><td>QASYMMU8
236 <tr><td>QSYMMS16
237 <tr><td>SIGNED32
238 <tr><td>SIGNED64
239 </table>
240<tr>
241 <td>CpuAcc
242 <td>
243 <ul>
244 <li>All
245 </ul>
246 <td>
247 <table>
248 <tr><th>
249 <tr><td>QASYMMU8
250 <tr><td>QASYMMS8
251 <tr><td>SIGNED32
252 <tr><td>FLOAT16
253 <tr><td>FLOAT32
254 </table>
255<tr>
256 <td>GpuAcc
257 <td>
258 <ul>
259 <li>All
260 </ul>
261 <td>
262 <table>
263 <tr><th>
264 <tr><td>QASYMMU8
265 <tr><td>QASYMMS8
266 <tr><td>SIGNED32
267 <tr><td>FLOAT16
268 <tr><td>FLOAT32
269 </table>
270<tr>
Samuel Yap6b478092022-07-06 15:36:03 +0100[diff] [blame]271 <td rowspan="3">BatchMatMulLayer
272 <td rowspan="3" style="width:200px;"> Layer to perform batch matrix multiplication.
273 <td rowspan="3">
274 <ul>
275 <li>N/A
276 </ul>
277 <td>CpuRef
278 <td>
279 <ul>
280 <li>All
281 </ul>
282 <td>
283 <table>
284 <tr><th>
285 <tr><td>BFLOAT16
286 <tr><td>FLOAT16
287 <tr><td>FLOAT32
288 <tr><td>QASYMMS8
289 <tr><td>QASYMMU8
290 <tr><td>QSYMMS16
291 </table>
292<tr>
293 <td>CpuAcc
294 <td>
295 <ul>
Teresa Charlin0f86ecf2022-10-13 15:47:08 +0100[diff] [blame]296 <li>All
Samuel Yap6b478092022-07-06 15:36:03 +0100[diff] [blame]297 </ul>
298 <td>
Teresa Charlin0f86ecf2022-10-13 15:47:08 +0100[diff] [blame]299 <table>
300 <tr><th>
301 <tr><td>FLOAT32
Teresa Charlin1fe6c812022-11-01 15:59:50 +0000[diff] [blame^]302 <tr><td>QASYMMS8
Teresa Charlin0f86ecf2022-10-13 15:47:08 +0100[diff] [blame]303 </table>
Samuel Yap6b478092022-07-06 15:36:03 +0100[diff] [blame]304<tr>
305 <td>GpuAcc
306 <td>
307 <ul>
Teresa Charlin94916a52022-10-19 08:48:07 +0100[diff] [blame]308 <li>All
Samuel Yap6b478092022-07-06 15:36:03 +0100[diff] [blame]309 </ul>
310 <td>
Teresa Charlin94916a52022-10-19 08:48:07 +0100[diff] [blame]311 <table>
312 <tr><th>
313 <tr><td>FLOAT32
314 </table>
Samuel Yap6b478092022-07-06 15:36:03 +0100[diff] [blame]315<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]316 <td rowspan="3">BatchNormalizationLayer
317 <td rowspan="3" style="width:200px;"> Layer to perform batch normalization.
318 <td rowspan="3">
319 <ul>
320 <li>N/A
321 </ul>
322 <td>CpuRef
323 <td>
324 <ul>
325 <li>All
326 </ul>
327 <td>
328 <table>
329 <tr><th>
330 <tr><td>BFLOAT16
331 <tr><td>FLOAT16
332 <tr><td>FLOAT32
333 <tr><td>QASYMMS8
334 <tr><td>QASYMMU8
335 <tr><td>QSYMMS16
336 </table>
337<tr>
338 <td>CpuAcc
339 <td>
340 <ul>
341 <li>NHWC
342 <li>NCHW
343 </ul>
344 <td>
345 <table>
346 <tr><th>
347 <tr><td>FLOAT32
348 <tr><td>FLOAT16
349 </table>
350<tr>
351 <td>GpuAcc
352 <td>
353 <ul>
354 <li>NHWC
355 <li>NCHW
356 </ul>
357 <td>
358 <table>
359 <tr><th>
360 <tr><td>FLOAT32
361 <tr><td>FLOAT16
362 </table>
363<tr>
364 <td rowspan="3">BatchToSpaceNdLayer
365 <td rowspan="3" style="width:200px;"> Layer to perform a batch to space transformation.
366 <td rowspan="3">
367 <ul>
368 <li>ANEURALNETWORKS_BATCH_TO_SPACE_ND
369 </ul>
370 <td>CpuRef
371 <td>
372 <ul>
373 <li>All
374 </ul>
375 <td>
376 <table>
377 <tr><th>
378 <tr><td>BFLOAT16
379 <tr><td>FLOAT16
380 <tr><td>FLOAT32
381 <tr><td>QASYMMS8
382 <tr><td>QASYMMU8
383 <tr><td>QSYMMS16
384 </table>
385<tr>
386 <td>CpuAcc
387 <td>
388 <ul>
389 <li>NHWC
390 <li>NCHW
391 </ul>
392 <td>
393 <table>
394 <tr><th>
395 <tr><td>All
396 </table>
397<tr>
398 <td>GpuAcc
399 <td>
400 <ul>
401 <li>NHWC
402 <li>NCHW
403 </ul>
404 <td>
405 <table>
406 <tr><th>
407 <tr><td>All
408 </table>
409<tr>
410 <td rowspan="3">CastLayer
411 <td rowspan="3" style="width:200px;"> Layer to cast a tensor to a type.
412 <td rowspan="3">
413 <ul>
414 <li>ANEURALNETWORKS_CAST
415 </ul>
416 <td>CpuRef
417 <td>
418 <ul>
419 <li>All
420 </ul>
421 <td>
422 <table>
423 <tr><th>
424 <tr><td>BFLOAT16
425 <tr><td>FLOAT16
426 <tr><td>FLOAT32
427 <tr><td>QSYMMS8
428 <tr><td>QASYMMS8
429 <tr><td>QASYMMU8
430 <tr><td>QSYMMS16
431 <tr><td>SIGNED32
432 </table>
433<tr>
434 <td>CpuAcc
435 <td>
436 <ul>
437 <li>All
438 </ul>
439 <td>
440 <table>
441 <tr><th>
442 <tr><td>QASYMMS8
443 <tr><td>QASYMMU8
444 <tr><td>FLOAT16
445 <tr><td>SIGNED32
446 <tr><td>FLOAT32
447 </table>
448<tr>
449 <td>GpuAcc
450 <td>
451 <ul>
452 <li>All
453 </ul>
454 <td>
455 <table>
456 <tr><th>
457 <tr><td>QASYMMS8
458 <tr><td>QASYMMU8
459 <tr><td>SIGNED32
460 <tr><td>FLOAT16
461 <tr><td>FLOAT32
462 </table>
463<tr>
Teresa Charlincd203852021-09-24 18:15:39 +0100[diff] [blame]464 <td rowspan="3">ChannelShuffleLayer
465 <td rowspan="3" style="width:200px;"> Layer to reorganize the channels of a tensor.
466 <td rowspan="3">
467 <ul>
468 <li>ANEURALNETWORKS_CHANNEL_SHUFFLE
469 </ul>
470 <td>CpuRef
471 <td>
472 <ul>
473 <li>All
474 </ul>
475 <td>
476 <table>
477 <tr><th>
478 <tr><td>FLOAT16
479 <tr><td>FLOAT32
480 <tr><td>QSYMMS8
481 <tr><td>QASYMMS8
482 <tr><td>QASYMMU8
483 </table>
484<tr>
485 <td>CpuAcc
486 <td>
487 <ul>
488 <li>All
489 </ul>
490 <td>
491 <table>
492 <tr><th>
493 <tr><td>QASYMMS8
494 <tr><td>QASYMMU8
495 <tr><td>FLOAT16
496 <tr><td>FLOAT32
497 </table>
498<tr>
499 <td>GpuAcc
500 <td>
501 <ul>
502 <li>All
503 </ul>
504 <td>
505 <table>
506 <tr><th>
507 <tr><td>QASYMMS8
508 <tr><td>QASYMMU8
509 <tr><td>FLOAT16
510 <tr><td>FLOAT32
511 </table>
512<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]513 <td rowspan="3">ComparisonLayer
514 <td rowspan="3" style="width:200px;"> Layer to compare 2 tensors.
515 <td rowspan="3">
516 <ul>
517 <li>ANEURALNETWORKS_EQUAL
518 <li>ANEURALNETWORKS_GREATER
519 <li>ANEURALNETWORKS_GREATER_EQUAL
520 <li>ANEURALNETWORKS_LESS
521 <li>ANEURALNETWORKS_LESS_EQUAL
522 <li>ANEURALNETWORKS_NOT_EQUAL
523 </ul>
524 <td>CpuRef
525 <td>
526 <ul>
527 <li>All
528 </ul>
529 <td>
530 <table>
531 <tr><th>
532 <tr><td>BFLOAT16
533 <tr><td>FLOAT16
534 <tr><td>FLOAT32
535 <tr><td>BOOLEAN
536 <tr><td>QASYMMS8
537 <tr><td>QASYMMU8
538 <tr><td>QSYMMS16
539 <tr><td>SIGNED32
540 </table>
541<tr>
542 <td>CpuAcc
543 <td>
544 <ul>
545 <li>All
546 </ul>
547 <td>
548 <table>
549 <tr><th>
550 <tr><td>All
551 </table>
552<tr>
553 <td>GpuAcc
554 <td>
555 <ul>
556 <li>All
557 </ul>
558 <td>
559 <table>
560 <tr><th>
561 <tr><td>All
562 </table>
563<tr>
564 <td rowspan="3">ConcatLayer
565 <td rowspan="3" style="width:200px;"> Layer to concatenate tensors along a given axis.
566 <td rowspan="3">
567 <ul>
568 <li>ANEURALNETWORKS_CONCATENATION
569 </ul>
570 <td>CpuRef
571 <td>
572 <ul>
573 <li>All
574 </ul>
575 <td>
576 <table>
577 <tr><th>
578 <tr><td>BFLOAT16
579 <tr><td>FLOAT16
580 <tr><td>FLOAT32
581 <tr><td>QASYMMS8
582 <tr><td>QASYMMU8
583 <tr><td>QSYMMS16
584 </table>
585<tr>
586 <td>CpuAcc
587 <td>
588 <ul>
589 <li>All
590 </ul>
591 <td>
592 <table>
593 <tr><th>
594 <tr><td>QASYMMU8
595 <tr><td>QASYMMS8
596 <tr><td>FLOAT16
597 <tr><td>FLOAT32
598 </table>
599<tr>
600 <td>GpuAcc
601 <td>
602 <ul>
603 <li>All
604 </ul>
605 <td>
606 <table>
607 <tr><th>
608 <tr><td>QASYMMU8
609 <tr><td>QASYMMS8
610 <tr><td>FLOAT16
611 <tr><td>FLOAT32
612 </table>
613<tr>
614 <td rowspan="3">ConstantLayer
615 <td rowspan="3" style="width:200px;"> Layer to provide a constant tensor.
616 <td rowspan="3">
617 <ul>
618 <li>N/A
619 </ul>
620 <td>CpuRef
621 <td>
622 <ul>
623 <li>All
624 </ul>
625 <td>
626 <table>
627 <tr><th>
628 <tr><td>BFLOAT16
629 <tr><td>FLOAT16
630 <tr><td>FLOAT32
631 <tr><td>QASYMMS8
632 <tr><td>QASYMMU8
633 <tr><td>QSYMMS8
634 <tr><td>QSYMMS16
635 <tr><td>SIGNED32
636 </table>
637<tr>
638 <td>CpuAcc
639 <td>
640 <ul>
641 <li>All
642 </ul>
643 <td>
644 <table>
645 <tr><th>
646 <tr><td>All
647 </table>
648<tr>
649 <td>GpuAcc
650 <td>
651 <ul>
652 <li>All
653 </ul>
654 <td>
655 <table>
656 <tr><th>
657 <tr><td>All
658 </table>
659<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]660 <td rowspan="3">ConvertFp16ToFp32Layer
661 <td rowspan="3" style="width:200px;"> Layer to convert Float16 tensor to Float32 tensor.
662 <td rowspan="3">
663 <ul>
664 <li>N/A
665 </ul>
666 <td>CpuRef
667 <td>
668 <ul>
669 <li>All
670 </ul>
671 <td>
672 <table>
673 <tr><th>
674 <tr><td>FLOAT16
675 <tr><td>FLOAT32
676 </table>
677<tr>
678 <td>CpuAcc
679 <td>
680 <ul>
681 <li>All
682 </ul>
683 <td>
684 <table>
685 <tr><th>
686 <tr><td>FLOAT16
687 <tr><td>FLOAT32
688 </table>
689<tr>
690 <td>GpuAcc
691 <td>
692 <ul>
693 <li>All
694 </ul>
695 <td>
696 <table>
697 <tr><th>
698 <tr><td>FLOAT16
699 <tr><td>FLOAT32
700 </table>
701<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]702 <td rowspan="3">ConvertFp32ToFp16Layer
703 <td rowspan="3" style="width:200px;"> Layer to convert Float32 tensor to Float16 tensor.
704 <td rowspan="3">
705 <ul>
706 <li>N/A
707 </ul>
708 <td>CpuRef
709 <td>
710 <ul>
711 <li>All
712 </ul>
713 <td>
714 <table>
715 <tr><th>
716 <tr><td>FLOAT16
717 <tr><td>FLOAT32
718 </table>
719<tr>
720 <td>CpuAcc
721 <td>
722 <ul>
723 <li>All
724 </ul>
725 <td>
726 <table>
727 <tr><th>
728 <tr><td>FLOAT16
729 <tr><td>FLOAT32
730 </table>
731<tr>
732 <td>GpuAcc
733 <td>
734 <ul>
735 <li>All
736 </ul>
737 <td>
738 <table>
739 <tr><th>
740 <tr><td>FLOAT16
741 <tr><td>FLOAT32
742 </table>
743<tr>
744 <td rowspan="3">Convolution2dLayer
745 <td rowspan="3" style="width:200px;"> Layer to compute a convolution operation.
746 <td rowspan="3">
747 <ul>
748 <li>ANEURALNETWORKS_CONV_2D
749 <li>ANEURALNETWORKS_GROUPED_CONV_2D
750 </ul>
751 <td>CpuRef
752 <td>
753 <ul>
754 <li>All
755 </ul>
756 <td>
757 <table>
758 <tr><th>
759 <tr><td>BFLOAT16
760 <tr><td>FLOAT16
761 <tr><td>FLOAT32
762 <tr><td>QASYMMS8
763 <tr><td>QASYMMU8
764 <tr><td>QSYMMS16
765 </table>
766<tr>
767 <td>CpuAcc
768 <td>
769 <ul>
770 <li>NHWC
771 <li>NCHW
772 </ul>
773 <td>
774 <table>
775 <tr><th>
776 <tr><td>SIGNED32
777 <tr><td>FLOAT16
778 <tr><td>FLOAT32
779 <tr><td>QASYMMU8
780 <tr><td>QASYMMS8
781 <tr><td>QUANTIZEDSYMM8PERAXIS
782 </table>
783<tr>
784 <td>GpuAcc
785 <td>
786 <ul>
787 <li>NHWC
788 <li>NCHW
789 </ul>
790 <td>
791 <table>
792 <tr><th>
793 <tr><td>SIGNED32
794 <tr><td>FLOAT16
795 <tr><td>FLOAT32
796 <tr><td>QASYMMU8
797 <tr><td>QASYMMS8
798 <tr><td>QUANTIZEDSYMM8PERAXIS
799 </table>
800<tr>
Matthew Sloyanb63a3112021-09-08 13:05:51 +0100[diff] [blame]801 <td rowspan="3">Convolution3dLayer
802 <td rowspan="3" style="width:200px;"> Layer to compute a 3D convolution operation.
803 <td rowspan="3">
804 <ul>
805 <li>N/A
806 </ul>
807 <td>CpuRef
808 <td>
809 <ul>
810 <li>NDHWC
811 </ul>
812 <td>
813 <table>
814 <tr><th>
815 <tr><td>BFLOAT16
816 <tr><td>FLOAT16
817 <tr><td>FLOAT32
818 <tr><td>QASYMMS8
819 <tr><td>QASYMMU8
820 <tr><td>QSYMMS8
821 <tr><td>QSYMMS16
822 </table>
823<tr>
824 <td>CpuAcc
825 <td>
826 <ul>
827 <li>N/A
828 </ul>
829 <td>
830 <ul>
831 <li>N/A
832 </ul>
833<tr>
834 <td>GpuAcc
835 <td>
836 <ul>
837 <li>N/A
838 </ul>
839 <td>
840 <ul>
841 <li>N/A
842 </ul>
843<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]844 <td rowspan="1">DebugLayer
845 <td rowspan="1" style="width:200px;"> Layer to print out inter layer tensor information.
846 <td rowspan="1">
847 <ul>
848 <li>N/A
849 </ul>
850 <td>CpuRef
851 <td>
852 <ul>
853 <li>All
854 </ul>
855 <td>
856 <table>
857 <tr><th>
858 <tr><td>BFLOAT16
859 <tr><td>FLOAT16
860 <tr><td>FLOAT32
861 <tr><td>QASYMMS8
862 <tr><td>QASYMMU8
863 <tr><td>QSYMMS8
864 <tr><td>QSYMMS16
865 <tr><td>SIGNED32
866 </table>
867<tr>
868 <td rowspan="3">DepthToSpaceLayer
869 <td rowspan="3" style="width:200px;"> Layer to perform Depth to Space transformation.
870 <td rowspan="3">
871 <ul>
872 <li>ANEURALNETWORKS_DEPTH_TO_SPACE
873 </ul>
874 <td>CpuRef
875 <td>
876 <ul>
877 <li>All
878 </ul>
879 <td>
880 <table>
881 <tr><th>
882 <tr><td>BFLOAT16
883 <tr><td>FLOAT16
884 <tr><td>FLOAT32
885 <tr><td>QASYMMS8
886 <tr><td>QASYMMU8
887 <tr><td>QSYMMS16
888 </table>
889<tr>
890 <td>CpuAcc
891 <td>
892 <ul>
893 <li>NHWC
894 <li>NCHW
895 </ul>
896 <td>
897 <table>
898 <tr><th>
899 <tr><td>All
900 </table>
901<tr>
902 <td>GpuAcc
903 <td>
904 <ul>
905 <li>NHWC
906 <li>NCHW
907 </ul>
908 <td>
909 <table>
910 <tr><th>
911 <tr><td>All
912 </table>
913<tr>
914 <td rowspan="3">DepthwiseConvolution2dLayer
915 <td rowspan="3" style="width:200px;"> Layer to compute a deconvolution or transpose convolution.
916 <td rowspan="3">
917 <ul>
918 <li>ANEURALNETWORKS_DEPTHWISE_CONV_2D
919 </ul>
920 <td>CpuRef
921 <td>
922 <ul>
923 <li>All
924 </ul>
925 <td>
926 <table>
927 <tr><th>
928 <tr><td>BFLOAT16
929 <tr><td>FLOAT16
930 <tr><td>FLOAT32
931 <tr><td>QASYMMS8
932 <tr><td>QASYMMU8
933 <tr><td>QSYMMS8
934 <tr><td>QSYMMS16
935 </table>
936<tr>
937 <td>CpuAcc
938 <td>
939 <ul>
940 <li>NHWC
941 <li>NCHW
942 </ul>
943 <td>
944 <table>
945 <tr><th>
946 <tr><td>FLOAT16
947 <tr><td>FLOAT32
948 <tr><td>SIGNED32
949 <tr><td>QASYMMU8
950 <tr><td>QASYMMS8
951 <tr><td>QUANTIZEDSYMM8PERAXIS
952 </table>
953<tr>
954 <td>GpuAcc
955 <td>
956 <ul>
957 <li>NHWC
958 <li>NCHW
959 </ul>
960 <td>
961 <table>
962 <tr><th>
963 <tr><td>FLOAT16
964 <tr><td>FLOAT32
965 <tr><td>SIGNED32
966 <tr><td>QASYMMU8
967 <tr><td>QASYMMS8
968 <tr><td>QUANTIZEDSYMM8PERAXIS
969 </table>
970<tr>
971 <td rowspan="3">DequantizeLayer
972 <td rowspan="3" style="width:200px;"> Layer to dequantize the values in a tensor.
973 <td rowspan="3">
974 <ul>
975 <li>ANEURALNETWORKS_DEQUANTIZE
976 </ul>
977 <td>CpuRef
978 <td>
979 <ul>
980 <li>All
981 </ul>
982 <td>
983 <table>
984 <tr><th>
985 <tr><td>QASYMMS8
986 <tr><td>QASYMMU8
987 <tr><td>QSYMMS8
988 <tr><td>QSYMMS16
989 </table>
990<tr>
991 <td>CpuAcc
992 <td>
993 <ul>
994 <li>All
995 </ul>
996 <td>
997 <table>
998 <tr><th>
999 <tr><td>FLOAT16
1000 <tr><td>FLOAT32
1001 <tr><td>QASYMMU8
1002 <tr><td>QASYMMS8
1003 <tr><td>QUANTIZEDSYMM8PERAXIS
1004 <tr><td>QSYMMS8
1005 <tr><td>QSYMMS16
1006 </table>
1007<tr>
1008 <td>GpuAcc
1009 <td>
1010 <ul>
1011 <li>All
1012 </ul>
1013 <td>
1014 <table>
1015 <tr><th>
1016 <tr><td>FLOAT16
1017 <tr><td>FLOAT32
1018 <tr><td>QASYMMU8
1019 <tr><td>QASYMMS8
1020 <tr><td>QUANTIZEDSYMM8PERAXIS
1021 <tr><td>QSYMMS8
1022 <tr><td>QSYMMS16
1023 </table>
1024<tr>
1025 <td rowspan="2">DetectionPostProcessLayer
1026 <td rowspan="2" style="width:200px;"> Layer to generate the detection output based on center size encoded boxes, class prediction and anchors by doing non maximum suppression (NMS).
1027 <td rowspan="2">
1028 <ul>
1029 <li>ANEURALNETWORKS_DETECTION_POSTPROCESSING
1030 </ul>
1031 <td>CpuRef
1032 <td>
1033 <ul>
1034 <li>All
1035 </ul>
1036 <td>
1037 <table>
1038 <tr><th>
1039 <tr><td>BFLOAT16
1040 <tr><td>FLOAT16
1041 <tr><td>FLOAT32
1042 <tr><td>QASYMMS8
1043 <tr><td>QASYMMU8
1044 <tr><td>QSYMMS16
1045 </table>
1046<tr>
1047 <td>CpuAcc
1048 <td>
1049 <ul>
1050 <li>All
1051 </ul>
1052 <td>
1053 <table>
1054 <tr><th>
1055 <tr><td>QASYMMU8
1056 <tr><td>QASYMMS8
1057 <tr><td>FLOAT32
1058 </table>
1059<tr>
1060 <td rowspan="3">DivisionLayer
1061 <td rowspan="3" style="width:200px;"> Layer to divide 2 tensors.
1062 <td rowspan="3">
1063 <ul>
1064 <li>ANEURALNETWORKS_DIV
1065 </ul>
1066 <td>CpuRef
1067 <td>
1068 <ul>
1069 <li>All
1070 </ul>
1071 <td>
1072 <table>
1073 <tr><th>
1074 <tr><td>BFLOAT16
1075 <tr><td>FLOAT16
1076 <tr><td>FLOAT32
1077 <tr><td>QASYMMS8
1078 <tr><td>QASYMMU8
1079 <tr><td>QSYMMS16
1080 <tr><td>SIGNED32
1081 </table>
1082<tr>
1083 <td>CpuAcc
1084 <td>
1085 <ul>
1086 <li>All
1087 </ul>
1088 <td>
1089 <table>
1090 <tr><th>
1091 <tr><td>FLOAT16
1092 <tr><td>FLOAT32
1093 </table>
1094<tr>
1095 <td>GpuAcc
1096 <td>
1097 <ul>
1098 <li>All
1099 </ul>
1100 <td>
1101 <table>
1102 <tr><th>
1103 <tr><td>FLOAT16
1104 <tr><td>FLOAT32
1105 </table>
1106<tr>
1107 <td rowspan="3">ElementwiseBaseLayer
1108 <td rowspan="3" style="width:200px;"> Layer to perform Add - Div - Max - Min - Mul operations.
1109 <td rowspan="3">
1110 <ul>
1111 <li>ANEURALNETWORKS_ADD
1112 <li>ANEURALNETWORKS_DIV
1113 <li>ANEURALNETWORKS_MAXIMUM
1114 <li>ANEURALNETWORKS_MINIMUM
1115 <li>ANEURALNETWORKS_MUL
1116 </ul>
1117 <td>CpuRef
1118 <td>
1119 <ul>
1120 <li>All
1121 </ul>
1122 <td>
1123 <table>
1124 <tr><th>
1125 <tr><td>BFLOAT16
1126 <tr><td>FLOAT16
1127 <tr><td>FLOAT32
1128 <tr><td>QASYMMS8
1129 <tr><td>QASYMMU8
1130 <tr><td>QSYMMS16
1131 <tr><td>SIGNED32
1132 </table>
1133<tr>
1134 <td>CpuAcc
1135 <td>
1136 <ul>
1137 <li>All
1138 </ul>
1139 <td>
1140 <table>
1141 <tr><th>
1142 <tr><td>QASYMMU8
1143 <tr><td>QASYMMS8
1144 <tr><td>QSYMMS16
1145 <tr><td>SIGNED32
1146 <tr><td>FLOAT16
1147 <tr><td>FLOAT32
1148 </table>
1149<tr>
1150 <td>GpuAcc
1151 <td>
1152 <ul>
1153 <li>All
1154 </ul>
1155 <td>
1156 <table>
1157 <tr><th>
1158 <tr><td>QASYMMU8
1159 <tr><td>QASYMMS8
1160 <tr><td>QSYMMS16
1161 <tr><td>SIGNED32
1162 <tr><td>FLOAT16
1163 <tr><td>FLOAT32
1164 </table>
1165<tr>
1166 <td rowspan="3">ElementwiseUnaryLayer
1167 <td rowspan="3" style="width:200px;"> Layer to perform Rsqrt - Exp - Neg - Log - Abs - Sin - Sqrt operations.
1168 <td rowspan="3">
1169 <ul>
1170 <li>ANEURALNETWORKS_ABS
1171 <li>ANEURALNETWORKS_EXP
1172 <li>ANEURALNETWORKS_LOG
1173 <li>ANEURALNETWORKS_NEG
1174 <li>ANEURALNETWORKS_RSQRT
1175 <li>ANEURALNETWORKS_SIN
1176 <li>ANEURALNETWORKS_SQRT
1177 </ul>
1178 <td>CpuRef
1179 <td>
1180 <ul>
1181 <li>All
1182 </ul>
1183 <td>
1184 <table>
1185 <tr><th>
1186 <tr><td>BFLOAT16
1187 <tr><td>FLOAT16
1188 <tr><td>FLOAT32
1189 <tr><td>QASYMMS8
1190 <tr><td>QASYMMU8
1191 <tr><td>QSYMMS16
1192 </table>
1193<tr>
1194 <td>CpuAcc
1195 <td>
1196 <ul>
1197 <li>All
1198 </ul>
1199 <td>
1200 <table>
1201 <tr><th>
1202 <tr><td>FLOAT16
1203 <tr><td>FLOAT32
1204 <tr><td>SIGNED32
1205 </table>
1206<tr>
1207 <td>GpuAcc
1208 <td>
1209 <ul>
1210 <li>All
1211 </ul>
1212 <td>
1213 <table>
1214 <tr><th>
1215 <tr><td>FLOAT16
1216 <tr><td>FLOAT32
1217 </table>
1218<tr>
1219 <td rowspan="1">FakeQuantizationLayer
1220 <td rowspan="1" style="width:200px;"> Layer to quantize float values and dequantize afterwards. The current implementation does not dequantize the values.
1221 <td rowspan="1">
1222 <ul>
1223 <li>N/A
1224 </ul>
1225 <td>CpuRef
1226 <td>
1227 <ul>
1228 <li>All
1229 </ul>
1230 <td>
1231 <table>
1232 <tr><th>
1233 <tr><td>FLOAT32
1234 </table>
1235<tr>
1236 <td rowspan="3">FillLayer
1237 <td rowspan="3" style="width:200px;"> Layer to set the values of a tensor with a given value.
1238 <td rowspan="3">
1239 <ul>
1240 <li>ANEURALNETWORKS_FILL
1241 </ul>
1242 <td>CpuRef
1243 <td>
1244 <ul>
1245 <li>All
1246 </ul>
1247 <td>
1248 <table>
1249 <tr><th>
1250 <tr><td>FLOAT16
1251 <tr><td>FLOAT32
1252 <tr><td>SIGNED32
1253 </table>
1254<tr>
1255 <td>CpuAcc
1256 <td>
1257 <ul>
1258 <li>All
1259 </ul>
1260 <td>
1261 <table>
1262 <tr><th>
1263 <tr><td>All
1264 </table>
1265<tr>
1266 <td>GpuAcc
1267 <td>
1268 <ul>
1269 <li>All
1270 </ul>
1271 <td>
1272 <table>
1273 <tr><th>
1274 <tr><td>All
1275 </table>
1276<tr>
1277 <td rowspan="3">FloorLayer
1278 <td rowspan="3" style="width:200px;"> Layer to round the value to the lowest whole number.
1279 <td rowspan="3">
1280 <ul>
1281 <li>ANEURALNETWORKS_FLOOR
1282 </ul>
1283 <td>CpuRef
1284 <td>
1285 <ul>
1286 <li>All
1287 </ul>
1288 <td>
1289 <table>
1290 <tr><th>
1291 <tr><td>BFLOAT16
1292 <tr><td>FLOAT16
1293 <tr><td>FLOAT32
1294 </table>
1295<tr>
1296 <td>CpuAcc
1297 <td>
1298 <ul>
1299 <li>All
1300 </ul>
1301 <td>
1302 <table>
1303 <tr><th>
1304 <tr><td>FLOAT32
1305 <tr><td>FLOAT16
1306 </table>
1307<tr>
1308 <td>GpuAcc
1309 <td>
1310 <ul>
1311 <li>All
1312 </ul>
1313 <td>
1314 <table>
1315 <tr><th>
1316 <tr><td>FLOAT32
1317 <tr><td>FLOAT16
1318 </table>
1319<tr>
1320 <td rowspan="3">FullyConnectedLayer
1321 <td rowspan="3" style="width:200px;"> Layer to perform a fully connected / dense operation.
1322 <td rowspan="3">
1323 <ul>
1324 <li>ANEURALNETWORKS_FULLY_CONNECTED
1325 </ul>
1326 <td>CpuRef
1327 <td>
1328 <ul>
1329 <li>All
1330 </ul>
1331 <td>
1332 <table>
1333 <tr><th>
1334 <tr><td>BFLOAT16
1335 <tr><td>FLOAT16
1336 <tr><td>FLOAT32
1337 <tr><td>QASYMMS8
1338 <tr><td>QASYMMU8
1339 <tr><td>QSYMMS16
1340 </table>
1341<tr>
1342 <td>CpuAcc
1343 <td>
1344 <ul>
1345 <li>NHWC
1346 <li>NCHW
1347 </ul>
1348 <td>
1349 <table>
1350 <tr><th>
1351 <tr><td>SIGNED32
1352 <tr><td>FLOAT16
1353 <tr><td>FLOAT32
1354 <tr><td>QASYMMU8
1355 <tr><td>QASYMMS8
1356 </table>
1357<tr>
1358 <td>GpuAcc
1359 <td>
1360 <ul>
1361 <li>NHWC
1362 <li>NCHW
1363 </ul>
1364 <td>
1365 <table>
1366 <tr><th>
1367 <tr><td>SIGNED32
1368 <tr><td>FLOAT16
1369 <tr><td>FLOAT32
1370 <tr><td>QASYMMU8
1371 <tr><td>QASYMMS8
1372 </table>
1373<tr>
1374 <td rowspan="3">GatherLayer
1375 <td rowspan="3" style="width:200px;"> Layer to perform the gather operation along the chosen axis.
1376 <td rowspan="3">
1377 <ul>
1378 <li>ANEURALNETWORKS_GATHER
1379 </ul>
1380 <td>CpuRef
1381 <td>
1382 <ul>
1383 <li>All
1384 </ul>
1385 <td>
1386 <table>
1387 <tr><th>
1388 <tr><td>BFLOAT16
1389 <tr><td>FLOAT16
1390 <tr><td>FLOAT32
1391 <tr><td>QASYMMS8
1392 <tr><td>QASYMMU8
1393 <tr><td>QSYMMS16
1394 <tr><td>SIGNED32
1395 </table>
1396<tr>
1397 <td>CpuAcc
1398 <td>
1399 <ul>
1400 <li>All
1401 </ul>
1402 <td>
1403 <table>
1404 <tr><th>
1405 <tr><td>All
1406 </table>
1407<tr>
1408 <td>GpuAcc
1409 <td>
1410 <ul>
1411 <li>All
1412 </ul>
1413 <td>
1414 <table>
1415 <tr><th>
1416 <tr><td>All
1417 </table>
1418<tr>
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1419 <td rowspan="3">GatherNdLayer
1420 <td rowspan="3" style="width:200px;"> Layer to perform the gatherNd operation.
1421 <td rowspan="3">
1422 <ul>
1423 <li>N/A
1424 </ul>
1425 <td>CpuRef
1426 <td>
1427 <ul>
1428 <li>All
1429 </ul>
1430 <td>
1431 <table>
1432 <tr><th>
1433 <tr><td>BFLOAT16
1434 <tr><td>FLOAT16
1435 <tr><td>FLOAT32
1436 <tr><td>QASYMMS8
1437 <tr><td>QASYMMU8
1438 <tr><td>QSYMMS16
1439 <tr><td>SIGNED32
1440 </table>
1441<tr>
1442 <td>CpuAcc
1443 <td>
1444 <ul>
Teresa Charlinbd22c7d2022-04-26 18:14:12 +0100[diff] [blame]1445 <li>All
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1446 </ul>
1447 <td>
Teresa Charlinbd22c7d2022-04-26 18:14:12 +0100[diff] [blame]1448 <table>
1449 <tr><th>
1450 <tr><td>BFLOAT16
1451 <tr><td>FLOAT16
1452 <tr><td>FLOAT32
1453 <tr><td>QASYMMS8
1454 <tr><td>QASYMMU8
1455 <tr><td>QSYMMS16
1456 <tr><td>SIGNED32
1457 </table>
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1458<tr>
1459 <td>GpuAcc
1460 <td>
1461 <ul>
Teresa Charlin989e2f62022-04-27 16:26:11 +0100[diff] [blame]1462 <li>All
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1463 </ul>
1464 <td>
Teresa Charlin989e2f62022-04-27 16:26:11 +0100[diff] [blame]1465 <table>
1466 <tr><th>
1467 <tr><td>BFLOAT16
1468 <tr><td>FLOAT16
1469 <tr><td>FLOAT32
1470 <tr><td>QASYMMS8
1471 <tr><td>QASYMMU8
1472 <tr><td>QSYMMS16
1473 <tr><td>SIGNED32
1474 </table>
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1475<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]1476 <td rowspan="1">InputLayer
1477 <td rowspan="1" style="width:200px;"> Special layer used to provide input data to the computational network.
1478 <td rowspan="1">
1479 <ul>
1480 <li>N/A
1481 </ul>
1482 <td>All
1483 <td>
1484 <ul>
1485 <li>All
1486 </ul>
1487 <td>
1488 <table>
1489 <tr><th>
1490 <tr><td>All
1491 </table>
1492<tr>
1493 <td rowspan="3">InstanceNormalizationLayer
1494 <td rowspan="3" style="width:200px;"> Layer to perform an instance normalization on a given axis.
1495 <td rowspan="3">
1496 <ul>
1497 <li>ANEURALNETWORKS_INSTANCE_NORMALIZATION
1498 </ul>
1499 <td>CpuRef
1500 <td>
1501 <ul>
1502 <li>All
1503 </ul>
1504 <td>
1505 <table>
1506 <tr><th>
1507 <tr><td>BFLOAT16
1508 <tr><td>FLOAT16
1509 <tr><td>FLOAT32
1510 </table>
1511<tr>
1512 <td>CpuAcc
1513 <td>
1514 <ul>
1515 <li>NHWC
1516 <li>NCHW
1517 </ul>
1518 <td>
1519 <table>
1520 <tr><th>
1521 <tr><td>FLOAT16
1522 <tr><td>FLOAT32
1523 </table>
1524<tr>
1525 <td>GpuAcc
1526 <td>
1527 <ul>
1528 <li>NHWC
1529 <li>NCHW
1530 </ul>
1531 <td>
1532 <table>
1533 <tr><th>
1534 <tr><td>FLOAT16
1535 <tr><td>FLOAT32
1536 </table>
1537<tr>
1538 <td rowspan="3">L2NormalizationLayer
1539 <td rowspan="3" style="width:200px;"> Layer to perform an L2 normalization on a given axis.
1540 <td rowspan="3">
1541 <ul>
1542 <li>ANEURALNETWORKS_L2_NORMALIZATION
1543 </ul>
1544 <td>CpuRef
1545 <td>
1546 <ul>
1547 <li>All
1548 </ul>
1549 <td>
1550 <table>
1551 <tr><th>
1552 <tr><td>BFLOAT16
1553 <tr><td>FLOAT16
1554 <tr><td>FLOAT32
1555 <tr><td>QASYMMS8
1556 <tr><td>QASYMMU8
1557 <tr><td>QSYMMS16
1558 </table>
1559<tr>
1560 <td>CpuAcc
1561 <td>
1562 <ul>
1563 <li>NHWC
1564 <li>NCHW
1565 </ul>
1566 <td>
1567 <table>
1568 <tr><th>
1569 <tr><td>FLOAT16
1570 <tr><td>FLOAT32
1571 </table>
1572<tr>
1573 <td>GpuAcc
1574 <td>
1575 <ul>
1576 <li>NHWC
1577 <li>NCHW
1578 </ul>
1579 <td>
1580 <table>
1581 <tr><th>
1582 <tr><td>FLOAT16
1583 <tr><td>FLOAT32
1584 </table>
1585<tr>
1586 <td rowspan="3">LogSoftmaxLayer
1587 <td rowspan="3" style="width:200px;"> Layer to perform the log softmax activations given logits.
1588 <td rowspan="3">
1589 <ul>
1590 <li>N/A
1591 </ul>
1592 <td>CpuRef
1593 <td>
1594 <ul>
1595 <li>All
1596 </ul>
1597 <td>
1598 <table>
1599 <tr><th>
1600 <tr><td>BFLOAT16
1601 <tr><td>FLOAT16
1602 <tr><td>FLOAT32
1603 </table>
1604<tr>
1605 <td>CpuAcc
1606 <td>
1607 <ul>
1608 <li>All
1609 </ul>
1610 <td>
1611 <table>
1612 <tr><th>
1613 <tr><td>QASYMMU8
1614 <tr><td>QASYMMS8
1615 <tr><td>FLOAT16
1616 <tr><td>FLOAT32
1617 </table>
1618<tr>
1619 <td>GpuAcc
1620 <td>
1621 <ul>
1622 <li>All
1623 </ul>
1624 <td>
1625 <table>
1626 <tr><th>
1627 <tr><td>QASYMMU8
1628 <tr><td>QASYMMS8
1629 <tr><td>FLOAT16
1630 <tr><td>FLOAT32
1631 </table>
1632<tr>
1633 <td rowspan="3">LogicalBinaryLayer
1634 <td rowspan="3" style="width:200px;"> Layer to perform Logical AND - Logical NOT - Logical OR operations.
1635 <td rowspan="3">
1636 <ul>
1637 <li>ANEURALNETWORKS_LOGICAL_AND
1638 <li>ANEURALNETWORKS_LOGICAL_NOT
1639 <li>ANEURALNETWORKS_LOGICAL_OR
1640 </ul>
1641 <td>CpuRef
1642 <td>
1643 <ul>
1644 <li>All
1645 </ul>
1646 <td>
1647 <table>
1648 <tr><th>
1649 <tr><td>BOOLEAN
1650 </table>
1651<tr>
1652 <td>CpuAcc
1653 <td>
1654 <ul>
1655 <li>All
1656 </ul>
1657 <td>
1658 <table>
1659 <tr><th>
1660 <tr><td>BOOLEAN
1661 </table>
1662<tr>
1663 <td>GpuAcc
1664 <td>
1665 <ul>
1666 <li>All
1667 </ul>
1668 <td>
1669 <table>
1670 <tr><th>
1671 <tr><td>BOOLEAN
1672 </table>
1673<tr>
1674 <td rowspan="3">LstmLayer
1675 <td rowspan="3" style="width:200px;"> Layer to perform a single time step in a Long Short-Term Memory (LSTM) operation.
1676 <td rowspan="3">
1677 <ul>
1678 <li>ANEURALNETWORKS_LSTM
1679 </ul>
1680 <td>CpuRef
1681 <td>
1682 <ul>
1683 <li>All
1684 </ul>
1685 <td>
1686 <table>
1687 <tr><th>
1688 <tr><td>BFLOAT16
1689 <tr><td>FLOAT16
1690 <tr><td>QSYMMS16
1691 </table>
1692<tr>
1693 <td>CpuAcc
1694 <td>
1695 <ul>
1696 <li>All
1697 </ul>
1698 <td>
1699 <table>
1700 <tr><th>
1701 <tr><td>FLOAT16
1702 <tr><td>FLOAT32
1703 </table>
1704<tr>
1705 <td>GpuAcc
1706 <td>
1707 <ul>
1708 <li>All
1709 </ul>
1710 <td>
1711 <table>
1712 <tr><th>
1713 <tr><td>FLOAT16
1714 <tr><td>FLOAT32
1715 </table>
1716<tr>
1717 <td rowspan="3">MapLayer
1718 <td rowspan="3" style="width:200px;"> Layer to perform map operation on tensor.
1719 <td rowspan="3">
1720 <ul>
1721 <li>N/A
1722 </ul>
1723 <td>CpuRef
1724 <td>
1725 <ul>
1726 <li>All
1727 </ul>
1728 <td>
1729 <table>
1730 <tr><th>
1731 <tr><td>All
1732 </table>
1733<tr>
1734 <td>CpuAcc
1735 <td>
1736 <ul>
1737 <li>All
1738 </ul>
1739 <td>
1740 <table>
1741 <tr><th>
1742 <tr><td>All
1743 </table>
1744<tr>
1745 <td>GpuAcc
1746 <td>
1747 <ul>
1748 <li>All
1749 </ul>
1750 <td>
1751 <table>
1752 <tr><th>
1753 <tr><td>All
1754 </table>
1755<tr>
1756 <td rowspan="3">MaximumLayer
1757 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise maximum of two tensors.
1758 <td rowspan="3">
1759 <ul>
1760 <li>N/A
1761 </ul>
1762 <td>CpuRef
1763 <td>
1764 <ul>
1765 <li>All
1766 </ul>
1767 <td>
1768 <table>
1769 <tr><th>
1770 <tr><td>BFLOAT16
1771 <tr><td>FLOAT16
1772 <tr><td>FLOAT32
1773 <tr><td>QASYMMS8
1774 <tr><td>QASYMMU8
1775 <tr><td>QSYMMS16
1776 <tr><td>SIGNED32
1777 </table>
1778<tr>
1779 <td>CpuAcc
1780 <td>
1781 <ul>
1782 <li>All
1783 </ul>
1784 <td>
1785 <table>
1786 <tr><th>
1787 <tr><td>QASYMMU8
1788 <tr><td>QASYMMS8
1789 <tr><td>FLOAT16
1790 <tr><td>FLOAT32
1791 <tr><td>SIGNED32
1792 </table>
1793<tr>
1794 <td>GpuAcc
1795 <td>
1796 <ul>
1797 <li>All
1798 </ul>
1799 <td>
1800 <table>
1801 <tr><th>
1802 <tr><td>QASYMMU8
1803 <tr><td>QASYMMS8
1804 <tr><td>QSYMMS16
1805 <tr><td>FLOAT16
1806 <tr><td>FLOAT32
1807 <tr><td>SIGNED32
1808 </table>
1809<tr>
1810 <td rowspan="3">MeanLayer
1811 <td rowspan="3" style="width:200px;"> Layer to perform reduce mean operation.
1812 <td rowspan="3">
1813 <ul>
1814 <li>ANEURALNETWORKS_MEAN
1815 </ul>
1816 <td>CpuRef
1817 <td>
1818 <ul>
1819 <li>All
1820 </ul>
1821 <td>
1822 <table>
1823 <tr><th>
1824 <tr><td>BFLOAT16
1825 <tr><td>FLOAT16
1826 <tr><td>FLOAT32
1827 <tr><td>QASYMMS8
1828 <tr><td>QASYMMU8
1829 <tr><td>QSYMMS16
1830 </table>
1831<tr>
1832 <td>CpuAcc
1833 <td>
1834 <ul>
1835 <li>All
1836 </ul>
1837 <td>
1838 <table>
1839 <tr><th>
1840 <tr><td>QASYMMU8
1841 <tr><td>QASYMMS8
1842 <tr><td>FLOAT16
1843 <tr><td>FLOAT32
1844 </table>
1845<tr>
1846 <td>GpuAcc
1847 <td>
1848 <ul>
1849 <li>All
1850 </ul>
1851 <td>
1852 <table>
1853 <tr><th>
1854 <tr><td>QASYMMU8
1855 <tr><td>QASYMMS8
1856 <tr><td>FLOAT16
1857 <tr><td>FLOAT32
1858 </table>
1859<tr>
1860 <td rowspan="3">MemCopyLayer
1861 <td rowspan="3" style="width:200px;"> Layer to perform memory copy operation.
1862 <td rowspan="3">
1863 <ul>
1864 <li>N/A
1865 </ul>
1866 <td>CpuRef
1867 <td>
1868 <ul>
1869 <li>All
1870 </ul>
1871 <td>
1872 <table>
1873 <tr><th>
1874 <tr><td>BFLOAT16
1875 <tr><td>FLOAT16
1876 <tr><td>FLOAT32
1877 <tr><td>QASYMMS8
1878 <tr><td>QASYMMU8
1879 <tr><td>QSYMMS16
1880 <tr><td>BOOLEAN
1881 </table>
1882<tr>
1883 <td>CpuAcc
1884 <td>
1885 <ul>
1886 <li>All
1887 </ul>
1888 <td>
1889 <table>
1890 <tr><th>
1891 <tr><td>All
1892 </table>
1893<tr>
1894 <td>GpuAcc
1895 <td>
1896 <ul>
1897 <li>All
1898 </ul>
1899 <td>
1900 <table>
1901 <tr><th>
1902 <tr><td>All
1903 </table>
1904<tr>
1905 <td rowspan="3">MemImportLayer
1906 <td rowspan="3" style="width:200px;"> Layer to perform memory import operation.
1907 <td rowspan="3">
1908 <ul>
1909 <li>N/A
1910 </ul>
1911 <td>CpuRef
1912 <td>
1913 <ul>
1914 <li>All
1915 </ul>
1916 <td>
1917 <table>
1918 <tr><th>
1919 <tr><td>All
1920 </table>
1921<tr>
1922 <td>CpuAcc
1923 <td>
1924 <ul>
1925 <li>All
1926 </ul>
1927 <td>
1928 <table>
1929 <tr><th>
1930 <tr><td>All
1931 </table>
1932<tr>
1933 <td>GpuAcc
1934 <td>
1935 <ul>
1936 <li>All
1937 </ul>
1938 <td>
1939 <table>
1940 <tr><th>
1941 <tr><td>All
1942 </table>
1943<tr>
1944 <td rowspan="3">MergeLayer
1945 <td rowspan="3" style="width:200px;"> Layer to concatenate tensors along a given axis.
1946 <td rowspan="3">
1947 <ul>
1948 <li>ANEURALNETWORKS_CONCATENATION
1949 </ul>
1950 <td>CpuRef
1951 <td>
1952 <ul>
1953 <li>All
1954 </ul>
1955 <td>
1956 <table>
1957 <tr><th>
1958 <tr><td>BFLOAT16
1959 <tr><td>FLOAT16
1960 <tr><td>FLOAT32
1961 <tr><td>QASYMMS8
1962 <tr><td>QASYMMU8
1963 <tr><td>QSYMMS16
1964 </table>
1965<tr>
1966 <td>CpuAcc
1967 <td>
1968 <ul>
1969 <li>All
1970 </ul>
1971 <td>
1972 <table>
1973 <tr><th>
1974 <tr><td>QASYMMU8
1975 <tr><td>QASYMMS8
1976 <tr><td>FLOAT16
1977 <tr><td>FLOAT32
1978 </table>
1979<tr>
1980 <td>GpuAcc
1981 <td>
1982 <ul>
1983 <li>All
1984 </ul>
1985 <td>
1986 <table>
1987 <tr><th>
1988 <tr><td>QASYMMU8
1989 <tr><td>QASYMMS8
1990 <tr><td>FLOAT16
1991 <tr><td>FLOAT32
1992 </table>
1993<tr>
1994 <td rowspan="3">MinimumLayer
1995 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise minimum of two tensors.
1996 <td rowspan="3">
1997 <ul>
1998 <li>ANEURALNETWORKS_MINIMUM
1999 </ul>
2000 <td>CpuRef
2001 <td>
2002 <ul>
2003 <li>All
2004 </ul>
2005 <td>
2006 <table>
2007 <tr><th>
2008 <tr><td>BFLOAT16
2009 <tr><td>FLOAT16
2010 <tr><td>FLOAT32
2011 <tr><td>QASYMMS8
2012 <tr><td>QASYMMU8
2013 <tr><td>QSYMMS16
2014 <tr><td>SIGNED32
2015 </table>
2016<tr>
2017 <td>CpuAcc
2018 <td>
2019 <ul>
2020 <li>All
2021 </ul>
2022 <td>
2023 <table>
2024 <tr><th>
2025 <tr><td>QASYMMU8
2026 <tr><td>QASYMMS8
2027 <tr><td>QSYMMS16
2028 <tr><td>FLOAT16
2029 <tr><td>FLOAT32
2030 </table>
2031<tr>
2032 <td>GpuAcc
2033 <td>
2034 <ul>
2035 <li>All
2036 </ul>
2037 <td>
2038 <table>
2039 <tr><th>
2040 <tr><td>QASYMMU8
2041 <tr><td>QASYMMS8
2042 <tr><td>QSYMMS16
2043 <tr><td>FLOAT16
2044 <tr><td>FLOAT32
2045 <tr><td>SIGNED32
2046 </table>
2047<tr>
2048 <td rowspan="3">MultiplicationLayer
2049 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise multiplication of two tensors.
2050 <td rowspan="3">
2051 <ul>
2052 <li>ANEURALNETWORKS_MUL
2053 </ul>
2054 <td>CpuRef
2055 <td>
2056 <ul>
2057 <li>All
2058 </ul>
2059 <td>
2060 <table>
2061 <tr><th>
2062 <tr><td>BFLOAT16
2063 <tr><td>FLOAT16
2064 <tr><td>FLOAT32
2065 <tr><td>QASYMMS8
2066 <tr><td>QASYMMU8
2067 <tr><td>QSYMMS16
2068 <tr><td>SIGNED32
2069 </table>
2070<tr>
2071 <td>CpuAcc
2072 <td>
2073 <ul>
2074 <li>All
2075 </ul>
2076 <td>
2077 <table>
2078 <tr><th>
2079 <tr><td>QASYMMU8
2080 <tr><td>QASYMMS8
2081 <tr><td>QSYMMS16
2082 <tr><td>SIGNED32
2083 <tr><td>FLOAT16
2084 <tr><td>FLOAT32
2085 </table>
2086<tr>
2087 <td>GpuAcc
2088 <td>
2089 <ul>
2090 <li>All
2091 </ul>
2092 <td>
2093 <table>
2094 <tr><th>
2095 <tr><td>QASYMMU8
2096 <tr><td>QASYMMS8
2097 <tr><td>QSYMMS16
2098 <tr><td>SIGNED32
2099 <tr><td>FLOAT16
2100 <tr><td>FLOAT32
2101 <tr><td>SIGNED32
2102 </table>
2103<tr>
2104 <td rowspan="3">NormalizationLayer
2105 <td rowspan="3" style="width:200px;"> Layer to compute normalization operation.
2106 <td rowspan="3">
2107 <ul>
2108 <li>ANEURALNETWORKS_LOCAL_RESPONSE_NORMALIZATION
2109 </ul>
2110 <td>CpuRef
2111 <td>
2112 <ul>
2113 <li>All
2114 </ul>
2115 <td>
2116 <table>
2117 <tr><th>
2118 <tr><td>BFLOAT16
2119 <tr><td>FLOAT16
2120 <tr><td>FLOAT32
2121 <tr><td>QASYMMS8
2122 <tr><td>QASYMMU8
2123 <tr><td>QSYMMS16
2124 </table>
2125<tr>
2126 <td>CpuAcc
2127 <td>
2128 <ul>
2129 <li>NHWC
2130 <li>NCHW
2131 </ul>
2132 <td>
2133 <table>
2134 <tr><th>
2135 <tr><td>FLOAT32
2136 <tr><td>FLOAT16
2137 </table>
2138<tr>
2139 <td>GpuAcc
2140 <td>
2141 <ul>
2142 <li>NHWC
2143 <li>NCHW
2144 </ul>
2145 <td>
2146 <table>
2147 <tr><th>
2148 <tr><td>FLOAT32
2149 <tr><td>FLOAT16
2150 </table>
2151<tr>
2152 <td rowspan="1">OutputLayer
2153 <td rowspan="1" style="width:200px;"> A special layer providing access to a user supplied buffer into which the output of a network can be written.
2154 <td rowspan="1">
2155 <ul>
2156 <li>N/A
2157 </ul>
2158 <td>All
2159 <td>
2160 <ul>
2161 <li>All
2162 </ul>
2163 <td>
2164 <table>
2165 <tr><th>
2166 <tr><td>All
2167 </table>
2168<tr>
2169 <td rowspan="3">PadLayer
2170 <td rowspan="3" style="width:200px;"> Layer to pad a tensor.
2171 <td rowspan="3">
2172 <ul>
2173 <li>ANEURALNETWORKS_PAD
2174 <li>ANEURALNETWORKS_PAD_V2
2175 </ul>
2176 <td>CpuRef
2177 <td>
2178 <ul>
2179 <li>All
2180 </ul>
2181 <td>
2182 <table>
2183 <tr><th>
2184 <tr><td>BFLOAT16
2185 <tr><td>FLOAT16
2186 <tr><td>FLOAT32
2187 <tr><td>QASYMMS8
2188 <tr><td>QASYMMU8
2189 <tr><td>QSYMMS16
2190 </table>
2191<tr>
2192 <td>CpuAcc
2193 <td>
2194 <ul>
2195 <li>NHWC
2196 <li>NCHW
2197 </ul>
2198 <td>
2199 <table>
2200 <tr><th>
2201 <tr><td>All
2202 </table>
2203<tr>
2204 <td>GpuAcc
2205 <td>
2206 <ul>
2207 <li>NHWC
2208 <li>NCHW
2209 </ul>
2210 <td>
2211 <table>
2212 <tr><th>
2213 <tr><td>All
2214 </table>
2215<tr>
2216 <td rowspan="3">PermuteLayer
2217 <td rowspan="3" style="width:200px;"> Layer to transpose an ND tensor.
2218 <td rowspan="3">
2219 <ul>
2220 <li>ANEURALNETWORKS_TRANSPOSE
2221 </ul>
2222 <td>CpuRef
2223 <td>
2224 <ul>
2225 <li>All
2226 </ul>
2227 <td>
2228 <table>
2229 <tr><th>
2230 <tr><td>BFLOAT16
2231 <tr><td>FLOAT16
2232 <tr><td>FLOAT32
2233 <tr><td>QASYMMS8
2234 <tr><td>QASYMMU8
2235 <tr><td>QSYMMS16
2236 </table>
2237<tr>
2238 <td>CpuAcc
2239 <td>
2240 <ul>
2241 <li>NHWC
2242 <li>NCHW
2243 </ul>
2244 <td>
2245 <table>
2246 <tr><th>
2247 <tr><td>All
2248 </table>
2249<tr>
2250 <td>GpuAcc
2251 <td>
2252 <ul>
2253 <li>NHWC
2254 <li>NCHW
2255 </ul>
2256 <td>
2257 <table>
2258 <tr><th>
2259 <tr><td>All
2260 </table>
2261<tr>
2262 <td rowspan="3">Pooling2dLayer
Tamás Nyíri7b885b32021-10-26 14:47:57 +0100[diff] [blame]2263 <td rowspan="3" style="width:200px;"> Layer to perform 2D pooling with the specified pooling operation.
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2264 <td rowspan="3">
2265 <ul>
2266 <li>ANEURALNETWORKS_AVERAGE_POOL_2D
2267 <li>ANEURALNETWORKS_L2_POOL_2D
2268 <li>ANEURALNETWORKS_MAX_POOL_2D
2269 </ul>
2270 <td>CpuRef
2271 <td>
2272 <ul>
2273 <li>All
2274 </ul>
2275 <td>
2276 <table>
2277 <tr><th>
2278 <tr><td>BFLOAT16
2279 <tr><td>FLOAT16
2280 <tr><td>FLOAT32
2281 <tr><td>QASYMMS8
2282 <tr><td>QASYMMU8
2283 <tr><td>QSYMMS16
2284 </table>
2285<tr>
2286 <td>CpuAcc
2287 <td>
2288 <ul>
2289 <li>NHWC
2290 <li>NCHW
2291 </ul>
2292 <td>
2293 <table>
2294 <tr><th>
2295 <tr><td>QASYMMU8
2296 <tr><td>QASYMMS8
2297 <tr><td>FLOAT16
2298 <tr><td>FLOAT32
2299 </table>
2300<tr>
2301 <td>GpuAcc
2302 <td>
2303 <ul>
2304 <li>NHWC
2305 <li>NCHW
2306 </ul>
2307 <td>
2308 <table>
2309 <tr><th>
2310 <tr><td>QASYMMU8
2311 <tr><td>QASYMMS8
2312 <tr><td>FLOAT16
2313 <tr><td>FLOAT32
2314 </table>
2315<tr>
Tamás Nyíri7b885b32021-10-26 14:47:57 +0100[diff] [blame]2316 <td rowspan="3">Pooling3dLayer
2317 <td rowspan="3" style="width:200px;"> Layer to perform 3D pooling with the specified pooling operation.
2318 <td rowspan="3">
2319 <ul>
2320 <li>ANEURALNETWORKS_AVERAGE_POOL_3D
2321 <li>ANEURALNETWORKS_L2_POOL_3D
2322 <li>ANEURALNETWORKS_MAX_POOL_3D
2323 </ul>
2324 <td>CpuRef
2325 <td>
2326 <ul>
2327 <li>NDHWC
2328 </ul>
2329 <td>
2330 <table>
2331 <tr><th>
2332 <tr><td>BFLOAT16
2333 <tr><td>FLOAT16
2334 <tr><td>FLOAT32
2335 <tr><td>QASYMMS8
2336 <tr><td>QASYMMU8
2337 <tr><td>QSYMMS16
2338 </table>
2339<tr>
2340 <td>CpuAcc
2341 <td>
2342 <ul>
2343 <li>NA
2344 </ul>
2345 <td>
2346<tr>
2347 <td>GpuAcc
2348 <td>
2349 <ul>
2350 <li>NDHWC
2351 </ul>
2352<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2353 <td rowspan="1">PreCompiledLayer
2354 <td rowspan="1" style="width:200px;"> Opaque layer provided by a backend which provides an executable representation of a subgraph from the original network.
2355 <td rowspan="1">
2356 <ul>
2357 <li>N/A
2358 </ul>
2359 <td>N/A
2360 <td>N/A
2361 <td>N/A
2362<tr>
2363 <td rowspan="3">PreluLayer
2364 <td rowspan="3" style="width:200px;"> Layer to compute the activation layer with the PRELU activation function.
2365 <td rowspan="3">
2366 <ul>
2367 <li>ANEURALNETWORKS_PRELU
2368 </ul>
2369 <td>CpuRef
2370 <td>
2371 <ul>
2372 <li>All
2373 </ul>
2374 <td>
2375 <table>
2376 <tr><th>
2377 <tr><td>BFLOAT16
2378 <tr><td>FLOAT16
2379 <tr><td>FLOAT32
2380 <tr><td>QASYMMS8
2381 <tr><td>QASYMMU8
2382 <tr><td>QSYMMS16
2383 </table>
2384<tr>
2385 <td>CpuAcc
2386 <td>
2387 <ul>
2388 <li>All
2389 </ul>
2390 <td>
2391 <table>
2392 <tr><th>
2393 <tr><td>QASYMMU8
2394 <tr><td>QASYMMS8
2395 <tr><td>FLOAT16
2396 <tr><td>FLOAT32
2397 </table>
2398<tr>
2399 <td>GpuAcc
2400 <td>
2401 <ul>
2402 <li>All
2403 </ul>
2404 <td>
2405 <table>
2406 <tr><th>
2407 <tr><td>QASYMMU8
2408 <tr><td>QASYMMS8
2409 <tr><td>FLOAT16
2410 <tr><td>FLOAT32
2411 </table>
2412<tr>
2413 <td rowspan="3">QLstmLayer
2414 <td rowspan="3" style="width:200px;"> Layer to perform quantized LSTM (Long Short-Term Memory) operation.
2415 <td rowspan="3">
2416 <ul>
2417 <li>ANEURALNETWORKS_QUANTIZED_LSTM
2418 <li>ANEURALNETWORKS_QUANTIZED_16BIT_LSTM
2419 </ul>
2420 <td>CpuRef
2421 <td>
2422 <ul>
2423 <li>All
2424 </ul>
2425 <td>
2426 <table>
2427 <tr><th>
2428 <tr><td>All
2429 </table>
2430<tr>
2431 <td>CpuAcc
2432 <td>
2433 <ul>
2434 <li>All
2435 </ul>
2436 <td>
2437 <table>
2438 <tr><th>
2439 <tr><td>QASYMMS8
2440 <tr><td>QASYMMU8
2441 <tr><td>SIGNED32
2442 <tr><td>QSYMMS16
2443 </table>
2444<tr>
2445 <td>GpuAcc
2446 <td>
2447 <ul>
2448 <li>All
2449 </ul>
2450 <td>
2451 <table>
2452 <tr><th>
2453 <tr><td>QASYMMS8
2454 <tr><td>QASYMMU8
2455 <tr><td>SIGNED32
2456 <tr><td>QSYMMS16
2457 </table>
2458<tr>
2459 <td rowspan="3">QuantizeLayer
2460 <td rowspan="3" style="width:200px;"> Layer to perform quantization operation.
2461 <td rowspan="3">
2462 <ul>
2463 <li>ANEURALNETWORKS_QUANTIZE
2464 </ul>
2465 <td>CpuRef
2466 <td>
2467 <ul>
2468 <li>All
2469 </ul>
2470 <td>
2471 <table>
2472 <tr><th>
2473 <tr><td>BFLOAT16
2474 <tr><td>FLOAT16
2475 <tr><td>FLOAT32
2476 <tr><td>QASYMMS8
2477 <tr><td>QASYMMU8
2478 <tr><td>QSYMMS8
2479 <tr><td>QSYMMS16
2480 </table>
2481<tr>
2482 <td>CpuAcc
2483 <td>
2484 <ul>
2485 <li>All
2486 </ul>
2487 <td>
2488 <table>
2489 <tr><th>
2490 <tr><td>QASYMMU8
2491 <tr><td>QASYMMS8
2492 <tr><td>QASYMM16
2493 <tr><td>FLOAT16
2494 <tr><td>FLOAT32
2495 </table>
2496<tr>
2497 <td>GpuAcc
2498 <td>
2499 <ul>
2500 <li>All
2501 </ul>
2502 <td>
2503 <table>
2504 <tr><th>
2505 <tr><td>QASYMMU8
2506 <tr><td>QASYMMS8
2507 <tr><td>QASYMM16
2508 <tr><td>FLOAT16
2509 <tr><td>FLOAT32
2510 </table>
2511<tr>
2512 <td rowspan="3">QuantizedLstmLayer
2513 <td rowspan="3" style="width:200px;"> Layer to perform quantized LSTM (Long Short-Term Memory) operation.
2514 <td rowspan="3">
2515 <ul>
2516 <li>ANEURALNETWORKS_QUANTIZED_LSTM
2517 <li>ANEURALNETWORKS_QUANTIZED_16BIT_LSTM
2518 </ul>
2519 <td>CpuRef
2520 <td>
2521 <ul>
2522 <li>All
2523 </ul>
2524 <td>
2525 <table>
2526 <tr><th>
2527 <tr><td>All
2528 </table>
2529<tr>
2530 <td>CpuAcc
2531 <td>
2532 <ul>
2533 <li>All
2534 </ul>
2535 <td>
2536 <table>
2537 <tr><th>
2538 <tr><td>SIGNED32
2539 <tr><td>QASYMMU8
2540 <tr><td>QSYMMS16
2541 </table>
2542<tr>
2543 <td>GpuAcc
2544 <td>
2545 <ul>
2546 <li>All
2547 </ul>
2548 <td>
2549 <table>
2550 <tr><th>
2551 <tr><td>SIGNED32
2552 <tr><td>QASYMMU8
2553 <tr><td>QSYMMS16
2554 </table>
2555<tr>
2556 <td rowspan="3">RankLayer
2557 <td rowspan="3" style="width:200px;"> Layer to perform a rank operation.
2558 <td rowspan="3">
2559 <ul>
2560 <li>ANEURALNETWORKS_RANK
2561 </ul>
2562 <td>CpuRef
2563 <td>
2564 <ul>
2565 <li>All
2566 </ul>
2567 <td>
2568 <table>
2569 <tr><th>
2570 <tr><td>All
2571 </table>
2572<tr>
2573 <td>CpuAcc
2574 <td>
2575 <ul>
2576 <li>All
2577 </ul>
2578 <td>
2579 <table>
2580 <tr><th>
2581 <tr><td>All
2582 </table>
2583<tr>
2584 <td>GpuAcc
2585 <td>
2586 <ul>
2587 <li>All
2588 </ul>
2589 <td>
2590 <table>
2591 <tr><th>
2592 <tr><td>All
2593 </table>
2594<tr>
2595 <td rowspan="3">ReduceLayer
2596 <td rowspan="3" style="width:200px;"> Layer to perform reduce with the following operations - ARG_IDX_MAX: Index of the max value - ARG_IDX_MIN: Index of the min value - MEAN_SUM: Mean of sum - PROD: Product - SUM_SQUARE: Sum of squares - SUM: Sum - MIN: Min - MAX: Max
2597 <td rowspan="3">
2598 <ul>
2599 <li>ANEURALNETWORKS_REDUCE_MAX
2600 <li>ANEURALNETWORKS_REDUCE_MIN
2601 <li>ANEURALNETWORKS_REDUCE_SUM
Teresa Charlin32b78702021-09-03 11:25:54 +0100[diff] [blame]2602 <li>ANEURALNETWORKS_REDUCE_PROD
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2603 </ul>
2604 <td>CpuRef
2605 <td>
2606 <ul>
2607 <li>All
2608 </ul>
2609 <td>
2610 <table>
2611 <tr><th>
2612 <tr><td>BFLOAT16
2613 <tr><td>FLOAT16
2614 <tr><td>FLOAT32
2615 <tr><td>QASYMMS8
2616 <tr><td>QASYMMU8
2617 <tr><td>QSYMMS16
2618 <tr><td>SIGNED32
2619 </table>
2620<tr>
2621 <td>CpuAcc
2622 <td>
2623 <ul>
2624 <li>All
2625 </ul>
2626 <td>
2627 <table>
2628 <tr><th>
2629 <tr><td>QASYMMU8
2630 <tr><td>QASYMMS8
2631 <tr><td>FLOAT16
2632 <tr><td>FLOAT32
2633 <tr><td>SIGNED32
2634 </table>
2635<tr>
2636 <td>GpuAcc
2637 <td>
2638 <ul>
2639 <li>All
2640 </ul>
2641 <td>
2642 <table>
2643 <tr><th>
2644 <tr><td>QASYMMU8
2645 <tr><td>QASYMMS8
2646 <tr><td>FLOAT16
2647 <tr><td>FLOAT32
2648 <tr><td>SIGNED32
2649 </table>
2650<tr>
2651 <td rowspan="3">ReshapeLayer
2652 <td rowspan="3" style="width:200px;"> Layer to reshape a tensor.
2653 <td rowspan="3">
2654 <ul>
2655 <li>ANEURALNETWORKS_RESHAPE
2656 <li>ANEURALNETWORKS_SQUEEZE
2657 <li>ANEURALNETWORKS_EXPAND_DIMS
2658 </ul>
2659 <td>CpuRef
2660 <td>
2661 <ul>
2662 <li>All
2663 </ul>
2664 <td>
2665 <table>
2666 <tr><th>
2667 <tr><td>BFLOAT16
2668 <tr><td>FLOAT16
2669 <tr><td>FLOAT32
2670 <tr><td>QASYMMS8
2671 <tr><td>QASYMMU8
2672 <tr><td>QSYMMS16
2673 <tr><td>SIGNED32
2674 <tr><td>BOOLEAN
2675 </table>
2676<tr>
2677 <td>CpuAcc
2678 <td>
2679 <ul>
2680 <li>All
2681 </ul>
2682 <td>
2683 <table>
2684 <tr><th>
2685 <tr><td>All
2686 </table>
2687<tr>
2688 <td>GpuAcc
2689 <td>
2690 <ul>
2691 <li>All
2692 </ul>
2693 <td>
2694 <table>
2695 <tr><th>
2696 <tr><td>All
2697 </table>
2698<tr>
2699 <td rowspan="3">ResizeLayer
2700 <td rowspan="3" style="width:200px;"> Layer to perform resize of a tensor using one of the interpolation methods: - Bilinear - Nearest Neighbor.
2701 <td rowspan="3">
2702 <ul>
2703 <li>ANEURALNETWORKS_RESIZE_BILINEAR
2704 <li>ANEURALNETWORKS_RESIZE_NEAREST_NEIGHBOR
2705 </ul>
2706 <td>CpuRef
2707 <td>
2708 <ul>
2709 <li>All
2710 </ul>
2711 <td>
2712 <table>
2713 <tr><th>
2714 <tr><td>BFLOAT16
2715 <tr><td>FLOAT16
2716 <tr><td>FLOAT32
2717 <tr><td>QASYMMS8
2718 <tr><td>QASYMMU8
2719 <tr><td>QSYMMS16
2720 </table>
2721<tr>
2722 <td>CpuAcc
2723 <td>
2724 <ul>
2725 <li>NHWC
2726 <li>NCHW
2727 </ul>
2728 <td>
2729 <table>
2730 <tr><th>
2731 <tr><td>QASYMMU8
2732 <tr><td>QASYMMS8
2733 <tr><td>FLOAT16
2734 <tr><td>FLOAT32
2735 </table>
2736<tr>
2737 <td>GpuAcc
2738 <td>
2739 <ul>
2740 <li>NHWC
2741 <li>NCHW
2742 </ul>
2743 <td>
2744 <table>
2745 <tr><th>
2746 <tr><td>QASYMMU8
2747 <tr><td>QASYMMS8
2748 <tr><td>FLOAT16
2749 <tr><td>FLOAT32
2750 </table>
2751<tr>
2752 <td rowspan="3">RsqrtLayer
2753 <td rowspan="3" style="width:200px;"> Layer to perform Rsqrt operation.
2754 <td rowspan="3">
2755 <ul>
2756 <li>ANEURALNETWORKS_RSQRT
2757 </ul>
2758 <td>CpuRef
2759 <td>
2760 <ul>
2761 <li>All
2762 </ul>
2763 <td>
2764 <table>
2765 <tr><th>
2766 <tr><td>BFLOAT16
2767 <tr><td>FLOAT16
2768 <tr><td>FLOAT32
2769 <tr><td>QASYMMS8
2770 <tr><td>QASYMMU8
2771 <tr><td>QSYMMS16
2772 <tr><td>SIGNED32
2773 </table>
2774<tr>
2775 <td>CpuAcc
2776 <td>
2777 <ul>
2778 <li>All
2779 </ul>
2780 <td>
2781 <table>
2782 <tr><th>
2783 <tr><td>FLOAT16
2784 <tr><td>FLOAT32
2785 <tr><td>SIGNED32
2786 </table>
2787<tr>
2788 <td>GpuAcc
2789 <td>
2790 <ul>
2791 <li>All
2792 </ul>
2793 <td>
2794 <table>
2795 <tr><th>
2796 <tr><td>FLOAT16
2797 <tr><td>FLOAT32
2798 </table>
2799<tr>
2800 <td rowspan="3">ShapeLayer
2801 <td rowspan="3" style="width:200px;"> Layer to return the shape of the input tensor.
2802 <td rowspan="3">
2803 <ul>
2804 <li>N/A
2805 </ul>
2806 <td>CpuRef
2807 <td>
2808 <ul>
2809 <li>All
2810 </ul>
2811 <td>
2812 <table>
2813 <tr><th>
2814 <tr><td>All
2815 </table>
2816<tr>
2817 <td>CpuAcc
2818 <td>
2819 <ul>
2820 <li>All
2821 </ul>
2822 <td>
2823 <table>
2824 <tr><th>
2825 <tr><td>All
2826 </table>
2827<tr>
2828 <td>GpuAcc
2829 <td>
2830 <ul>
2831 <li>All
2832 </ul>
2833 <td>
2834 <table>
2835 <tr><th>
2836 <tr><td>All
2837 </table>
2838<tr>
2839 <td rowspan="3">SliceLayer
2840 <td rowspan="3" style="width:200px;"> Layer to perform tensor slicing.
2841 <td rowspan="3">
2842 <ul>
2843 <li>ANEURALNETWORKS_SLICE
2844 </ul>
2845 <td>CpuRef
2846 <td>
2847 <ul>
2848 <li>All
2849 </ul>
2850 <td>
2851 <table>
2852 <tr><th>
2853 <tr><td>BFLOAT16
2854 <tr><td>FLOAT32
2855 <tr><td>QASYMMS8
2856 <tr><td>QASYMMU8
2857 <tr><td>QSYMMS16
2858 </table>
2859<tr>
2860 <td>CpuAcc
2861 <td>
2862 <ul>
2863 <li>All
2864 </ul>
2865 <td>
2866 <table>
2867 <tr><th>
2868 <tr><td>All
2869 </table>
2870<tr>
2871 <td>GpuAcc
2872 <td>
2873 <ul>
2874 <li>All
2875 </ul>
2876 <td>
2877 <table>
2878 <tr><th>
2879 <tr><td>All
2880 </table>
2881<tr>
2882 <td rowspan="3">SoftmaxLayer
2883 <td rowspan="3" style="width:200px;"> Layer to perform softmax, log-softmax operation over the specified axis.
2884 <td rowspan="3">
2885 <ul>
2886 <li>ANEURALNETWORKS_LOG_SOFTMAX
2887 <li>ANEURALNETWORKS_SOFTMAX
2888 </ul>
2889 <td>CpuRef
2890 <td>
2891 <ul>
2892 <li>All
2893 </ul>
2894 <td>
2895 <table>
2896 <tr><th>
2897 <tr><td>BFLOAT16
2898 <tr><td>FLOAT16
2899 <tr><td>FLOAT32
2900 <tr><td>QASYMMS8
2901 <tr><td>QASYMMU8
2902 <tr><td>QSYMMS8
2903 <tr><td>QSYMMS16
2904 </table>
2905<tr>
2906 <td>CpuAcc
2907 <td>
2908 <ul>
2909 <li>All
2910 </ul>
2911 <td>
2912 <table>
2913 <tr><th>
2914 <tr><td>QASYMMU8
2915 <tr><td>QASYMMS8
2916 <tr><td>FLOAT16
2917 <tr><td>FLOAT32
2918 </table>
2919<tr>
2920 <td>GpuAcc
2921 <td>
2922 <ul>
2923 <li>All
2924 </ul>
2925 <td>
2926 <table>
2927 <tr><th>
2928 <tr><td>QASYMMU8
2929 <tr><td>QASYMMS8
2930 <tr><td>FLOAT16
2931 <tr><td>FLOAT32
2932 </table>
2933<tr>
2934 <td rowspan="3">SpaceToBatchNdLayer
2935 <td rowspan="3" style="width:200px;"> Layer to divide spatial dimensions of the tensor into a grid of blocks and interleaves these blocks with the batch dimension.
2936 <td rowspan="3">
2937 <ul>
2938 <li>ANEURALNETWORKS_SPACE_TO_BATCH_ND
2939 </ul>
2940 <td>CpuRef
2941 <td>
2942 <ul>
2943 <li>All
2944 </ul>
2945 <td>
2946 <table>
2947 <tr><th>
2948 <tr><td>BFLOAT16
2949 <tr><td>FLOAT16
2950 <tr><td>FLOAT32
2951 <tr><td>QASYMMS8
2952 <tr><td>QASYMMU8
2953 <tr><td>QSYMMS16
2954 </table>
2955<tr>
2956 <td>CpuAcc
2957 <td>
2958 <ul>
2959 <li>NHWC
2960 <li>NCHW
2961 </ul>
2962 <td>
2963 <table>
2964 <tr><th>
2965 <tr><td>All
2966 </table>
2967<tr>
2968 <td>GpuAcc
2969 <td>
2970 <ul>
2971 <li>NHWC
2972 <li>NCHW
2973 </ul>
2974 <td>
2975 <table>
2976 <tr><th>
2977 <tr><td>All
2978 </table>
2979<tr>
2980 <td rowspan="3">SpaceToDepthLayer
2981 <td rowspan="3" style="width:200px;"> Layer to rearrange blocks of spatial data into depth.
2982 <td rowspan="3">
2983 <ul>
2984 <li>ANEURALNETWORKS_SPACE_TO_DEPTH
2985 </ul>
2986 <td>CpuRef
2987 <td>
2988 <ul>
2989 <li>All
2990 </ul>
2991 <td>
2992 <table>
2993 <tr><th>
2994 <tr><td>BFLOAT16
2995 <tr><td>FLOAT16
2996 <tr><td>FLOAT32
2997 <tr><td>QASYMMS8
2998 <tr><td>QASYMMU8
2999 <tr><td>QSYMMS16
3000 </table>
3001<tr>
3002 <td>CpuAcc
3003 <td>
3004 <ul>
3005 <li>NHWC
3006 <li>NCHW
3007 </ul>
3008 <td>
3009 <table>
3010 <tr><th>
3011 <tr><td>All
3012 </table>
3013<tr>
3014 <td>GpuAcc
3015 <td>
3016 <ul>
3017 <li>NHWC
3018 <li>NCHW
3019 </ul>
3020 <td>
3021 <table>
3022 <tr><th>
3023 <tr><td>All
3024 </table>
3025<tr>
3026 <td rowspan="3">SplitterLayer
3027 <td rowspan="3" style="width:200px;"> Layer to split a tensor along a given axis.
3028 <td rowspan="3">
3029 <ul>
3030 <li>ANEURALNETWORKS_SPLIT
3031 </ul>
3032 <td>CpuRef
3033 <td>
3034 <ul>
3035 <li>All
3036 </ul>
3037 <td>
3038 <table>
3039 <tr><th>
3040 <tr><td>BFLOAT16
3041 <tr><td>FLOAT16
3042 <tr><td>FLOAT32
3043 <tr><td>QASYMMS8
3044 <tr><td>QASYMMU8
3045 <tr><td>QSYMMS16
3046 </table>
3047<tr>
3048 <td>CpuAcc
3049 <td>
3050 <ul>
3051 <li>All
3052 </ul>
3053 <td>
3054 <table>
3055 <tr><th>
3056 <tr><td>All
3057 </table>
3058<tr>
3059 <td>GpuAcc
3060 <td>
3061 <ul>
3062 <li>All
3063 </ul>
3064 <td>
3065 <table>
3066 <tr><th>
3067 <tr><td>All
3068 </table>
3069<tr>
3070 <td rowspan="3">StackLayer
3071 <td rowspan="3" style="width:200px;"> Layer to stack tensors along an axis.
3072 <td rowspan="3">
3073 <ul>
3074 <li>N/A
3075 </ul>
3076 <td>CpuRef
3077 <td>
3078 <ul>
3079 <li>All
3080 </ul>
3081 <td>
3082 <table>
3083 <tr><th>
3084 <tr><td>BFLOAT16
3085 <tr><td>FLOAT16
3086 <tr><td>FLOAT32
3087 <tr><td>QASYMMS8
3088 <tr><td>QASYMMU8
3089 <tr><td>QSYMMS16
3090 </table>
3091<tr>
3092 <td>CpuAcc
3093 <td>
3094 <ul>
3095 <li>All
3096 </ul>
3097 <td>
3098 <table>
3099 <tr><th>
3100 <tr><td>All
3101 </table>
3102<tr>
3103 <td>GpuAcc
3104 <td>
3105 <ul>
3106 <li>All
3107 </ul>
3108 <td>
3109 <table>
3110 <tr><th>
3111 <tr><td>All
3112 </table>
3113<tr>
3114 <td rowspan="1">StandInLayer
3115 <td rowspan="1" style="width:200px;"> A layer to represent "unknown" or "unsupported" operations in the input graph. It has a configurable number of input and output slots and an optional name.
3116 <td rowspan="1">
3117 <ul>
3118 <li>N/A
3119 </ul>
3120 <td>N/A
3121 <td>N/A
3122 <td>N/A
3123<tr>
3124 <td rowspan="3">StridedSliceLayer
3125 <td rowspan="3" style="width:200px;"> Layer to extract a strided slice of a tensor.
3126 <td rowspan="3">
3127 <ul>
3128 <li>ANEURALNETWORKS_STRIDED_SLICE
3129 </ul>
3130 <td>CpuRef
3131 <td>
3132 <ul>
3133 <li>All
3134 </ul>
3135 <td>
3136 <table>
3137 <tr><th>
3138 <tr><td>BFLOAT16
3139 <tr><td>FLOAT32
3140 <tr><td>QASYMMS8
3141 <tr><td>QASYMMU8
3142 <tr><td>QSYMMS16
3143 </table>
3144<tr>
3145 <td>CpuAcc
3146 <td>
3147 <ul>
3148 <li>All
3149 </ul>
3150 <td>
3151 <table>
3152 <tr><th>
3153 <tr><td>All
3154 </table>
3155<tr>
3156 <td>GpuAcc
3157 <td>
3158 <ul>
3159 <li>All
3160 </ul>
3161 <td>
3162 <table>
3163 <tr><th>
3164 <tr><td>All
3165 </table>
3166<tr>
3167 <td rowspan="3">SubtractionLayer
3168 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise subtract of 2 tensors.
3169 <td rowspan="3">
3170 <ul>
3171 <li>ANEURALNETWORKS_SUB
3172 </ul>
3173 <td>CpuRef
3174 <td>
3175 <ul>
3176 <li>All
3177 </ul>
3178 <td>
3179 <table>
3180 <tr><th>
3181 <tr><td>BFLOAT16
3182 <tr><td>FLOAT16
3183 <tr><td>FLOAT32
3184 <tr><td>QASYMMS8
3185 <tr><td>QASYMMU8
3186 <tr><td>QSYMMS16
3187 <tr><td>SIGNED32
3188 </table>
3189<tr>
3190 <td>CpuAcc
3191 <td>
3192 <ul>
3193 <li>All
3194 </ul>
3195 <td>
3196 <table>
3197 <tr><th>
3198 <tr><td>QASYMMU8
3199 <tr><td>QASYMMS8
3200 <tr><td>QSYMMS16
3201 <tr><td>SIGNED32
3202 <tr><td>FLOAT16
3203 <tr><td>FLOAT32
3204 </table>
3205<tr>
3206 <td>GpuAcc
3207 <td>
3208 <ul>
3209 <li>All
3210 </ul>
3211 <td>
3212 <table>
3213 <tr><th>
3214 <tr><td>QASYMMU8
3215 <tr><td>QASYMMS8
3216 <tr><td>QSYMMS16
3217 <tr><td>SIGNED32
3218 <tr><td>FLOAT16
3219 <tr><td>FLOAT32
3220 </table>
3221<tr>
3222 <td rowspan="3">TransposeConvolution2dLayer
3223 <td rowspan="3" style="width:200px;"> Layer to perform 2D transpose convolution (deconvolution) operation.
3224 <td rowspan="3">
3225 <ul>
3226 <li>ANEURALNETWORKS_TRANSPOSE_CONV_2D
3227 </ul>
3228 <td>CpuRef
3229 <td>
3230 <ul>
3231 <li>All
3232 </ul>
3233 <td>
3234 <table>
3235 <tr><th>
3236 <tr><td>BFLOAT16
3237 <tr><td>FLOAT16
3238 <tr><td>FLOAT32
3239 <tr><td>QASYMMS8
3240 <tr><td>QASYMMU8
3241 <tr><td>QSYMMS8
3242 <tr><td>QSYMMS16
3243 </table>
3244<tr>
3245 <td>CpuAcc
3246 <td>
3247 <ul>
3248 <li>NHWC
3249 <li>NCHW
3250 </ul>
3251 <td>
3252 <table>
3253 <tr><th>
3254 <tr><td>SIGNED32
3255 <tr><td>FLOAT16
3256 <tr><td>FLOAT32
3257 <tr><td>QASYMMU8
3258 <tr><td>QASYMMS8
3259 <tr><td>QUANTIZEDSYMM8PERAXIS
3260 </table>
3261<tr>
3262 <td>GpuAcc
3263 <td>
3264 <ul>
3265 <li>NHWC
3266 <li>NCHW
3267 </ul>
3268 <td>
3269 <table>
3270 <tr><th>
3271 <tr><td>SIGNED32
3272 <tr><td>FLOAT16
3273 <tr><td>FLOAT32
3274 <tr><td>QASYMMU8
3275 <tr><td>QASYMMS8
3276 <tr><td>QUANTIZEDSYMM8PERAXIS
3277 </table>
3278<tr>
3279 <td rowspan="3">TransposeLayer
3280 <td rowspan="3" style="width:200px;"> Layer to transpose a tensor.
3281 <td rowspan="3">
3282 <ul>
3283 <li>ANEURALNETWORKS_TRANSPOSE
3284 </ul>
3285 <td>CpuRef
3286 <td>
3287 <ul>
3288 <li>All
3289 </ul>
3290 <td>
3291 <table>
3292 <tr><th>
3293 <tr><td>BFLOAT16
3294 <tr><td>FLOAT16
3295 <tr><td>FLOAT32
3296 <tr><td>QASYMMS8
3297 <tr><td>QASYMMU8
3298 <tr><td>QSYMMS16
3299 </table>
3300<tr>
3301 <td>CpuAcc
3302 <td>
3303 <ul>
3304 <li>All
3305 </ul>
3306 <td>
3307 <table>
3308 <tr><th>
3309 <tr><td>All
3310 </table>
3311<tr>
3312 <td>GpuAcc
3313 <td>
3314 <ul>
3315 <li>All
3316 </ul>
3317 <td>
3318 <table>
3319 <tr><th>
3320 <tr><td>All
3321 </table>
3322<tr>
3323 <td rowspan="3">UnidirectionalSquenceLstmLayer
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3324 <td rowspan="3" style="width:200px;"> Layer to perform unidirectional sequence LSTM operation.
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3325 <td rowspan="3">
3326 <ul>
3327 <li>ANEURALNETWORKS_UNIDIRECTIONAL_SEQUENCE_LSTM
3328 </ul>
3329 <td>CpuRef
3330 <td>
3331 <ul>
3332 <li>All
3333 </ul>
3334 <td>
3335 <table>
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3336 <tr><th>Input Types
3337 <tr><td>FLOAT32
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3338 </table>
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3339 <table>
3340 <tr><th>Weight Types
3341 <tr><td>FLOAT32
3342 <tr><td>QASYMMS8
3343 </table>
Cathal Corbettfd5bec42022-03-03 15:13:23 +0000[diff] [blame]3344 <td>CpuAcc
3345 <td>
3346 <ul>
3347 <li>All
3348 </ul>
3349 <td>
3350 <table>
3351 <tr><th>Input Types
3352 <tr><td>FLOAT32
3353 </table>
3354 <table>
3355 <tr><th>Weight Types
3356 <tr><td>FLOAT32
3357 </table>
Cathal Corbett4952a3e2022-03-03 15:14:18 +0000[diff] [blame]3358 <td>GpuAcc
3359 <td>
3360 <ul>
3361 <li>All
3362 </ul>
3363 <td>
3364 <table>
3365 <tr><th>Input Types
3366 <tr><td>FLOAT32
3367 </table>
3368 <table>
3369 <tr><th>Weight Types
3370 <tr><td>FLOAT32
3371 </table>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3372<tr>
3373 <td rowspan="3">UnmapLayer
3374 <td rowspan="3" style="width:200px;"> Layer to perform unmap operation on tensor.
3375 <td rowspan="3">
3376 <ul>
3377 <li>N/A
3378 </ul>
3379 <td>CpuRef
3380 <td>
3381 <ul>
3382 <li>All
3383 </ul>
3384 <td>
3385 <table>
3386 <tr><th>
3387 <tr><td>All
3388 </table>
3389<tr>
3390 <td>CpuAcc
3391 <td>
3392 <ul>
3393 <li>NHWC
3394 <li>NCHW
3395 </ul>
3396 <td>
3397 <table>
3398 <tr><th>
3399 <tr><td>All
3400 </table>
3401<tr>
3402 <td>GpuAcc
3403 <td>
3404 <ul>
3405 <li>NHWC
3406 <li>NCHW
3407 </ul>
3408 <td>
3409 <table>
3410 <tr><th>
3411 <tr><td>All
3412 </table>
3413</table>
3414
3415*/
3416} // namespace