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Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]1/// Copyright (c) 2021 ARM Limited and Contributors. All rights reserved.
2///
3/// SPDX-License-Identifier: MIT
4///
5
6namespace armnn
7{
8/**
9@page operator_list Arm NN Operators
10
11@tableofcontents
12
13@section S5_1_operator_list Arm NN Operators
14
15Arm NN supports operators that are listed in below table.
16
17Arm NN supports a wide list of data-types.
18The main data-types that the Machine Learning functions support are the following:
19 <ul>
20 <li><b>BFLOAT16:</b> 16-bit non-standard brain floating point
21 <li><b>QASYMMU8:</b> 8-bit unsigned asymmetric quantized
22 <li><b>QASYMMS8:</b> 8-bit signed asymmetric quantized
23 <li><b>QUANTIZEDSYMM8PERAXIS:</b> 8-bit signed symmetric quantized
Cathal Corbettb85113e2022-02-22 11:51:43 +0000[diff] [blame]24 <li><b>QSYMMS8:</b> 8-bit signed symmetric quantized
25 <li><b>QSYMMS16:</b> 16-bit signed symmetric quantized
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]26 <li><b>FLOAT32:</b> 32-bit single precision floating point
27 <li><b>FLOAT16:</b> 16-bit half precision floating point
28 <li><b>SIGNED32:</b> 32-bit signed integer
29 <li><b>BOOLEAN:</b> 8-bit unsigned char
30 <li><b>All:</b> Agnostic to any specific data type
31 </ul>
32
33Arm NN supports the following data layouts (fast changing dimension from right to left):
34 <ul>
35 <li><b>NHWC:</b> Layout where channels are in the fastest changing dimension
36 <li><b>NCHW:</b> Layout where width is in the fastest changing dimension
37 <li><b>All:</b> Agnostic to any specific data layout
38 </ul>
39where N = batches, C = channels, H = height, W = width
40
41<table>
42<caption id="multi_row"></caption>
43<tr>
44 <th>Operator
45 <th>Description
46 <th>Equivalent Android NNAPI Operator
47 <th>Backends
48 <th>Data Layouts
49 <th>Data Types
50<tr>
51 <td rowspan="3">AbsLayer
52 <td rowspan="3"> Layer to perform absolute operation.
53 <td rowspan="3">
54 <ul>
55 <li>ANEURALNETWORKS_ABS
56 </ul>
57 <td>CpuRef
58 <td>
59 <ul>
60 <li>All
61 </ul>
62 <td>
63 <table>
64 <tr><th>
65 <tr><td>BFLOAT16
66 <tr><td>FLOAT16
67 <tr><td>FLOAT32
68 <tr><td>QASYMMS8
69 <tr><td>QASYMMU8
70 <tr><td>QSYMMS16
71 <tr><td>SIGNED32
72 </table>
73<tr>
74 <td>CpuAcc
75 <td>
76 <ul>
77 <li>All
78 </ul>
79 <td>
80 <table>
81 <tr><th>
82 <tr><td>FLOAT16
83 <tr><td>FLOAT32
84 <tr><td>SIGNED32
85 </table>
86<tr>
87 <td>GpuAcc
88 <td>
89 <ul>
90 <li>All
91 </ul>
92 <td>
93 <table>
94 <tr><th>
95 <tr><td>FLOAT16
96 <tr><td>FLOAT32
97 </table>
98<tr>
99 <td rowspan="3">ActivationLayer
100 <td rowspan="3" style="width:200px;"> Layer to simulate an activation layer with the specified activation function.
101 <td rowspan="3">
102 <ul>
103 <li>ANEURALNETWORKS_ABS
104 <li>ANEURALNETWORKS_ELU
105 <li>ANEURALNETWORKS_HARD_SWISH
106 <li>ANEURALNETWORKS_LOGISTIC
107 <li>ANEURALNETWORKS_PRELU
108 <li>ANEURALNETWORKS_RELU
109 <li>ANEURALNETWORKS_RELU1
110 <li>ANEURALNETWORKS_RELU6
111 <li>ANEURALNETWORKS_SQRT
112 <li>ANEURALNETWORKS_TANH
113 </ul>
114 <td>CpuRef
115 <td>
116 <ul>
117 <li>All
118 </ul>
119 <td>
120 <table>
121 <tr><th>
122 <tr><td>BFLOAT16
123 <tr><td>FLOAT16
124 <tr><td>FLOAT32
125 <tr><td>QASYMMS8
126 <tr><td>QASYMMU8
127 <tr><td>QSYMMS16
128 </table>
129<tr>
130 <td>CpuAcc
131 <td>
132 <ul>
133 <li>All
134 </ul>
135 <td>
136 <table>
137 <tr><th>
138 <tr><td>QASYMMU8
139 <tr><td>QASYMMS8
140 <tr><td>QSYMMS16
141 <tr><td>FLOAT16
142 <tr><td>FLOAT32
143 </table>
144<tr>
145 <td>GpuAcc
146 <td>
147 <ul>
148 <li>All
149 </ul>
150 <td>
151 <table>
152 <tr><th>
153 <tr><td>QASYMMU8
154 <tr><td>QASYMMS8
155 <tr><td>QSYMMS16
156 <tr><td>FLOAT16
157 <tr><td>FLOAT32
158 </table>
159<tr>
160 <td rowspan="3">AdditionLayer
161 <td rowspan="3" style="width:200px;"> Layer to add 2 tensors.
162 <td rowspan="3">
163 <ul>
164 <li>ANEURALNETWORKS_ADD
165 </ul>
166 <td>CpuRef
167 <td>
168 <ul>
169 <li>All
170 </ul>
171 <td>
172 <table>
173 <tr><th>
174 <tr><td>BFLOAT16
175 <tr><td>FLOAT16
176 <tr><td>FLOAT32
177 <tr><td>QASYMMS8
178 <tr><td>QASYMMU8
179 <tr><td>QSYMMS16
180 <tr><td>SIGNED32
181 </table>
182<tr>
183 <td>CpuAcc
184 <td>
185 <ul>
186 <li>All
187 </ul>
188 <td>
189 <table>
190 <tr><th>
191 <tr><td>QASYMMU8
192 <tr><td>QASYMMS8
193 <tr><td>QSYMMS16
194 <tr><td>SIGNED32
195 <tr><td>FLOAT16
196 <tr><td>FLOAT32
197 </table>
198<tr>
199 <td>GpuAcc
200 <td>
201 <ul>
202 <li>All
203 </ul>
204 <td>
205 <table>
206 <tr><th>
207 <tr><td>QASYMMU8
208 <tr><td>QASYMMS8
209 <tr><td>QSYMMS16
210 <tr><td>SIGNED32
211 <tr><td>FLOAT16
212 <tr><td>FLOAT32
213 </table>
214<tr>
215 <td rowspan="3">ArgMinMaxLayer
216 <td rowspan="3" style="width:200px;"> Layer to calculate the index of the minimum or maximum values in a tensor
217 based on an axis.
218 <td rowspan="3">
219 <ul>
220 <li>ANEURALNETWORKS_ARGMAX
221 <li>ANEURALNETWORKS_ARGMIN
222 </ul>
223 <td>CpuRef
224 <td>
225 <ul>
226 <li>All
227 </ul>
228 <td>
229 <table>
230 <tr><th>
231 <tr><td>BFLOAT16
232 <tr><td>FLOAT16
233 <tr><td>FLOAT32
234 <tr><td>QASYMMS8
235 <tr><td>QASYMMU8
236 <tr><td>QSYMMS16
237 <tr><td>SIGNED32
238 <tr><td>SIGNED64
239 </table>
240<tr>
241 <td>CpuAcc
242 <td>
243 <ul>
244 <li>All
245 </ul>
246 <td>
247 <table>
248 <tr><th>
249 <tr><td>QASYMMU8
250 <tr><td>QASYMMS8
251 <tr><td>SIGNED32
252 <tr><td>FLOAT16
253 <tr><td>FLOAT32
254 </table>
255<tr>
256 <td>GpuAcc
257 <td>
258 <ul>
259 <li>All
260 </ul>
261 <td>
262 <table>
263 <tr><th>
264 <tr><td>QASYMMU8
265 <tr><td>QASYMMS8
266 <tr><td>SIGNED32
267 <tr><td>FLOAT16
268 <tr><td>FLOAT32
269 </table>
270<tr>
271 <td rowspan="3">BatchNormalizationLayer
272 <td rowspan="3" style="width:200px;"> Layer to perform batch normalization.
273 <td rowspan="3">
274 <ul>
275 <li>N/A
276 </ul>
277 <td>CpuRef
278 <td>
279 <ul>
280 <li>All
281 </ul>
282 <td>
283 <table>
284 <tr><th>
285 <tr><td>BFLOAT16
286 <tr><td>FLOAT16
287 <tr><td>FLOAT32
288 <tr><td>QASYMMS8
289 <tr><td>QASYMMU8
290 <tr><td>QSYMMS16
291 </table>
292<tr>
293 <td>CpuAcc
294 <td>
295 <ul>
296 <li>NHWC
297 <li>NCHW
298 </ul>
299 <td>
300 <table>
301 <tr><th>
302 <tr><td>FLOAT32
303 <tr><td>FLOAT16
304 </table>
305<tr>
306 <td>GpuAcc
307 <td>
308 <ul>
309 <li>NHWC
310 <li>NCHW
311 </ul>
312 <td>
313 <table>
314 <tr><th>
315 <tr><td>FLOAT32
316 <tr><td>FLOAT16
317 </table>
318<tr>
319 <td rowspan="3">BatchToSpaceNdLayer
320 <td rowspan="3" style="width:200px;"> Layer to perform a batch to space transformation.
321 <td rowspan="3">
322 <ul>
323 <li>ANEURALNETWORKS_BATCH_TO_SPACE_ND
324 </ul>
325 <td>CpuRef
326 <td>
327 <ul>
328 <li>All
329 </ul>
330 <td>
331 <table>
332 <tr><th>
333 <tr><td>BFLOAT16
334 <tr><td>FLOAT16
335 <tr><td>FLOAT32
336 <tr><td>QASYMMS8
337 <tr><td>QASYMMU8
338 <tr><td>QSYMMS16
339 </table>
340<tr>
341 <td>CpuAcc
342 <td>
343 <ul>
344 <li>NHWC
345 <li>NCHW
346 </ul>
347 <td>
348 <table>
349 <tr><th>
350 <tr><td>All
351 </table>
352<tr>
353 <td>GpuAcc
354 <td>
355 <ul>
356 <li>NHWC
357 <li>NCHW
358 </ul>
359 <td>
360 <table>
361 <tr><th>
362 <tr><td>All
363 </table>
364<tr>
365 <td rowspan="3">CastLayer
366 <td rowspan="3" style="width:200px;"> Layer to cast a tensor to a type.
367 <td rowspan="3">
368 <ul>
369 <li>ANEURALNETWORKS_CAST
370 </ul>
371 <td>CpuRef
372 <td>
373 <ul>
374 <li>All
375 </ul>
376 <td>
377 <table>
378 <tr><th>
379 <tr><td>BFLOAT16
380 <tr><td>FLOAT16
381 <tr><td>FLOAT32
382 <tr><td>QSYMMS8
383 <tr><td>QASYMMS8
384 <tr><td>QASYMMU8
385 <tr><td>QSYMMS16
386 <tr><td>SIGNED32
387 </table>
388<tr>
389 <td>CpuAcc
390 <td>
391 <ul>
392 <li>All
393 </ul>
394 <td>
395 <table>
396 <tr><th>
397 <tr><td>QASYMMS8
398 <tr><td>QASYMMU8
399 <tr><td>FLOAT16
400 <tr><td>SIGNED32
401 <tr><td>FLOAT32
402 </table>
403<tr>
404 <td>GpuAcc
405 <td>
406 <ul>
407 <li>All
408 </ul>
409 <td>
410 <table>
411 <tr><th>
412 <tr><td>QASYMMS8
413 <tr><td>QASYMMU8
414 <tr><td>SIGNED32
415 <tr><td>FLOAT16
416 <tr><td>FLOAT32
417 </table>
418<tr>
Teresa Charlincd203852021-09-24 18:15:39 +0100[diff] [blame]419 <td rowspan="3">ChannelShuffleLayer
420 <td rowspan="3" style="width:200px;"> Layer to reorganize the channels of a tensor.
421 <td rowspan="3">
422 <ul>
423 <li>ANEURALNETWORKS_CHANNEL_SHUFFLE
424 </ul>
425 <td>CpuRef
426 <td>
427 <ul>
428 <li>All
429 </ul>
430 <td>
431 <table>
432 <tr><th>
433 <tr><td>FLOAT16
434 <tr><td>FLOAT32
435 <tr><td>QSYMMS8
436 <tr><td>QASYMMS8
437 <tr><td>QASYMMU8
438 </table>
439<tr>
440 <td>CpuAcc
441 <td>
442 <ul>
443 <li>All
444 </ul>
445 <td>
446 <table>
447 <tr><th>
448 <tr><td>QASYMMS8
449 <tr><td>QASYMMU8
450 <tr><td>FLOAT16
451 <tr><td>FLOAT32
452 </table>
453<tr>
454 <td>GpuAcc
455 <td>
456 <ul>
457 <li>All
458 </ul>
459 <td>
460 <table>
461 <tr><th>
462 <tr><td>QASYMMS8
463 <tr><td>QASYMMU8
464 <tr><td>FLOAT16
465 <tr><td>FLOAT32
466 </table>
467<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]468 <td rowspan="3">ComparisonLayer
469 <td rowspan="3" style="width:200px;"> Layer to compare 2 tensors.
470 <td rowspan="3">
471 <ul>
472 <li>ANEURALNETWORKS_EQUAL
473 <li>ANEURALNETWORKS_GREATER
474 <li>ANEURALNETWORKS_GREATER_EQUAL
475 <li>ANEURALNETWORKS_LESS
476 <li>ANEURALNETWORKS_LESS_EQUAL
477 <li>ANEURALNETWORKS_NOT_EQUAL
478 </ul>
479 <td>CpuRef
480 <td>
481 <ul>
482 <li>All
483 </ul>
484 <td>
485 <table>
486 <tr><th>
487 <tr><td>BFLOAT16
488 <tr><td>FLOAT16
489 <tr><td>FLOAT32
490 <tr><td>BOOLEAN
491 <tr><td>QASYMMS8
492 <tr><td>QASYMMU8
493 <tr><td>QSYMMS16
494 <tr><td>SIGNED32
495 </table>
496<tr>
497 <td>CpuAcc
498 <td>
499 <ul>
500 <li>All
501 </ul>
502 <td>
503 <table>
504 <tr><th>
505 <tr><td>All
506 </table>
507<tr>
508 <td>GpuAcc
509 <td>
510 <ul>
511 <li>All
512 </ul>
513 <td>
514 <table>
515 <tr><th>
516 <tr><td>All
517 </table>
518<tr>
519 <td rowspan="3">ConcatLayer
520 <td rowspan="3" style="width:200px;"> Layer to concatenate tensors along a given axis.
521 <td rowspan="3">
522 <ul>
523 <li>ANEURALNETWORKS_CONCATENATION
524 </ul>
525 <td>CpuRef
526 <td>
527 <ul>
528 <li>All
529 </ul>
530 <td>
531 <table>
532 <tr><th>
533 <tr><td>BFLOAT16
534 <tr><td>FLOAT16
535 <tr><td>FLOAT32
536 <tr><td>QASYMMS8
537 <tr><td>QASYMMU8
538 <tr><td>QSYMMS16
539 </table>
540<tr>
541 <td>CpuAcc
542 <td>
543 <ul>
544 <li>All
545 </ul>
546 <td>
547 <table>
548 <tr><th>
549 <tr><td>QASYMMU8
550 <tr><td>QASYMMS8
551 <tr><td>FLOAT16
552 <tr><td>FLOAT32
553 </table>
554<tr>
555 <td>GpuAcc
556 <td>
557 <ul>
558 <li>All
559 </ul>
560 <td>
561 <table>
562 <tr><th>
563 <tr><td>QASYMMU8
564 <tr><td>QASYMMS8
565 <tr><td>FLOAT16
566 <tr><td>FLOAT32
567 </table>
568<tr>
569 <td rowspan="3">ConstantLayer
570 <td rowspan="3" style="width:200px;"> Layer to provide a constant tensor.
571 <td rowspan="3">
572 <ul>
573 <li>N/A
574 </ul>
575 <td>CpuRef
576 <td>
577 <ul>
578 <li>All
579 </ul>
580 <td>
581 <table>
582 <tr><th>
583 <tr><td>BFLOAT16
584 <tr><td>FLOAT16
585 <tr><td>FLOAT32
586 <tr><td>QASYMMS8
587 <tr><td>QASYMMU8
588 <tr><td>QSYMMS8
589 <tr><td>QSYMMS16
590 <tr><td>SIGNED32
591 </table>
592<tr>
593 <td>CpuAcc
594 <td>
595 <ul>
596 <li>All
597 </ul>
598 <td>
599 <table>
600 <tr><th>
601 <tr><td>All
602 </table>
603<tr>
604 <td>GpuAcc
605 <td>
606 <ul>
607 <li>All
608 </ul>
609 <td>
610 <table>
611 <tr><th>
612 <tr><td>All
613 </table>
614<tr>
615 <td rowspan="3">ConvertBf16ToFp32Layer
616 <td rowspan="3" style="width:200px;"> Layer to convert BFloat16 tensor to Float32 tensor.
617 <td rowspan="3">
618 <ul>
619 <li>N/A
620 </ul>
621 <td>CpuRef
622 <td>
623 <ul>
624 <li>All
625 </ul>
626 <td>
627 <table>
628 <tr><th>
629 <tr><td>BFLOAT16
630 <tr><td>FLOAT32
631 </table>
632<tr>
633 <td>CpuAcc
634 <td>
635 <ul>
636 <li>All
637 </ul>
638 <td>
639 <table>
640 <tr><th>
641 <tr><td>BFLOAT16
642 <tr><td>FLOAT32
643 </table>
644<tr>
645 <td>GpuAcc
646 <td>
647 <ul>
648 <li>All
649 </ul>
650 <td>
651 <table>
652 <tr><th>
653 <tr><td>BFLOAT16
654 <tr><td>FLOAT32
655 </table>
656<tr>
657 <td rowspan="3">ConvertFp16ToFp32Layer
658 <td rowspan="3" style="width:200px;"> Layer to convert Float16 tensor to Float32 tensor.
659 <td rowspan="3">
660 <ul>
661 <li>N/A
662 </ul>
663 <td>CpuRef
664 <td>
665 <ul>
666 <li>All
667 </ul>
668 <td>
669 <table>
670 <tr><th>
671 <tr><td>FLOAT16
672 <tr><td>FLOAT32
673 </table>
674<tr>
675 <td>CpuAcc
676 <td>
677 <ul>
678 <li>All
679 </ul>
680 <td>
681 <table>
682 <tr><th>
683 <tr><td>FLOAT16
684 <tr><td>FLOAT32
685 </table>
686<tr>
687 <td>GpuAcc
688 <td>
689 <ul>
690 <li>All
691 </ul>
692 <td>
693 <table>
694 <tr><th>
695 <tr><td>FLOAT16
696 <tr><td>FLOAT32
697 </table>
698<tr>
699 <td rowspan="3">ConvertFp32ToBf16Layer
700 <td rowspan="3" style="width:200px;"> Layer to convert Float32 tensor to BFloat16 tensor.
701 <td rowspan="3">
702 <ul>
703 <li>N/A
704 </ul>
705 <td>CpuRef
706 <td>
707 <ul>
708 <li>All
709 </ul>
710 <td>
711 <table>
712 <tr><th>
713 <tr><td>BFLOAT16
714 <tr><td>FLOAT32
715 </table>
716<tr>
717 <td>CpuAcc
718 <td>
719 <ul>
720 <li>All
721 </ul>
722 <td>
723 <table>
724 <tr><th>
725 <tr><td>BFLOAT16
726 <tr><td>FLOAT32
727 </table>
728<tr>
729 <td>GpuAcc
730 <td>
731 <ul>
732 <li>All
733 </ul>
734 <td>
735 <table>
736 <tr><th>
737 <tr><td>BFLOAT16
738 <tr><td>FLOAT32
739 </table>
740<tr>
741 <td rowspan="3">ConvertFp32ToFp16Layer
742 <td rowspan="3" style="width:200px;"> Layer to convert Float32 tensor to Float16 tensor.
743 <td rowspan="3">
744 <ul>
745 <li>N/A
746 </ul>
747 <td>CpuRef
748 <td>
749 <ul>
750 <li>All
751 </ul>
752 <td>
753 <table>
754 <tr><th>
755 <tr><td>FLOAT16
756 <tr><td>FLOAT32
757 </table>
758<tr>
759 <td>CpuAcc
760 <td>
761 <ul>
762 <li>All
763 </ul>
764 <td>
765 <table>
766 <tr><th>
767 <tr><td>FLOAT16
768 <tr><td>FLOAT32
769 </table>
770<tr>
771 <td>GpuAcc
772 <td>
773 <ul>
774 <li>All
775 </ul>
776 <td>
777 <table>
778 <tr><th>
779 <tr><td>FLOAT16
780 <tr><td>FLOAT32
781 </table>
782<tr>
783 <td rowspan="3">Convolution2dLayer
784 <td rowspan="3" style="width:200px;"> Layer to compute a convolution operation.
785 <td rowspan="3">
786 <ul>
787 <li>ANEURALNETWORKS_CONV_2D
788 <li>ANEURALNETWORKS_GROUPED_CONV_2D
789 </ul>
790 <td>CpuRef
791 <td>
792 <ul>
793 <li>All
794 </ul>
795 <td>
796 <table>
797 <tr><th>
798 <tr><td>BFLOAT16
799 <tr><td>FLOAT16
800 <tr><td>FLOAT32
801 <tr><td>QASYMMS8
802 <tr><td>QASYMMU8
803 <tr><td>QSYMMS16
804 </table>
805<tr>
806 <td>CpuAcc
807 <td>
808 <ul>
809 <li>NHWC
810 <li>NCHW
811 </ul>
812 <td>
813 <table>
814 <tr><th>
815 <tr><td>SIGNED32
816 <tr><td>FLOAT16
817 <tr><td>FLOAT32
818 <tr><td>QASYMMU8
819 <tr><td>QASYMMS8
820 <tr><td>QUANTIZEDSYMM8PERAXIS
821 </table>
822<tr>
823 <td>GpuAcc
824 <td>
825 <ul>
826 <li>NHWC
827 <li>NCHW
828 </ul>
829 <td>
830 <table>
831 <tr><th>
832 <tr><td>SIGNED32
833 <tr><td>FLOAT16
834 <tr><td>FLOAT32
835 <tr><td>QASYMMU8
836 <tr><td>QASYMMS8
837 <tr><td>QUANTIZEDSYMM8PERAXIS
838 </table>
839<tr>
Matthew Sloyanb63a3112021-09-08 13:05:51 +0100[diff] [blame]840 <td rowspan="3">Convolution3dLayer
841 <td rowspan="3" style="width:200px;"> Layer to compute a 3D convolution operation.
842 <td rowspan="3">
843 <ul>
844 <li>N/A
845 </ul>
846 <td>CpuRef
847 <td>
848 <ul>
849 <li>NDHWC
850 </ul>
851 <td>
852 <table>
853 <tr><th>
854 <tr><td>BFLOAT16
855 <tr><td>FLOAT16
856 <tr><td>FLOAT32
857 <tr><td>QASYMMS8
858 <tr><td>QASYMMU8
859 <tr><td>QSYMMS8
860 <tr><td>QSYMMS16
861 </table>
862<tr>
863 <td>CpuAcc
864 <td>
865 <ul>
866 <li>N/A
867 </ul>
868 <td>
869 <ul>
870 <li>N/A
871 </ul>
872<tr>
873 <td>GpuAcc
874 <td>
875 <ul>
876 <li>N/A
877 </ul>
878 <td>
879 <ul>
880 <li>N/A
881 </ul>
882<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]883 <td rowspan="1">DebugLayer
884 <td rowspan="1" style="width:200px;"> Layer to print out inter layer tensor information.
885 <td rowspan="1">
886 <ul>
887 <li>N/A
888 </ul>
889 <td>CpuRef
890 <td>
891 <ul>
892 <li>All
893 </ul>
894 <td>
895 <table>
896 <tr><th>
897 <tr><td>BFLOAT16
898 <tr><td>FLOAT16
899 <tr><td>FLOAT32
900 <tr><td>QASYMMS8
901 <tr><td>QASYMMU8
902 <tr><td>QSYMMS8
903 <tr><td>QSYMMS16
904 <tr><td>SIGNED32
905 </table>
906<tr>
907 <td rowspan="3">DepthToSpaceLayer
908 <td rowspan="3" style="width:200px;"> Layer to perform Depth to Space transformation.
909 <td rowspan="3">
910 <ul>
911 <li>ANEURALNETWORKS_DEPTH_TO_SPACE
912 </ul>
913 <td>CpuRef
914 <td>
915 <ul>
916 <li>All
917 </ul>
918 <td>
919 <table>
920 <tr><th>
921 <tr><td>BFLOAT16
922 <tr><td>FLOAT16
923 <tr><td>FLOAT32
924 <tr><td>QASYMMS8
925 <tr><td>QASYMMU8
926 <tr><td>QSYMMS16
927 </table>
928<tr>
929 <td>CpuAcc
930 <td>
931 <ul>
932 <li>NHWC
933 <li>NCHW
934 </ul>
935 <td>
936 <table>
937 <tr><th>
938 <tr><td>All
939 </table>
940<tr>
941 <td>GpuAcc
942 <td>
943 <ul>
944 <li>NHWC
945 <li>NCHW
946 </ul>
947 <td>
948 <table>
949 <tr><th>
950 <tr><td>All
951 </table>
952<tr>
953 <td rowspan="3">DepthwiseConvolution2dLayer
954 <td rowspan="3" style="width:200px;"> Layer to compute a deconvolution or transpose convolution.
955 <td rowspan="3">
956 <ul>
957 <li>ANEURALNETWORKS_DEPTHWISE_CONV_2D
958 </ul>
959 <td>CpuRef
960 <td>
961 <ul>
962 <li>All
963 </ul>
964 <td>
965 <table>
966 <tr><th>
967 <tr><td>BFLOAT16
968 <tr><td>FLOAT16
969 <tr><td>FLOAT32
970 <tr><td>QASYMMS8
971 <tr><td>QASYMMU8
972 <tr><td>QSYMMS8
973 <tr><td>QSYMMS16
974 </table>
975<tr>
976 <td>CpuAcc
977 <td>
978 <ul>
979 <li>NHWC
980 <li>NCHW
981 </ul>
982 <td>
983 <table>
984 <tr><th>
985 <tr><td>FLOAT16
986 <tr><td>FLOAT32
987 <tr><td>SIGNED32
988 <tr><td>QASYMMU8
989 <tr><td>QASYMMS8
990 <tr><td>QUANTIZEDSYMM8PERAXIS
991 </table>
992<tr>
993 <td>GpuAcc
994 <td>
995 <ul>
996 <li>NHWC
997 <li>NCHW
998 </ul>
999 <td>
1000 <table>
1001 <tr><th>
1002 <tr><td>FLOAT16
1003 <tr><td>FLOAT32
1004 <tr><td>SIGNED32
1005 <tr><td>QASYMMU8
1006 <tr><td>QASYMMS8
1007 <tr><td>QUANTIZEDSYMM8PERAXIS
1008 </table>
1009<tr>
1010 <td rowspan="3">DequantizeLayer
1011 <td rowspan="3" style="width:200px;"> Layer to dequantize the values in a tensor.
1012 <td rowspan="3">
1013 <ul>
1014 <li>ANEURALNETWORKS_DEQUANTIZE
1015 </ul>
1016 <td>CpuRef
1017 <td>
1018 <ul>
1019 <li>All
1020 </ul>
1021 <td>
1022 <table>
1023 <tr><th>
1024 <tr><td>QASYMMS8
1025 <tr><td>QASYMMU8
1026 <tr><td>QSYMMS8
1027 <tr><td>QSYMMS16
1028 </table>
1029<tr>
1030 <td>CpuAcc
1031 <td>
1032 <ul>
1033 <li>All
1034 </ul>
1035 <td>
1036 <table>
1037 <tr><th>
1038 <tr><td>FLOAT16
1039 <tr><td>FLOAT32
1040 <tr><td>QASYMMU8
1041 <tr><td>QASYMMS8
1042 <tr><td>QUANTIZEDSYMM8PERAXIS
1043 <tr><td>QSYMMS8
1044 <tr><td>QSYMMS16
1045 </table>
1046<tr>
1047 <td>GpuAcc
1048 <td>
1049 <ul>
1050 <li>All
1051 </ul>
1052 <td>
1053 <table>
1054 <tr><th>
1055 <tr><td>FLOAT16
1056 <tr><td>FLOAT32
1057 <tr><td>QASYMMU8
1058 <tr><td>QASYMMS8
1059 <tr><td>QUANTIZEDSYMM8PERAXIS
1060 <tr><td>QSYMMS8
1061 <tr><td>QSYMMS16
1062 </table>
1063<tr>
1064 <td rowspan="2">DetectionPostProcessLayer
1065 <td rowspan="2" style="width:200px;"> Layer to generate the detection output based on center size encoded boxes, class prediction and anchors by doing non maximum suppression (NMS).
1066 <td rowspan="2">
1067 <ul>
1068 <li>ANEURALNETWORKS_DETECTION_POSTPROCESSING
1069 </ul>
1070 <td>CpuRef
1071 <td>
1072 <ul>
1073 <li>All
1074 </ul>
1075 <td>
1076 <table>
1077 <tr><th>
1078 <tr><td>BFLOAT16
1079 <tr><td>FLOAT16
1080 <tr><td>FLOAT32
1081 <tr><td>QASYMMS8
1082 <tr><td>QASYMMU8
1083 <tr><td>QSYMMS16
1084 </table>
1085<tr>
1086 <td>CpuAcc
1087 <td>
1088 <ul>
1089 <li>All
1090 </ul>
1091 <td>
1092 <table>
1093 <tr><th>
1094 <tr><td>QASYMMU8
1095 <tr><td>QASYMMS8
1096 <tr><td>FLOAT32
1097 </table>
1098<tr>
1099 <td rowspan="3">DivisionLayer
1100 <td rowspan="3" style="width:200px;"> Layer to divide 2 tensors.
1101 <td rowspan="3">
1102 <ul>
1103 <li>ANEURALNETWORKS_DIV
1104 </ul>
1105 <td>CpuRef
1106 <td>
1107 <ul>
1108 <li>All
1109 </ul>
1110 <td>
1111 <table>
1112 <tr><th>
1113 <tr><td>BFLOAT16
1114 <tr><td>FLOAT16
1115 <tr><td>FLOAT32
1116 <tr><td>QASYMMS8
1117 <tr><td>QASYMMU8
1118 <tr><td>QSYMMS16
1119 <tr><td>SIGNED32
1120 </table>
1121<tr>
1122 <td>CpuAcc
1123 <td>
1124 <ul>
1125 <li>All
1126 </ul>
1127 <td>
1128 <table>
1129 <tr><th>
1130 <tr><td>FLOAT16
1131 <tr><td>FLOAT32
1132 </table>
1133<tr>
1134 <td>GpuAcc
1135 <td>
1136 <ul>
1137 <li>All
1138 </ul>
1139 <td>
1140 <table>
1141 <tr><th>
1142 <tr><td>FLOAT16
1143 <tr><td>FLOAT32
1144 </table>
1145<tr>
1146 <td rowspan="3">ElementwiseBaseLayer
1147 <td rowspan="3" style="width:200px;"> Layer to perform Add - Div - Max - Min - Mul operations.
1148 <td rowspan="3">
1149 <ul>
1150 <li>ANEURALNETWORKS_ADD
1151 <li>ANEURALNETWORKS_DIV
1152 <li>ANEURALNETWORKS_MAXIMUM
1153 <li>ANEURALNETWORKS_MINIMUM
1154 <li>ANEURALNETWORKS_MUL
1155 </ul>
1156 <td>CpuRef
1157 <td>
1158 <ul>
1159 <li>All
1160 </ul>
1161 <td>
1162 <table>
1163 <tr><th>
1164 <tr><td>BFLOAT16
1165 <tr><td>FLOAT16
1166 <tr><td>FLOAT32
1167 <tr><td>QASYMMS8
1168 <tr><td>QASYMMU8
1169 <tr><td>QSYMMS16
1170 <tr><td>SIGNED32
1171 </table>
1172<tr>
1173 <td>CpuAcc
1174 <td>
1175 <ul>
1176 <li>All
1177 </ul>
1178 <td>
1179 <table>
1180 <tr><th>
1181 <tr><td>QASYMMU8
1182 <tr><td>QASYMMS8
1183 <tr><td>QSYMMS16
1184 <tr><td>SIGNED32
1185 <tr><td>FLOAT16
1186 <tr><td>FLOAT32
1187 </table>
1188<tr>
1189 <td>GpuAcc
1190 <td>
1191 <ul>
1192 <li>All
1193 </ul>
1194 <td>
1195 <table>
1196 <tr><th>
1197 <tr><td>QASYMMU8
1198 <tr><td>QASYMMS8
1199 <tr><td>QSYMMS16
1200 <tr><td>SIGNED32
1201 <tr><td>FLOAT16
1202 <tr><td>FLOAT32
1203 </table>
1204<tr>
1205 <td rowspan="3">ElementwiseUnaryLayer
1206 <td rowspan="3" style="width:200px;"> Layer to perform Rsqrt - Exp - Neg - Log - Abs - Sin - Sqrt operations.
1207 <td rowspan="3">
1208 <ul>
1209 <li>ANEURALNETWORKS_ABS
1210 <li>ANEURALNETWORKS_EXP
1211 <li>ANEURALNETWORKS_LOG
1212 <li>ANEURALNETWORKS_NEG
1213 <li>ANEURALNETWORKS_RSQRT
1214 <li>ANEURALNETWORKS_SIN
1215 <li>ANEURALNETWORKS_SQRT
1216 </ul>
1217 <td>CpuRef
1218 <td>
1219 <ul>
1220 <li>All
1221 </ul>
1222 <td>
1223 <table>
1224 <tr><th>
1225 <tr><td>BFLOAT16
1226 <tr><td>FLOAT16
1227 <tr><td>FLOAT32
1228 <tr><td>QASYMMS8
1229 <tr><td>QASYMMU8
1230 <tr><td>QSYMMS16
1231 </table>
1232<tr>
1233 <td>CpuAcc
1234 <td>
1235 <ul>
1236 <li>All
1237 </ul>
1238 <td>
1239 <table>
1240 <tr><th>
1241 <tr><td>FLOAT16
1242 <tr><td>FLOAT32
1243 <tr><td>SIGNED32
1244 </table>
1245<tr>
1246 <td>GpuAcc
1247 <td>
1248 <ul>
1249 <li>All
1250 </ul>
1251 <td>
1252 <table>
1253 <tr><th>
1254 <tr><td>FLOAT16
1255 <tr><td>FLOAT32
1256 </table>
1257<tr>
1258 <td rowspan="1">FakeQuantizationLayer
1259 <td rowspan="1" style="width:200px;"> Layer to quantize float values and dequantize afterwards. The current implementation does not dequantize the values.
1260 <td rowspan="1">
1261 <ul>
1262 <li>N/A
1263 </ul>
1264 <td>CpuRef
1265 <td>
1266 <ul>
1267 <li>All
1268 </ul>
1269 <td>
1270 <table>
1271 <tr><th>
1272 <tr><td>FLOAT32
1273 </table>
1274<tr>
1275 <td rowspan="3">FillLayer
1276 <td rowspan="3" style="width:200px;"> Layer to set the values of a tensor with a given value.
1277 <td rowspan="3">
1278 <ul>
1279 <li>ANEURALNETWORKS_FILL
1280 </ul>
1281 <td>CpuRef
1282 <td>
1283 <ul>
1284 <li>All
1285 </ul>
1286 <td>
1287 <table>
1288 <tr><th>
1289 <tr><td>FLOAT16
1290 <tr><td>FLOAT32
1291 <tr><td>SIGNED32
1292 </table>
1293<tr>
1294 <td>CpuAcc
1295 <td>
1296 <ul>
1297 <li>All
1298 </ul>
1299 <td>
1300 <table>
1301 <tr><th>
1302 <tr><td>All
1303 </table>
1304<tr>
1305 <td>GpuAcc
1306 <td>
1307 <ul>
1308 <li>All
1309 </ul>
1310 <td>
1311 <table>
1312 <tr><th>
1313 <tr><td>All
1314 </table>
1315<tr>
1316 <td rowspan="3">FloorLayer
1317 <td rowspan="3" style="width:200px;"> Layer to round the value to the lowest whole number.
1318 <td rowspan="3">
1319 <ul>
1320 <li>ANEURALNETWORKS_FLOOR
1321 </ul>
1322 <td>CpuRef
1323 <td>
1324 <ul>
1325 <li>All
1326 </ul>
1327 <td>
1328 <table>
1329 <tr><th>
1330 <tr><td>BFLOAT16
1331 <tr><td>FLOAT16
1332 <tr><td>FLOAT32
1333 </table>
1334<tr>
1335 <td>CpuAcc
1336 <td>
1337 <ul>
1338 <li>All
1339 </ul>
1340 <td>
1341 <table>
1342 <tr><th>
1343 <tr><td>FLOAT32
1344 <tr><td>FLOAT16
1345 </table>
1346<tr>
1347 <td>GpuAcc
1348 <td>
1349 <ul>
1350 <li>All
1351 </ul>
1352 <td>
1353 <table>
1354 <tr><th>
1355 <tr><td>FLOAT32
1356 <tr><td>FLOAT16
1357 </table>
1358<tr>
1359 <td rowspan="3">FullyConnectedLayer
1360 <td rowspan="3" style="width:200px;"> Layer to perform a fully connected / dense operation.
1361 <td rowspan="3">
1362 <ul>
1363 <li>ANEURALNETWORKS_FULLY_CONNECTED
1364 </ul>
1365 <td>CpuRef
1366 <td>
1367 <ul>
1368 <li>All
1369 </ul>
1370 <td>
1371 <table>
1372 <tr><th>
1373 <tr><td>BFLOAT16
1374 <tr><td>FLOAT16
1375 <tr><td>FLOAT32
1376 <tr><td>QASYMMS8
1377 <tr><td>QASYMMU8
1378 <tr><td>QSYMMS16
1379 </table>
1380<tr>
1381 <td>CpuAcc
1382 <td>
1383 <ul>
1384 <li>NHWC
1385 <li>NCHW
1386 </ul>
1387 <td>
1388 <table>
1389 <tr><th>
1390 <tr><td>SIGNED32
1391 <tr><td>FLOAT16
1392 <tr><td>FLOAT32
1393 <tr><td>QASYMMU8
1394 <tr><td>QASYMMS8
1395 </table>
1396<tr>
1397 <td>GpuAcc
1398 <td>
1399 <ul>
1400 <li>NHWC
1401 <li>NCHW
1402 </ul>
1403 <td>
1404 <table>
1405 <tr><th>
1406 <tr><td>SIGNED32
1407 <tr><td>FLOAT16
1408 <tr><td>FLOAT32
1409 <tr><td>QASYMMU8
1410 <tr><td>QASYMMS8
1411 </table>
1412<tr>
1413 <td rowspan="3">GatherLayer
1414 <td rowspan="3" style="width:200px;"> Layer to perform the gather operation along the chosen axis.
1415 <td rowspan="3">
1416 <ul>
1417 <li>ANEURALNETWORKS_GATHER
1418 </ul>
1419 <td>CpuRef
1420 <td>
1421 <ul>
1422 <li>All
1423 </ul>
1424 <td>
1425 <table>
1426 <tr><th>
1427 <tr><td>BFLOAT16
1428 <tr><td>FLOAT16
1429 <tr><td>FLOAT32
1430 <tr><td>QASYMMS8
1431 <tr><td>QASYMMU8
1432 <tr><td>QSYMMS16
1433 <tr><td>SIGNED32
1434 </table>
1435<tr>
1436 <td>CpuAcc
1437 <td>
1438 <ul>
1439 <li>All
1440 </ul>
1441 <td>
1442 <table>
1443 <tr><th>
1444 <tr><td>All
1445 </table>
1446<tr>
1447 <td>GpuAcc
1448 <td>
1449 <ul>
1450 <li>All
1451 </ul>
1452 <td>
1453 <table>
1454 <tr><th>
1455 <tr><td>All
1456 </table>
1457<tr>
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1458 <td rowspan="3">GatherNdLayer
1459 <td rowspan="3" style="width:200px;"> Layer to perform the gatherNd operation.
1460 <td rowspan="3">
1461 <ul>
1462 <li>N/A
1463 </ul>
1464 <td>CpuRef
1465 <td>
1466 <ul>
1467 <li>All
1468 </ul>
1469 <td>
1470 <table>
1471 <tr><th>
1472 <tr><td>BFLOAT16
1473 <tr><td>FLOAT16
1474 <tr><td>FLOAT32
1475 <tr><td>QASYMMS8
1476 <tr><td>QASYMMU8
1477 <tr><td>QSYMMS16
1478 <tr><td>SIGNED32
1479 </table>
1480<tr>
1481 <td>CpuAcc
1482 <td>
1483 <ul>
Teresa Charlinbd22c7d2022-04-26 18:14:12 +0100[diff] [blame]1484 <li>All
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1485 </ul>
1486 <td>
Teresa Charlinbd22c7d2022-04-26 18:14:12 +0100[diff] [blame]1487 <table>
1488 <tr><th>
1489 <tr><td>BFLOAT16
1490 <tr><td>FLOAT16
1491 <tr><td>FLOAT32
1492 <tr><td>QASYMMS8
1493 <tr><td>QASYMMU8
1494 <tr><td>QSYMMS16
1495 <tr><td>SIGNED32
1496 </table>
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1497<tr>
1498 <td>GpuAcc
1499 <td>
1500 <ul>
Teresa Charlin989e2f62022-04-27 16:26:11 +0100[diff] [blame]1501 <li>All
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1502 </ul>
1503 <td>
Teresa Charlin989e2f62022-04-27 16:26:11 +0100[diff] [blame]1504 <table>
1505 <tr><th>
1506 <tr><td>BFLOAT16
1507 <tr><td>FLOAT16
1508 <tr><td>FLOAT32
1509 <tr><td>QASYMMS8
1510 <tr><td>QASYMMU8
1511 <tr><td>QSYMMS16
1512 <tr><td>SIGNED32
1513 </table>
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1514<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]1515 <td rowspan="1">InputLayer
1516 <td rowspan="1" style="width:200px;"> Special layer used to provide input data to the computational network.
1517 <td rowspan="1">
1518 <ul>
1519 <li>N/A
1520 </ul>
1521 <td>All
1522 <td>
1523 <ul>
1524 <li>All
1525 </ul>
1526 <td>
1527 <table>
1528 <tr><th>
1529 <tr><td>All
1530 </table>
1531<tr>
1532 <td rowspan="3">InstanceNormalizationLayer
1533 <td rowspan="3" style="width:200px;"> Layer to perform an instance normalization on a given axis.
1534 <td rowspan="3">
1535 <ul>
1536 <li>ANEURALNETWORKS_INSTANCE_NORMALIZATION
1537 </ul>
1538 <td>CpuRef
1539 <td>
1540 <ul>
1541 <li>All
1542 </ul>
1543 <td>
1544 <table>
1545 <tr><th>
1546 <tr><td>BFLOAT16
1547 <tr><td>FLOAT16
1548 <tr><td>FLOAT32
1549 </table>
1550<tr>
1551 <td>CpuAcc
1552 <td>
1553 <ul>
1554 <li>NHWC
1555 <li>NCHW
1556 </ul>
1557 <td>
1558 <table>
1559 <tr><th>
1560 <tr><td>FLOAT16
1561 <tr><td>FLOAT32
1562 </table>
1563<tr>
1564 <td>GpuAcc
1565 <td>
1566 <ul>
1567 <li>NHWC
1568 <li>NCHW
1569 </ul>
1570 <td>
1571 <table>
1572 <tr><th>
1573 <tr><td>FLOAT16
1574 <tr><td>FLOAT32
1575 </table>
1576<tr>
1577 <td rowspan="3">L2NormalizationLayer
1578 <td rowspan="3" style="width:200px;"> Layer to perform an L2 normalization on a given axis.
1579 <td rowspan="3">
1580 <ul>
1581 <li>ANEURALNETWORKS_L2_NORMALIZATION
1582 </ul>
1583 <td>CpuRef
1584 <td>
1585 <ul>
1586 <li>All
1587 </ul>
1588 <td>
1589 <table>
1590 <tr><th>
1591 <tr><td>BFLOAT16
1592 <tr><td>FLOAT16
1593 <tr><td>FLOAT32
1594 <tr><td>QASYMMS8
1595 <tr><td>QASYMMU8
1596 <tr><td>QSYMMS16
1597 </table>
1598<tr>
1599 <td>CpuAcc
1600 <td>
1601 <ul>
1602 <li>NHWC
1603 <li>NCHW
1604 </ul>
1605 <td>
1606 <table>
1607 <tr><th>
1608 <tr><td>FLOAT16
1609 <tr><td>FLOAT32
1610 </table>
1611<tr>
1612 <td>GpuAcc
1613 <td>
1614 <ul>
1615 <li>NHWC
1616 <li>NCHW
1617 </ul>
1618 <td>
1619 <table>
1620 <tr><th>
1621 <tr><td>FLOAT16
1622 <tr><td>FLOAT32
1623 </table>
1624<tr>
1625 <td rowspan="3">LogSoftmaxLayer
1626 <td rowspan="3" style="width:200px;"> Layer to perform the log softmax activations given logits.
1627 <td rowspan="3">
1628 <ul>
1629 <li>N/A
1630 </ul>
1631 <td>CpuRef
1632 <td>
1633 <ul>
1634 <li>All
1635 </ul>
1636 <td>
1637 <table>
1638 <tr><th>
1639 <tr><td>BFLOAT16
1640 <tr><td>FLOAT16
1641 <tr><td>FLOAT32
1642 </table>
1643<tr>
1644 <td>CpuAcc
1645 <td>
1646 <ul>
1647 <li>All
1648 </ul>
1649 <td>
1650 <table>
1651 <tr><th>
1652 <tr><td>QASYMMU8
1653 <tr><td>QASYMMS8
1654 <tr><td>FLOAT16
1655 <tr><td>FLOAT32
1656 </table>
1657<tr>
1658 <td>GpuAcc
1659 <td>
1660 <ul>
1661 <li>All
1662 </ul>
1663 <td>
1664 <table>
1665 <tr><th>
1666 <tr><td>QASYMMU8
1667 <tr><td>QASYMMS8
1668 <tr><td>FLOAT16
1669 <tr><td>FLOAT32
1670 </table>
1671<tr>
1672 <td rowspan="3">LogicalBinaryLayer
1673 <td rowspan="3" style="width:200px;"> Layer to perform Logical AND - Logical NOT - Logical OR operations.
1674 <td rowspan="3">
1675 <ul>
1676 <li>ANEURALNETWORKS_LOGICAL_AND
1677 <li>ANEURALNETWORKS_LOGICAL_NOT
1678 <li>ANEURALNETWORKS_LOGICAL_OR
1679 </ul>
1680 <td>CpuRef
1681 <td>
1682 <ul>
1683 <li>All
1684 </ul>
1685 <td>
1686 <table>
1687 <tr><th>
1688 <tr><td>BOOLEAN
1689 </table>
1690<tr>
1691 <td>CpuAcc
1692 <td>
1693 <ul>
1694 <li>All
1695 </ul>
1696 <td>
1697 <table>
1698 <tr><th>
1699 <tr><td>BOOLEAN
1700 </table>
1701<tr>
1702 <td>GpuAcc
1703 <td>
1704 <ul>
1705 <li>All
1706 </ul>
1707 <td>
1708 <table>
1709 <tr><th>
1710 <tr><td>BOOLEAN
1711 </table>
1712<tr>
1713 <td rowspan="3">LstmLayer
1714 <td rowspan="3" style="width:200px;"> Layer to perform a single time step in a Long Short-Term Memory (LSTM) operation.
1715 <td rowspan="3">
1716 <ul>
1717 <li>ANEURALNETWORKS_LSTM
1718 </ul>
1719 <td>CpuRef
1720 <td>
1721 <ul>
1722 <li>All
1723 </ul>
1724 <td>
1725 <table>
1726 <tr><th>
1727 <tr><td>BFLOAT16
1728 <tr><td>FLOAT16
1729 <tr><td>QSYMMS16
1730 </table>
1731<tr>
1732 <td>CpuAcc
1733 <td>
1734 <ul>
1735 <li>All
1736 </ul>
1737 <td>
1738 <table>
1739 <tr><th>
1740 <tr><td>FLOAT16
1741 <tr><td>FLOAT32
1742 </table>
1743<tr>
1744 <td>GpuAcc
1745 <td>
1746 <ul>
1747 <li>All
1748 </ul>
1749 <td>
1750 <table>
1751 <tr><th>
1752 <tr><td>FLOAT16
1753 <tr><td>FLOAT32
1754 </table>
1755<tr>
1756 <td rowspan="3">MapLayer
1757 <td rowspan="3" style="width:200px;"> Layer to perform map operation on tensor.
1758 <td rowspan="3">
1759 <ul>
1760 <li>N/A
1761 </ul>
1762 <td>CpuRef
1763 <td>
1764 <ul>
1765 <li>All
1766 </ul>
1767 <td>
1768 <table>
1769 <tr><th>
1770 <tr><td>All
1771 </table>
1772<tr>
1773 <td>CpuAcc
1774 <td>
1775 <ul>
1776 <li>All
1777 </ul>
1778 <td>
1779 <table>
1780 <tr><th>
1781 <tr><td>All
1782 </table>
1783<tr>
1784 <td>GpuAcc
1785 <td>
1786 <ul>
1787 <li>All
1788 </ul>
1789 <td>
1790 <table>
1791 <tr><th>
1792 <tr><td>All
1793 </table>
1794<tr>
1795 <td rowspan="3">MaximumLayer
1796 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise maximum of two tensors.
1797 <td rowspan="3">
1798 <ul>
1799 <li>N/A
1800 </ul>
1801 <td>CpuRef
1802 <td>
1803 <ul>
1804 <li>All
1805 </ul>
1806 <td>
1807 <table>
1808 <tr><th>
1809 <tr><td>BFLOAT16
1810 <tr><td>FLOAT16
1811 <tr><td>FLOAT32
1812 <tr><td>QASYMMS8
1813 <tr><td>QASYMMU8
1814 <tr><td>QSYMMS16
1815 <tr><td>SIGNED32
1816 </table>
1817<tr>
1818 <td>CpuAcc
1819 <td>
1820 <ul>
1821 <li>All
1822 </ul>
1823 <td>
1824 <table>
1825 <tr><th>
1826 <tr><td>QASYMMU8
1827 <tr><td>QASYMMS8
1828 <tr><td>FLOAT16
1829 <tr><td>FLOAT32
1830 <tr><td>SIGNED32
1831 </table>
1832<tr>
1833 <td>GpuAcc
1834 <td>
1835 <ul>
1836 <li>All
1837 </ul>
1838 <td>
1839 <table>
1840 <tr><th>
1841 <tr><td>QASYMMU8
1842 <tr><td>QASYMMS8
1843 <tr><td>QSYMMS16
1844 <tr><td>FLOAT16
1845 <tr><td>FLOAT32
1846 <tr><td>SIGNED32
1847 </table>
1848<tr>
1849 <td rowspan="3">MeanLayer
1850 <td rowspan="3" style="width:200px;"> Layer to perform reduce mean operation.
1851 <td rowspan="3">
1852 <ul>
1853 <li>ANEURALNETWORKS_MEAN
1854 </ul>
1855 <td>CpuRef
1856 <td>
1857 <ul>
1858 <li>All
1859 </ul>
1860 <td>
1861 <table>
1862 <tr><th>
1863 <tr><td>BFLOAT16
1864 <tr><td>FLOAT16
1865 <tr><td>FLOAT32
1866 <tr><td>QASYMMS8
1867 <tr><td>QASYMMU8
1868 <tr><td>QSYMMS16
1869 </table>
1870<tr>
1871 <td>CpuAcc
1872 <td>
1873 <ul>
1874 <li>All
1875 </ul>
1876 <td>
1877 <table>
1878 <tr><th>
1879 <tr><td>QASYMMU8
1880 <tr><td>QASYMMS8
1881 <tr><td>FLOAT16
1882 <tr><td>FLOAT32
1883 </table>
1884<tr>
1885 <td>GpuAcc
1886 <td>
1887 <ul>
1888 <li>All
1889 </ul>
1890 <td>
1891 <table>
1892 <tr><th>
1893 <tr><td>QASYMMU8
1894 <tr><td>QASYMMS8
1895 <tr><td>FLOAT16
1896 <tr><td>FLOAT32
1897 </table>
1898<tr>
1899 <td rowspan="3">MemCopyLayer
1900 <td rowspan="3" style="width:200px;"> Layer to perform memory copy operation.
1901 <td rowspan="3">
1902 <ul>
1903 <li>N/A
1904 </ul>
1905 <td>CpuRef
1906 <td>
1907 <ul>
1908 <li>All
1909 </ul>
1910 <td>
1911 <table>
1912 <tr><th>
1913 <tr><td>BFLOAT16
1914 <tr><td>FLOAT16
1915 <tr><td>FLOAT32
1916 <tr><td>QASYMMS8
1917 <tr><td>QASYMMU8
1918 <tr><td>QSYMMS16
1919 <tr><td>BOOLEAN
1920 </table>
1921<tr>
1922 <td>CpuAcc
1923 <td>
1924 <ul>
1925 <li>All
1926 </ul>
1927 <td>
1928 <table>
1929 <tr><th>
1930 <tr><td>All
1931 </table>
1932<tr>
1933 <td>GpuAcc
1934 <td>
1935 <ul>
1936 <li>All
1937 </ul>
1938 <td>
1939 <table>
1940 <tr><th>
1941 <tr><td>All
1942 </table>
1943<tr>
1944 <td rowspan="3">MemImportLayer
1945 <td rowspan="3" style="width:200px;"> Layer to perform memory import operation.
1946 <td rowspan="3">
1947 <ul>
1948 <li>N/A
1949 </ul>
1950 <td>CpuRef
1951 <td>
1952 <ul>
1953 <li>All
1954 </ul>
1955 <td>
1956 <table>
1957 <tr><th>
1958 <tr><td>All
1959 </table>
1960<tr>
1961 <td>CpuAcc
1962 <td>
1963 <ul>
1964 <li>All
1965 </ul>
1966 <td>
1967 <table>
1968 <tr><th>
1969 <tr><td>All
1970 </table>
1971<tr>
1972 <td>GpuAcc
1973 <td>
1974 <ul>
1975 <li>All
1976 </ul>
1977 <td>
1978 <table>
1979 <tr><th>
1980 <tr><td>All
1981 </table>
1982<tr>
1983 <td rowspan="3">MergeLayer
1984 <td rowspan="3" style="width:200px;"> Layer to concatenate tensors along a given axis.
1985 <td rowspan="3">
1986 <ul>
1987 <li>ANEURALNETWORKS_CONCATENATION
1988 </ul>
1989 <td>CpuRef
1990 <td>
1991 <ul>
1992 <li>All
1993 </ul>
1994 <td>
1995 <table>
1996 <tr><th>
1997 <tr><td>BFLOAT16
1998 <tr><td>FLOAT16
1999 <tr><td>FLOAT32
2000 <tr><td>QASYMMS8
2001 <tr><td>QASYMMU8
2002 <tr><td>QSYMMS16
2003 </table>
2004<tr>
2005 <td>CpuAcc
2006 <td>
2007 <ul>
2008 <li>All
2009 </ul>
2010 <td>
2011 <table>
2012 <tr><th>
2013 <tr><td>QASYMMU8
2014 <tr><td>QASYMMS8
2015 <tr><td>FLOAT16
2016 <tr><td>FLOAT32
2017 </table>
2018<tr>
2019 <td>GpuAcc
2020 <td>
2021 <ul>
2022 <li>All
2023 </ul>
2024 <td>
2025 <table>
2026 <tr><th>
2027 <tr><td>QASYMMU8
2028 <tr><td>QASYMMS8
2029 <tr><td>FLOAT16
2030 <tr><td>FLOAT32
2031 </table>
2032<tr>
2033 <td rowspan="3">MinimumLayer
2034 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise minimum of two tensors.
2035 <td rowspan="3">
2036 <ul>
2037 <li>ANEURALNETWORKS_MINIMUM
2038 </ul>
2039 <td>CpuRef
2040 <td>
2041 <ul>
2042 <li>All
2043 </ul>
2044 <td>
2045 <table>
2046 <tr><th>
2047 <tr><td>BFLOAT16
2048 <tr><td>FLOAT16
2049 <tr><td>FLOAT32
2050 <tr><td>QASYMMS8
2051 <tr><td>QASYMMU8
2052 <tr><td>QSYMMS16
2053 <tr><td>SIGNED32
2054 </table>
2055<tr>
2056 <td>CpuAcc
2057 <td>
2058 <ul>
2059 <li>All
2060 </ul>
2061 <td>
2062 <table>
2063 <tr><th>
2064 <tr><td>QASYMMU8
2065 <tr><td>QASYMMS8
2066 <tr><td>QSYMMS16
2067 <tr><td>FLOAT16
2068 <tr><td>FLOAT32
2069 </table>
2070<tr>
2071 <td>GpuAcc
2072 <td>
2073 <ul>
2074 <li>All
2075 </ul>
2076 <td>
2077 <table>
2078 <tr><th>
2079 <tr><td>QASYMMU8
2080 <tr><td>QASYMMS8
2081 <tr><td>QSYMMS16
2082 <tr><td>FLOAT16
2083 <tr><td>FLOAT32
2084 <tr><td>SIGNED32
2085 </table>
2086<tr>
2087 <td rowspan="3">MultiplicationLayer
2088 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise multiplication of two tensors.
2089 <td rowspan="3">
2090 <ul>
2091 <li>ANEURALNETWORKS_MUL
2092 </ul>
2093 <td>CpuRef
2094 <td>
2095 <ul>
2096 <li>All
2097 </ul>
2098 <td>
2099 <table>
2100 <tr><th>
2101 <tr><td>BFLOAT16
2102 <tr><td>FLOAT16
2103 <tr><td>FLOAT32
2104 <tr><td>QASYMMS8
2105 <tr><td>QASYMMU8
2106 <tr><td>QSYMMS16
2107 <tr><td>SIGNED32
2108 </table>
2109<tr>
2110 <td>CpuAcc
2111 <td>
2112 <ul>
2113 <li>All
2114 </ul>
2115 <td>
2116 <table>
2117 <tr><th>
2118 <tr><td>QASYMMU8
2119 <tr><td>QASYMMS8
2120 <tr><td>QSYMMS16
2121 <tr><td>SIGNED32
2122 <tr><td>FLOAT16
2123 <tr><td>FLOAT32
2124 </table>
2125<tr>
2126 <td>GpuAcc
2127 <td>
2128 <ul>
2129 <li>All
2130 </ul>
2131 <td>
2132 <table>
2133 <tr><th>
2134 <tr><td>QASYMMU8
2135 <tr><td>QASYMMS8
2136 <tr><td>QSYMMS16
2137 <tr><td>SIGNED32
2138 <tr><td>FLOAT16
2139 <tr><td>FLOAT32
2140 <tr><td>SIGNED32
2141 </table>
2142<tr>
2143 <td rowspan="3">NormalizationLayer
2144 <td rowspan="3" style="width:200px;"> Layer to compute normalization operation.
2145 <td rowspan="3">
2146 <ul>
2147 <li>ANEURALNETWORKS_LOCAL_RESPONSE_NORMALIZATION
2148 </ul>
2149 <td>CpuRef
2150 <td>
2151 <ul>
2152 <li>All
2153 </ul>
2154 <td>
2155 <table>
2156 <tr><th>
2157 <tr><td>BFLOAT16
2158 <tr><td>FLOAT16
2159 <tr><td>FLOAT32
2160 <tr><td>QASYMMS8
2161 <tr><td>QASYMMU8
2162 <tr><td>QSYMMS16
2163 </table>
2164<tr>
2165 <td>CpuAcc
2166 <td>
2167 <ul>
2168 <li>NHWC
2169 <li>NCHW
2170 </ul>
2171 <td>
2172 <table>
2173 <tr><th>
2174 <tr><td>FLOAT32
2175 <tr><td>FLOAT16
2176 </table>
2177<tr>
2178 <td>GpuAcc
2179 <td>
2180 <ul>
2181 <li>NHWC
2182 <li>NCHW
2183 </ul>
2184 <td>
2185 <table>
2186 <tr><th>
2187 <tr><td>FLOAT32
2188 <tr><td>FLOAT16
2189 </table>
2190<tr>
2191 <td rowspan="1">OutputLayer
2192 <td rowspan="1" style="width:200px;"> A special layer providing access to a user supplied buffer into which the output of a network can be written.
2193 <td rowspan="1">
2194 <ul>
2195 <li>N/A
2196 </ul>
2197 <td>All
2198 <td>
2199 <ul>
2200 <li>All
2201 </ul>
2202 <td>
2203 <table>
2204 <tr><th>
2205 <tr><td>All
2206 </table>
2207<tr>
2208 <td rowspan="3">PadLayer
2209 <td rowspan="3" style="width:200px;"> Layer to pad a tensor.
2210 <td rowspan="3">
2211 <ul>
2212 <li>ANEURALNETWORKS_PAD
2213 <li>ANEURALNETWORKS_PAD_V2
2214 </ul>
2215 <td>CpuRef
2216 <td>
2217 <ul>
2218 <li>All
2219 </ul>
2220 <td>
2221 <table>
2222 <tr><th>
2223 <tr><td>BFLOAT16
2224 <tr><td>FLOAT16
2225 <tr><td>FLOAT32
2226 <tr><td>QASYMMS8
2227 <tr><td>QASYMMU8
2228 <tr><td>QSYMMS16
2229 </table>
2230<tr>
2231 <td>CpuAcc
2232 <td>
2233 <ul>
2234 <li>NHWC
2235 <li>NCHW
2236 </ul>
2237 <td>
2238 <table>
2239 <tr><th>
2240 <tr><td>All
2241 </table>
2242<tr>
2243 <td>GpuAcc
2244 <td>
2245 <ul>
2246 <li>NHWC
2247 <li>NCHW
2248 </ul>
2249 <td>
2250 <table>
2251 <tr><th>
2252 <tr><td>All
2253 </table>
2254<tr>
2255 <td rowspan="3">PermuteLayer
2256 <td rowspan="3" style="width:200px;"> Layer to transpose an ND tensor.
2257 <td rowspan="3">
2258 <ul>
2259 <li>ANEURALNETWORKS_TRANSPOSE
2260 </ul>
2261 <td>CpuRef
2262 <td>
2263 <ul>
2264 <li>All
2265 </ul>
2266 <td>
2267 <table>
2268 <tr><th>
2269 <tr><td>BFLOAT16
2270 <tr><td>FLOAT16
2271 <tr><td>FLOAT32
2272 <tr><td>QASYMMS8
2273 <tr><td>QASYMMU8
2274 <tr><td>QSYMMS16
2275 </table>
2276<tr>
2277 <td>CpuAcc
2278 <td>
2279 <ul>
2280 <li>NHWC
2281 <li>NCHW
2282 </ul>
2283 <td>
2284 <table>
2285 <tr><th>
2286 <tr><td>All
2287 </table>
2288<tr>
2289 <td>GpuAcc
2290 <td>
2291 <ul>
2292 <li>NHWC
2293 <li>NCHW
2294 </ul>
2295 <td>
2296 <table>
2297 <tr><th>
2298 <tr><td>All
2299 </table>
2300<tr>
2301 <td rowspan="3">Pooling2dLayer
Tamás Nyíri7b885b32021-10-26 14:47:57 +0100[diff] [blame]2302 <td rowspan="3" style="width:200px;"> Layer to perform 2D pooling with the specified pooling operation.
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2303 <td rowspan="3">
2304 <ul>
2305 <li>ANEURALNETWORKS_AVERAGE_POOL_2D
2306 <li>ANEURALNETWORKS_L2_POOL_2D
2307 <li>ANEURALNETWORKS_MAX_POOL_2D
2308 </ul>
2309 <td>CpuRef
2310 <td>
2311 <ul>
2312 <li>All
2313 </ul>
2314 <td>
2315 <table>
2316 <tr><th>
2317 <tr><td>BFLOAT16
2318 <tr><td>FLOAT16
2319 <tr><td>FLOAT32
2320 <tr><td>QASYMMS8
2321 <tr><td>QASYMMU8
2322 <tr><td>QSYMMS16
2323 </table>
2324<tr>
2325 <td>CpuAcc
2326 <td>
2327 <ul>
2328 <li>NHWC
2329 <li>NCHW
2330 </ul>
2331 <td>
2332 <table>
2333 <tr><th>
2334 <tr><td>QASYMMU8
2335 <tr><td>QASYMMS8
2336 <tr><td>FLOAT16
2337 <tr><td>FLOAT32
2338 </table>
2339<tr>
2340 <td>GpuAcc
2341 <td>
2342 <ul>
2343 <li>NHWC
2344 <li>NCHW
2345 </ul>
2346 <td>
2347 <table>
2348 <tr><th>
2349 <tr><td>QASYMMU8
2350 <tr><td>QASYMMS8
2351 <tr><td>FLOAT16
2352 <tr><td>FLOAT32
2353 </table>
2354<tr>
Tamás Nyíri7b885b32021-10-26 14:47:57 +0100[diff] [blame]2355 <td rowspan="3">Pooling3dLayer
2356 <td rowspan="3" style="width:200px;"> Layer to perform 3D pooling with the specified pooling operation.
2357 <td rowspan="3">
2358 <ul>
2359 <li>ANEURALNETWORKS_AVERAGE_POOL_3D
2360 <li>ANEURALNETWORKS_L2_POOL_3D
2361 <li>ANEURALNETWORKS_MAX_POOL_3D
2362 </ul>
2363 <td>CpuRef
2364 <td>
2365 <ul>
2366 <li>NDHWC
2367 </ul>
2368 <td>
2369 <table>
2370 <tr><th>
2371 <tr><td>BFLOAT16
2372 <tr><td>FLOAT16
2373 <tr><td>FLOAT32
2374 <tr><td>QASYMMS8
2375 <tr><td>QASYMMU8
2376 <tr><td>QSYMMS16
2377 </table>
2378<tr>
2379 <td>CpuAcc
2380 <td>
2381 <ul>
2382 <li>NA
2383 </ul>
2384 <td>
2385<tr>
2386 <td>GpuAcc
2387 <td>
2388 <ul>
2389 <li>NDHWC
2390 </ul>
2391<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2392 <td rowspan="1">PreCompiledLayer
2393 <td rowspan="1" style="width:200px;"> Opaque layer provided by a backend which provides an executable representation of a subgraph from the original network.
2394 <td rowspan="1">
2395 <ul>
2396 <li>N/A
2397 </ul>
2398 <td>N/A
2399 <td>N/A
2400 <td>N/A
2401<tr>
2402 <td rowspan="3">PreluLayer
2403 <td rowspan="3" style="width:200px;"> Layer to compute the activation layer with the PRELU activation function.
2404 <td rowspan="3">
2405 <ul>
2406 <li>ANEURALNETWORKS_PRELU
2407 </ul>
2408 <td>CpuRef
2409 <td>
2410 <ul>
2411 <li>All
2412 </ul>
2413 <td>
2414 <table>
2415 <tr><th>
2416 <tr><td>BFLOAT16
2417 <tr><td>FLOAT16
2418 <tr><td>FLOAT32
2419 <tr><td>QASYMMS8
2420 <tr><td>QASYMMU8
2421 <tr><td>QSYMMS16
2422 </table>
2423<tr>
2424 <td>CpuAcc
2425 <td>
2426 <ul>
2427 <li>All
2428 </ul>
2429 <td>
2430 <table>
2431 <tr><th>
2432 <tr><td>QASYMMU8
2433 <tr><td>QASYMMS8
2434 <tr><td>FLOAT16
2435 <tr><td>FLOAT32
2436 </table>
2437<tr>
2438 <td>GpuAcc
2439 <td>
2440 <ul>
2441 <li>All
2442 </ul>
2443 <td>
2444 <table>
2445 <tr><th>
2446 <tr><td>QASYMMU8
2447 <tr><td>QASYMMS8
2448 <tr><td>FLOAT16
2449 <tr><td>FLOAT32
2450 </table>
2451<tr>
2452 <td rowspan="3">QLstmLayer
2453 <td rowspan="3" style="width:200px;"> Layer to perform quantized LSTM (Long Short-Term Memory) operation.
2454 <td rowspan="3">
2455 <ul>
2456 <li>ANEURALNETWORKS_QUANTIZED_LSTM
2457 <li>ANEURALNETWORKS_QUANTIZED_16BIT_LSTM
2458 </ul>
2459 <td>CpuRef
2460 <td>
2461 <ul>
2462 <li>All
2463 </ul>
2464 <td>
2465 <table>
2466 <tr><th>
2467 <tr><td>All
2468 </table>
2469<tr>
2470 <td>CpuAcc
2471 <td>
2472 <ul>
2473 <li>All
2474 </ul>
2475 <td>
2476 <table>
2477 <tr><th>
2478 <tr><td>QASYMMS8
2479 <tr><td>QASYMMU8
2480 <tr><td>SIGNED32
2481 <tr><td>QSYMMS16
2482 </table>
2483<tr>
2484 <td>GpuAcc
2485 <td>
2486 <ul>
2487 <li>All
2488 </ul>
2489 <td>
2490 <table>
2491 <tr><th>
2492 <tr><td>QASYMMS8
2493 <tr><td>QASYMMU8
2494 <tr><td>SIGNED32
2495 <tr><td>QSYMMS16
2496 </table>
2497<tr>
2498 <td rowspan="3">QuantizeLayer
2499 <td rowspan="3" style="width:200px;"> Layer to perform quantization operation.
2500 <td rowspan="3">
2501 <ul>
2502 <li>ANEURALNETWORKS_QUANTIZE
2503 </ul>
2504 <td>CpuRef
2505 <td>
2506 <ul>
2507 <li>All
2508 </ul>
2509 <td>
2510 <table>
2511 <tr><th>
2512 <tr><td>BFLOAT16
2513 <tr><td>FLOAT16
2514 <tr><td>FLOAT32
2515 <tr><td>QASYMMS8
2516 <tr><td>QASYMMU8
2517 <tr><td>QSYMMS8
2518 <tr><td>QSYMMS16
2519 </table>
2520<tr>
2521 <td>CpuAcc
2522 <td>
2523 <ul>
2524 <li>All
2525 </ul>
2526 <td>
2527 <table>
2528 <tr><th>
2529 <tr><td>QASYMMU8
2530 <tr><td>QASYMMS8
2531 <tr><td>QASYMM16
2532 <tr><td>FLOAT16
2533 <tr><td>FLOAT32
2534 </table>
2535<tr>
2536 <td>GpuAcc
2537 <td>
2538 <ul>
2539 <li>All
2540 </ul>
2541 <td>
2542 <table>
2543 <tr><th>
2544 <tr><td>QASYMMU8
2545 <tr><td>QASYMMS8
2546 <tr><td>QASYMM16
2547 <tr><td>FLOAT16
2548 <tr><td>FLOAT32
2549 </table>
2550<tr>
2551 <td rowspan="3">QuantizedLstmLayer
2552 <td rowspan="3" style="width:200px;"> Layer to perform quantized LSTM (Long Short-Term Memory) operation.
2553 <td rowspan="3">
2554 <ul>
2555 <li>ANEURALNETWORKS_QUANTIZED_LSTM
2556 <li>ANEURALNETWORKS_QUANTIZED_16BIT_LSTM
2557 </ul>
2558 <td>CpuRef
2559 <td>
2560 <ul>
2561 <li>All
2562 </ul>
2563 <td>
2564 <table>
2565 <tr><th>
2566 <tr><td>All
2567 </table>
2568<tr>
2569 <td>CpuAcc
2570 <td>
2571 <ul>
2572 <li>All
2573 </ul>
2574 <td>
2575 <table>
2576 <tr><th>
2577 <tr><td>SIGNED32
2578 <tr><td>QASYMMU8
2579 <tr><td>QSYMMS16
2580 </table>
2581<tr>
2582 <td>GpuAcc
2583 <td>
2584 <ul>
2585 <li>All
2586 </ul>
2587 <td>
2588 <table>
2589 <tr><th>
2590 <tr><td>SIGNED32
2591 <tr><td>QASYMMU8
2592 <tr><td>QSYMMS16
2593 </table>
2594<tr>
2595 <td rowspan="3">RankLayer
2596 <td rowspan="3" style="width:200px;"> Layer to perform a rank operation.
2597 <td rowspan="3">
2598 <ul>
2599 <li>ANEURALNETWORKS_RANK
2600 </ul>
2601 <td>CpuRef
2602 <td>
2603 <ul>
2604 <li>All
2605 </ul>
2606 <td>
2607 <table>
2608 <tr><th>
2609 <tr><td>All
2610 </table>
2611<tr>
2612 <td>CpuAcc
2613 <td>
2614 <ul>
2615 <li>All
2616 </ul>
2617 <td>
2618 <table>
2619 <tr><th>
2620 <tr><td>All
2621 </table>
2622<tr>
2623 <td>GpuAcc
2624 <td>
2625 <ul>
2626 <li>All
2627 </ul>
2628 <td>
2629 <table>
2630 <tr><th>
2631 <tr><td>All
2632 </table>
2633<tr>
2634 <td rowspan="3">ReduceLayer
2635 <td rowspan="3" style="width:200px;"> Layer to perform reduce with the following operations - ARG_IDX_MAX: Index of the max value - ARG_IDX_MIN: Index of the min value - MEAN_SUM: Mean of sum - PROD: Product - SUM_SQUARE: Sum of squares - SUM: Sum - MIN: Min - MAX: Max
2636 <td rowspan="3">
2637 <ul>
2638 <li>ANEURALNETWORKS_REDUCE_MAX
2639 <li>ANEURALNETWORKS_REDUCE_MIN
2640 <li>ANEURALNETWORKS_REDUCE_SUM
Teresa Charlin32b78702021-09-03 11:25:54 +0100[diff] [blame]2641 <li>ANEURALNETWORKS_REDUCE_PROD
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2642 </ul>
2643 <td>CpuRef
2644 <td>
2645 <ul>
2646 <li>All
2647 </ul>
2648 <td>
2649 <table>
2650 <tr><th>
2651 <tr><td>BFLOAT16
2652 <tr><td>FLOAT16
2653 <tr><td>FLOAT32
2654 <tr><td>QASYMMS8
2655 <tr><td>QASYMMU8
2656 <tr><td>QSYMMS16
2657 <tr><td>SIGNED32
2658 </table>
2659<tr>
2660 <td>CpuAcc
2661 <td>
2662 <ul>
2663 <li>All
2664 </ul>
2665 <td>
2666 <table>
2667 <tr><th>
2668 <tr><td>QASYMMU8
2669 <tr><td>QASYMMS8
2670 <tr><td>FLOAT16
2671 <tr><td>FLOAT32
2672 <tr><td>SIGNED32
2673 </table>
2674<tr>
2675 <td>GpuAcc
2676 <td>
2677 <ul>
2678 <li>All
2679 </ul>
2680 <td>
2681 <table>
2682 <tr><th>
2683 <tr><td>QASYMMU8
2684 <tr><td>QASYMMS8
2685 <tr><td>FLOAT16
2686 <tr><td>FLOAT32
2687 <tr><td>SIGNED32
2688 </table>
2689<tr>
2690 <td rowspan="3">ReshapeLayer
2691 <td rowspan="3" style="width:200px;"> Layer to reshape a tensor.
2692 <td rowspan="3">
2693 <ul>
2694 <li>ANEURALNETWORKS_RESHAPE
2695 <li>ANEURALNETWORKS_SQUEEZE
2696 <li>ANEURALNETWORKS_EXPAND_DIMS
2697 </ul>
2698 <td>CpuRef
2699 <td>
2700 <ul>
2701 <li>All
2702 </ul>
2703 <td>
2704 <table>
2705 <tr><th>
2706 <tr><td>BFLOAT16
2707 <tr><td>FLOAT16
2708 <tr><td>FLOAT32
2709 <tr><td>QASYMMS8
2710 <tr><td>QASYMMU8
2711 <tr><td>QSYMMS16
2712 <tr><td>SIGNED32
2713 <tr><td>BOOLEAN
2714 </table>
2715<tr>
2716 <td>CpuAcc
2717 <td>
2718 <ul>
2719 <li>All
2720 </ul>
2721 <td>
2722 <table>
2723 <tr><th>
2724 <tr><td>All
2725 </table>
2726<tr>
2727 <td>GpuAcc
2728 <td>
2729 <ul>
2730 <li>All
2731 </ul>
2732 <td>
2733 <table>
2734 <tr><th>
2735 <tr><td>All
2736 </table>
2737<tr>
2738 <td rowspan="3">ResizeLayer
2739 <td rowspan="3" style="width:200px;"> Layer to perform resize of a tensor using one of the interpolation methods: - Bilinear - Nearest Neighbor.
2740 <td rowspan="3">
2741 <ul>
2742 <li>ANEURALNETWORKS_RESIZE_BILINEAR
2743 <li>ANEURALNETWORKS_RESIZE_NEAREST_NEIGHBOR
2744 </ul>
2745 <td>CpuRef
2746 <td>
2747 <ul>
2748 <li>All
2749 </ul>
2750 <td>
2751 <table>
2752 <tr><th>
2753 <tr><td>BFLOAT16
2754 <tr><td>FLOAT16
2755 <tr><td>FLOAT32
2756 <tr><td>QASYMMS8
2757 <tr><td>QASYMMU8
2758 <tr><td>QSYMMS16
2759 </table>
2760<tr>
2761 <td>CpuAcc
2762 <td>
2763 <ul>
2764 <li>NHWC
2765 <li>NCHW
2766 </ul>
2767 <td>
2768 <table>
2769 <tr><th>
2770 <tr><td>QASYMMU8
2771 <tr><td>QASYMMS8
2772 <tr><td>FLOAT16
2773 <tr><td>FLOAT32
2774 </table>
2775<tr>
2776 <td>GpuAcc
2777 <td>
2778 <ul>
2779 <li>NHWC
2780 <li>NCHW
2781 </ul>
2782 <td>
2783 <table>
2784 <tr><th>
2785 <tr><td>QASYMMU8
2786 <tr><td>QASYMMS8
2787 <tr><td>FLOAT16
2788 <tr><td>FLOAT32
2789 </table>
2790<tr>
2791 <td rowspan="3">RsqrtLayer
2792 <td rowspan="3" style="width:200px;"> Layer to perform Rsqrt operation.
2793 <td rowspan="3">
2794 <ul>
2795 <li>ANEURALNETWORKS_RSQRT
2796 </ul>
2797 <td>CpuRef
2798 <td>
2799 <ul>
2800 <li>All
2801 </ul>
2802 <td>
2803 <table>
2804 <tr><th>
2805 <tr><td>BFLOAT16
2806 <tr><td>FLOAT16
2807 <tr><td>FLOAT32
2808 <tr><td>QASYMMS8
2809 <tr><td>QASYMMU8
2810 <tr><td>QSYMMS16
2811 <tr><td>SIGNED32
2812 </table>
2813<tr>
2814 <td>CpuAcc
2815 <td>
2816 <ul>
2817 <li>All
2818 </ul>
2819 <td>
2820 <table>
2821 <tr><th>
2822 <tr><td>FLOAT16
2823 <tr><td>FLOAT32
2824 <tr><td>SIGNED32
2825 </table>
2826<tr>
2827 <td>GpuAcc
2828 <td>
2829 <ul>
2830 <li>All
2831 </ul>
2832 <td>
2833 <table>
2834 <tr><th>
2835 <tr><td>FLOAT16
2836 <tr><td>FLOAT32
2837 </table>
2838<tr>
2839 <td rowspan="3">ShapeLayer
2840 <td rowspan="3" style="width:200px;"> Layer to return the shape of the input tensor.
2841 <td rowspan="3">
2842 <ul>
2843 <li>N/A
2844 </ul>
2845 <td>CpuRef
2846 <td>
2847 <ul>
2848 <li>All
2849 </ul>
2850 <td>
2851 <table>
2852 <tr><th>
2853 <tr><td>All
2854 </table>
2855<tr>
2856 <td>CpuAcc
2857 <td>
2858 <ul>
2859 <li>All
2860 </ul>
2861 <td>
2862 <table>
2863 <tr><th>
2864 <tr><td>All
2865 </table>
2866<tr>
2867 <td>GpuAcc
2868 <td>
2869 <ul>
2870 <li>All
2871 </ul>
2872 <td>
2873 <table>
2874 <tr><th>
2875 <tr><td>All
2876 </table>
2877<tr>
2878 <td rowspan="3">SliceLayer
2879 <td rowspan="3" style="width:200px;"> Layer to perform tensor slicing.
2880 <td rowspan="3">
2881 <ul>
2882 <li>ANEURALNETWORKS_SLICE
2883 </ul>
2884 <td>CpuRef
2885 <td>
2886 <ul>
2887 <li>All
2888 </ul>
2889 <td>
2890 <table>
2891 <tr><th>
2892 <tr><td>BFLOAT16
2893 <tr><td>FLOAT32
2894 <tr><td>QASYMMS8
2895 <tr><td>QASYMMU8
2896 <tr><td>QSYMMS16
2897 </table>
2898<tr>
2899 <td>CpuAcc
2900 <td>
2901 <ul>
2902 <li>All
2903 </ul>
2904 <td>
2905 <table>
2906 <tr><th>
2907 <tr><td>All
2908 </table>
2909<tr>
2910 <td>GpuAcc
2911 <td>
2912 <ul>
2913 <li>All
2914 </ul>
2915 <td>
2916 <table>
2917 <tr><th>
2918 <tr><td>All
2919 </table>
2920<tr>
2921 <td rowspan="3">SoftmaxLayer
2922 <td rowspan="3" style="width:200px;"> Layer to perform softmax, log-softmax operation over the specified axis.
2923 <td rowspan="3">
2924 <ul>
2925 <li>ANEURALNETWORKS_LOG_SOFTMAX
2926 <li>ANEURALNETWORKS_SOFTMAX
2927 </ul>
2928 <td>CpuRef
2929 <td>
2930 <ul>
2931 <li>All
2932 </ul>
2933 <td>
2934 <table>
2935 <tr><th>
2936 <tr><td>BFLOAT16
2937 <tr><td>FLOAT16
2938 <tr><td>FLOAT32
2939 <tr><td>QASYMMS8
2940 <tr><td>QASYMMU8
2941 <tr><td>QSYMMS8
2942 <tr><td>QSYMMS16
2943 </table>
2944<tr>
2945 <td>CpuAcc
2946 <td>
2947 <ul>
2948 <li>All
2949 </ul>
2950 <td>
2951 <table>
2952 <tr><th>
2953 <tr><td>QASYMMU8
2954 <tr><td>QASYMMS8
2955 <tr><td>FLOAT16
2956 <tr><td>FLOAT32
2957 </table>
2958<tr>
2959 <td>GpuAcc
2960 <td>
2961 <ul>
2962 <li>All
2963 </ul>
2964 <td>
2965 <table>
2966 <tr><th>
2967 <tr><td>QASYMMU8
2968 <tr><td>QASYMMS8
2969 <tr><td>FLOAT16
2970 <tr><td>FLOAT32
2971 </table>
2972<tr>
2973 <td rowspan="3">SpaceToBatchNdLayer
2974 <td rowspan="3" style="width:200px;"> Layer to divide spatial dimensions of the tensor into a grid of blocks and interleaves these blocks with the batch dimension.
2975 <td rowspan="3">
2976 <ul>
2977 <li>ANEURALNETWORKS_SPACE_TO_BATCH_ND
2978 </ul>
2979 <td>CpuRef
2980 <td>
2981 <ul>
2982 <li>All
2983 </ul>
2984 <td>
2985 <table>
2986 <tr><th>
2987 <tr><td>BFLOAT16
2988 <tr><td>FLOAT16
2989 <tr><td>FLOAT32
2990 <tr><td>QASYMMS8
2991 <tr><td>QASYMMU8
2992 <tr><td>QSYMMS16
2993 </table>
2994<tr>
2995 <td>CpuAcc
2996 <td>
2997 <ul>
2998 <li>NHWC
2999 <li>NCHW
3000 </ul>
3001 <td>
3002 <table>
3003 <tr><th>
3004 <tr><td>All
3005 </table>
3006<tr>
3007 <td>GpuAcc
3008 <td>
3009 <ul>
3010 <li>NHWC
3011 <li>NCHW
3012 </ul>
3013 <td>
3014 <table>
3015 <tr><th>
3016 <tr><td>All
3017 </table>
3018<tr>
3019 <td rowspan="3">SpaceToDepthLayer
3020 <td rowspan="3" style="width:200px;"> Layer to rearrange blocks of spatial data into depth.
3021 <td rowspan="3">
3022 <ul>
3023 <li>ANEURALNETWORKS_SPACE_TO_DEPTH
3024 </ul>
3025 <td>CpuRef
3026 <td>
3027 <ul>
3028 <li>All
3029 </ul>
3030 <td>
3031 <table>
3032 <tr><th>
3033 <tr><td>BFLOAT16
3034 <tr><td>FLOAT16
3035 <tr><td>FLOAT32
3036 <tr><td>QASYMMS8
3037 <tr><td>QASYMMU8
3038 <tr><td>QSYMMS16
3039 </table>
3040<tr>
3041 <td>CpuAcc
3042 <td>
3043 <ul>
3044 <li>NHWC
3045 <li>NCHW
3046 </ul>
3047 <td>
3048 <table>
3049 <tr><th>
3050 <tr><td>All
3051 </table>
3052<tr>
3053 <td>GpuAcc
3054 <td>
3055 <ul>
3056 <li>NHWC
3057 <li>NCHW
3058 </ul>
3059 <td>
3060 <table>
3061 <tr><th>
3062 <tr><td>All
3063 </table>
3064<tr>
3065 <td rowspan="3">SplitterLayer
3066 <td rowspan="3" style="width:200px;"> Layer to split a tensor along a given axis.
3067 <td rowspan="3">
3068 <ul>
3069 <li>ANEURALNETWORKS_SPLIT
3070 </ul>
3071 <td>CpuRef
3072 <td>
3073 <ul>
3074 <li>All
3075 </ul>
3076 <td>
3077 <table>
3078 <tr><th>
3079 <tr><td>BFLOAT16
3080 <tr><td>FLOAT16
3081 <tr><td>FLOAT32
3082 <tr><td>QASYMMS8
3083 <tr><td>QASYMMU8
3084 <tr><td>QSYMMS16
3085 </table>
3086<tr>
3087 <td>CpuAcc
3088 <td>
3089 <ul>
3090 <li>All
3091 </ul>
3092 <td>
3093 <table>
3094 <tr><th>
3095 <tr><td>All
3096 </table>
3097<tr>
3098 <td>GpuAcc
3099 <td>
3100 <ul>
3101 <li>All
3102 </ul>
3103 <td>
3104 <table>
3105 <tr><th>
3106 <tr><td>All
3107 </table>
3108<tr>
3109 <td rowspan="3">StackLayer
3110 <td rowspan="3" style="width:200px;"> Layer to stack tensors along an axis.
3111 <td rowspan="3">
3112 <ul>
3113 <li>N/A
3114 </ul>
3115 <td>CpuRef
3116 <td>
3117 <ul>
3118 <li>All
3119 </ul>
3120 <td>
3121 <table>
3122 <tr><th>
3123 <tr><td>BFLOAT16
3124 <tr><td>FLOAT16
3125 <tr><td>FLOAT32
3126 <tr><td>QASYMMS8
3127 <tr><td>QASYMMU8
3128 <tr><td>QSYMMS16
3129 </table>
3130<tr>
3131 <td>CpuAcc
3132 <td>
3133 <ul>
3134 <li>All
3135 </ul>
3136 <td>
3137 <table>
3138 <tr><th>
3139 <tr><td>All
3140 </table>
3141<tr>
3142 <td>GpuAcc
3143 <td>
3144 <ul>
3145 <li>All
3146 </ul>
3147 <td>
3148 <table>
3149 <tr><th>
3150 <tr><td>All
3151 </table>
3152<tr>
3153 <td rowspan="1">StandInLayer
3154 <td rowspan="1" style="width:200px;"> A layer to represent "unknown" or "unsupported" operations in the input graph. It has a configurable number of input and output slots and an optional name.
3155 <td rowspan="1">
3156 <ul>
3157 <li>N/A
3158 </ul>
3159 <td>N/A
3160 <td>N/A
3161 <td>N/A
3162<tr>
3163 <td rowspan="3">StridedSliceLayer
3164 <td rowspan="3" style="width:200px;"> Layer to extract a strided slice of a tensor.
3165 <td rowspan="3">
3166 <ul>
3167 <li>ANEURALNETWORKS_STRIDED_SLICE
3168 </ul>
3169 <td>CpuRef
3170 <td>
3171 <ul>
3172 <li>All
3173 </ul>
3174 <td>
3175 <table>
3176 <tr><th>
3177 <tr><td>BFLOAT16
3178 <tr><td>FLOAT32
3179 <tr><td>QASYMMS8
3180 <tr><td>QASYMMU8
3181 <tr><td>QSYMMS16
3182 </table>
3183<tr>
3184 <td>CpuAcc
3185 <td>
3186 <ul>
3187 <li>All
3188 </ul>
3189 <td>
3190 <table>
3191 <tr><th>
3192 <tr><td>All
3193 </table>
3194<tr>
3195 <td>GpuAcc
3196 <td>
3197 <ul>
3198 <li>All
3199 </ul>
3200 <td>
3201 <table>
3202 <tr><th>
3203 <tr><td>All
3204 </table>
3205<tr>
3206 <td rowspan="3">SubtractionLayer
3207 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise subtract of 2 tensors.
3208 <td rowspan="3">
3209 <ul>
3210 <li>ANEURALNETWORKS_SUB
3211 </ul>
3212 <td>CpuRef
3213 <td>
3214 <ul>
3215 <li>All
3216 </ul>
3217 <td>
3218 <table>
3219 <tr><th>
3220 <tr><td>BFLOAT16
3221 <tr><td>FLOAT16
3222 <tr><td>FLOAT32
3223 <tr><td>QASYMMS8
3224 <tr><td>QASYMMU8
3225 <tr><td>QSYMMS16
3226 <tr><td>SIGNED32
3227 </table>
3228<tr>
3229 <td>CpuAcc
3230 <td>
3231 <ul>
3232 <li>All
3233 </ul>
3234 <td>
3235 <table>
3236 <tr><th>
3237 <tr><td>QASYMMU8
3238 <tr><td>QASYMMS8
3239 <tr><td>QSYMMS16
3240 <tr><td>SIGNED32
3241 <tr><td>FLOAT16
3242 <tr><td>FLOAT32
3243 </table>
3244<tr>
3245 <td>GpuAcc
3246 <td>
3247 <ul>
3248 <li>All
3249 </ul>
3250 <td>
3251 <table>
3252 <tr><th>
3253 <tr><td>QASYMMU8
3254 <tr><td>QASYMMS8
3255 <tr><td>QSYMMS16
3256 <tr><td>SIGNED32
3257 <tr><td>FLOAT16
3258 <tr><td>FLOAT32
3259 </table>
3260<tr>
3261 <td rowspan="3">TransposeConvolution2dLayer
3262 <td rowspan="3" style="width:200px;"> Layer to perform 2D transpose convolution (deconvolution) operation.
3263 <td rowspan="3">
3264 <ul>
3265 <li>ANEURALNETWORKS_TRANSPOSE_CONV_2D
3266 </ul>
3267 <td>CpuRef
3268 <td>
3269 <ul>
3270 <li>All
3271 </ul>
3272 <td>
3273 <table>
3274 <tr><th>
3275 <tr><td>BFLOAT16
3276 <tr><td>FLOAT16
3277 <tr><td>FLOAT32
3278 <tr><td>QASYMMS8
3279 <tr><td>QASYMMU8
3280 <tr><td>QSYMMS8
3281 <tr><td>QSYMMS16
3282 </table>
3283<tr>
3284 <td>CpuAcc
3285 <td>
3286 <ul>
3287 <li>NHWC
3288 <li>NCHW
3289 </ul>
3290 <td>
3291 <table>
3292 <tr><th>
3293 <tr><td>SIGNED32
3294 <tr><td>FLOAT16
3295 <tr><td>FLOAT32
3296 <tr><td>QASYMMU8
3297 <tr><td>QASYMMS8
3298 <tr><td>QUANTIZEDSYMM8PERAXIS
3299 </table>
3300<tr>
3301 <td>GpuAcc
3302 <td>
3303 <ul>
3304 <li>NHWC
3305 <li>NCHW
3306 </ul>
3307 <td>
3308 <table>
3309 <tr><th>
3310 <tr><td>SIGNED32
3311 <tr><td>FLOAT16
3312 <tr><td>FLOAT32
3313 <tr><td>QASYMMU8
3314 <tr><td>QASYMMS8
3315 <tr><td>QUANTIZEDSYMM8PERAXIS
3316 </table>
3317<tr>
3318 <td rowspan="3">TransposeLayer
3319 <td rowspan="3" style="width:200px;"> Layer to transpose a tensor.
3320 <td rowspan="3">
3321 <ul>
3322 <li>ANEURALNETWORKS_TRANSPOSE
3323 </ul>
3324 <td>CpuRef
3325 <td>
3326 <ul>
3327 <li>All
3328 </ul>
3329 <td>
3330 <table>
3331 <tr><th>
3332 <tr><td>BFLOAT16
3333 <tr><td>FLOAT16
3334 <tr><td>FLOAT32
3335 <tr><td>QASYMMS8
3336 <tr><td>QASYMMU8
3337 <tr><td>QSYMMS16
3338 </table>
3339<tr>
3340 <td>CpuAcc
3341 <td>
3342 <ul>
3343 <li>All
3344 </ul>
3345 <td>
3346 <table>
3347 <tr><th>
3348 <tr><td>All
3349 </table>
3350<tr>
3351 <td>GpuAcc
3352 <td>
3353 <ul>
3354 <li>All
3355 </ul>
3356 <td>
3357 <table>
3358 <tr><th>
3359 <tr><td>All
3360 </table>
3361<tr>
3362 <td rowspan="3">UnidirectionalSquenceLstmLayer
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3363 <td rowspan="3" style="width:200px;"> Layer to perform unidirectional sequence LSTM operation.
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3364 <td rowspan="3">
3365 <ul>
3366 <li>ANEURALNETWORKS_UNIDIRECTIONAL_SEQUENCE_LSTM
3367 </ul>
3368 <td>CpuRef
3369 <td>
3370 <ul>
3371 <li>All
3372 </ul>
3373 <td>
3374 <table>
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3375 <tr><th>Input Types
3376 <tr><td>FLOAT32
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3377 </table>
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3378 <table>
3379 <tr><th>Weight Types
3380 <tr><td>FLOAT32
3381 <tr><td>QASYMMS8
3382 </table>
Cathal Corbettfd5bec42022-03-03 15:13:23 +0000[diff] [blame]3383 <td>CpuAcc
3384 <td>
3385 <ul>
3386 <li>All
3387 </ul>
3388 <td>
3389 <table>
3390 <tr><th>Input Types
3391 <tr><td>FLOAT32
3392 </table>
3393 <table>
3394 <tr><th>Weight Types
3395 <tr><td>FLOAT32
3396 </table>
Cathal Corbett4952a3e2022-03-03 15:14:18 +0000[diff] [blame]3397 <td>GpuAcc
3398 <td>
3399 <ul>
3400 <li>All
3401 </ul>
3402 <td>
3403 <table>
3404 <tr><th>Input Types
3405 <tr><td>FLOAT32
3406 </table>
3407 <table>
3408 <tr><th>Weight Types
3409 <tr><td>FLOAT32
3410 </table>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3411<tr>
3412 <td rowspan="3">UnmapLayer
3413 <td rowspan="3" style="width:200px;"> Layer to perform unmap operation on tensor.
3414 <td rowspan="3">
3415 <ul>
3416 <li>N/A
3417 </ul>
3418 <td>CpuRef
3419 <td>
3420 <ul>
3421 <li>All
3422 </ul>
3423 <td>
3424 <table>
3425 <tr><th>
3426 <tr><td>All
3427 </table>
3428<tr>
3429 <td>CpuAcc
3430 <td>
3431 <ul>
3432 <li>NHWC
3433 <li>NCHW
3434 </ul>
3435 <td>
3436 <table>
3437 <tr><th>
3438 <tr><td>All
3439 </table>
3440<tr>
3441 <td>GpuAcc
3442 <td>
3443 <ul>
3444 <li>NHWC
3445 <li>NCHW
3446 </ul>
3447 <td>
3448 <table>
3449 <tr><th>
3450 <tr><td>All
3451 </table>
3452</table>
3453
3454*/
3455} // namespace