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review.mlplatform.org / ml / armnn / aac61129e4317000c46e37063b010851b0e17d27 / . / docs / 02_operator_list.dox
blob: a02b4da2ff1eca2cde1885567c51dc37bd8ee1c4 [file] [log] [blame]
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]1/// Copyright (c) 2021 ARM Limited and Contributors. All rights reserved.
2///
3/// SPDX-License-Identifier: MIT
4///
5
6namespace armnn
7{
8/**
9@page operator_list Arm NN Operators
10
11@tableofcontents
12
13@section S5_1_operator_list Arm NN Operators
14
15Arm NN supports operators that are listed in below table.
16
17Arm NN supports a wide list of data-types.
18The main data-types that the Machine Learning functions support are the following:
19 <ul>
20 <li><b>BFLOAT16:</b> 16-bit non-standard brain floating point
21 <li><b>QASYMMU8:</b> 8-bit unsigned asymmetric quantized
22 <li><b>QASYMMS8:</b> 8-bit signed asymmetric quantized
23 <li><b>QUANTIZEDSYMM8PERAXIS:</b> 8-bit signed symmetric quantized
Cathal Corbettb85113e2022-02-22 11:51:43 +0000[diff] [blame]24 <li><b>QSYMMS8:</b> 8-bit signed symmetric quantized
25 <li><b>QSYMMS16:</b> 16-bit signed symmetric quantized
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]26 <li><b>FLOAT32:</b> 32-bit single precision floating point
27 <li><b>FLOAT16:</b> 16-bit half precision floating point
28 <li><b>SIGNED32:</b> 32-bit signed integer
29 <li><b>BOOLEAN:</b> 8-bit unsigned char
30 <li><b>All:</b> Agnostic to any specific data type
31 </ul>
32
33Arm NN supports the following data layouts (fast changing dimension from right to left):
34 <ul>
35 <li><b>NHWC:</b> Layout where channels are in the fastest changing dimension
36 <li><b>NCHW:</b> Layout where width is in the fastest changing dimension
37 <li><b>All:</b> Agnostic to any specific data layout
38 </ul>
39where N = batches, C = channels, H = height, W = width
40
41<table>
42<caption id="multi_row"></caption>
43<tr>
44 <th>Operator
45 <th>Description
46 <th>Equivalent Android NNAPI Operator
47 <th>Backends
48 <th>Data Layouts
49 <th>Data Types
50<tr>
51 <td rowspan="3">AbsLayer
52 <td rowspan="3"> Layer to perform absolute operation.
53 <td rowspan="3">
54 <ul>
55 <li>ANEURALNETWORKS_ABS
56 </ul>
57 <td>CpuRef
58 <td>
59 <ul>
60 <li>All
61 </ul>
62 <td>
63 <table>
64 <tr><th>
65 <tr><td>BFLOAT16
66 <tr><td>FLOAT16
67 <tr><td>FLOAT32
68 <tr><td>QASYMMS8
69 <tr><td>QASYMMU8
70 <tr><td>QSYMMS16
71 <tr><td>SIGNED32
72 </table>
73<tr>
74 <td>CpuAcc
75 <td>
76 <ul>
77 <li>All
78 </ul>
79 <td>
80 <table>
81 <tr><th>
82 <tr><td>FLOAT16
83 <tr><td>FLOAT32
84 <tr><td>SIGNED32
85 </table>
86<tr>
87 <td>GpuAcc
88 <td>
89 <ul>
90 <li>All
91 </ul>
92 <td>
93 <table>
94 <tr><th>
95 <tr><td>FLOAT16
96 <tr><td>FLOAT32
97 </table>
98<tr>
99 <td rowspan="3">ActivationLayer
100 <td rowspan="3" style="width:200px;"> Layer to simulate an activation layer with the specified activation function.
101 <td rowspan="3">
102 <ul>
103 <li>ANEURALNETWORKS_ABS
104 <li>ANEURALNETWORKS_ELU
105 <li>ANEURALNETWORKS_HARD_SWISH
106 <li>ANEURALNETWORKS_LOGISTIC
107 <li>ANEURALNETWORKS_PRELU
108 <li>ANEURALNETWORKS_RELU
109 <li>ANEURALNETWORKS_RELU1
110 <li>ANEURALNETWORKS_RELU6
111 <li>ANEURALNETWORKS_SQRT
112 <li>ANEURALNETWORKS_TANH
113 </ul>
114 <td>CpuRef
115 <td>
116 <ul>
117 <li>All
118 </ul>
119 <td>
120 <table>
121 <tr><th>
122 <tr><td>BFLOAT16
123 <tr><td>FLOAT16
124 <tr><td>FLOAT32
125 <tr><td>QASYMMS8
126 <tr><td>QASYMMU8
127 <tr><td>QSYMMS16
128 </table>
129<tr>
130 <td>CpuAcc
131 <td>
132 <ul>
133 <li>All
134 </ul>
135 <td>
136 <table>
137 <tr><th>
138 <tr><td>QASYMMU8
139 <tr><td>QASYMMS8
140 <tr><td>QSYMMS16
141 <tr><td>FLOAT16
142 <tr><td>FLOAT32
143 </table>
144<tr>
145 <td>GpuAcc
146 <td>
147 <ul>
148 <li>All
149 </ul>
150 <td>
151 <table>
152 <tr><th>
153 <tr><td>QASYMMU8
154 <tr><td>QASYMMS8
155 <tr><td>QSYMMS16
156 <tr><td>FLOAT16
157 <tr><td>FLOAT32
158 </table>
159<tr>
160 <td rowspan="3">AdditionLayer
161 <td rowspan="3" style="width:200px;"> Layer to add 2 tensors.
162 <td rowspan="3">
163 <ul>
164 <li>ANEURALNETWORKS_ADD
165 </ul>
166 <td>CpuRef
167 <td>
168 <ul>
169 <li>All
170 </ul>
171 <td>
172 <table>
173 <tr><th>
174 <tr><td>BFLOAT16
175 <tr><td>FLOAT16
176 <tr><td>FLOAT32
177 <tr><td>QASYMMS8
178 <tr><td>QASYMMU8
179 <tr><td>QSYMMS16
180 <tr><td>SIGNED32
181 </table>
182<tr>
183 <td>CpuAcc
184 <td>
185 <ul>
186 <li>All
187 </ul>
188 <td>
189 <table>
190 <tr><th>
191 <tr><td>QASYMMU8
192 <tr><td>QASYMMS8
193 <tr><td>QSYMMS16
194 <tr><td>SIGNED32
195 <tr><td>FLOAT16
196 <tr><td>FLOAT32
197 </table>
198<tr>
199 <td>GpuAcc
200 <td>
201 <ul>
202 <li>All
203 </ul>
204 <td>
205 <table>
206 <tr><th>
207 <tr><td>QASYMMU8
208 <tr><td>QASYMMS8
209 <tr><td>QSYMMS16
210 <tr><td>SIGNED32
211 <tr><td>FLOAT16
212 <tr><td>FLOAT32
213 </table>
214<tr>
215 <td rowspan="3">ArgMinMaxLayer
216 <td rowspan="3" style="width:200px;"> Layer to calculate the index of the minimum or maximum values in a tensor
217 based on an axis.
218 <td rowspan="3">
219 <ul>
220 <li>ANEURALNETWORKS_ARGMAX
221 <li>ANEURALNETWORKS_ARGMIN
222 </ul>
223 <td>CpuRef
224 <td>
225 <ul>
226 <li>All
227 </ul>
228 <td>
229 <table>
230 <tr><th>
231 <tr><td>BFLOAT16
232 <tr><td>FLOAT16
233 <tr><td>FLOAT32
234 <tr><td>QASYMMS8
235 <tr><td>QASYMMU8
236 <tr><td>QSYMMS16
237 <tr><td>SIGNED32
238 <tr><td>SIGNED64
239 </table>
240<tr>
241 <td>CpuAcc
242 <td>
243 <ul>
244 <li>All
245 </ul>
246 <td>
247 <table>
248 <tr><th>
249 <tr><td>QASYMMU8
250 <tr><td>QASYMMS8
251 <tr><td>SIGNED32
252 <tr><td>FLOAT16
253 <tr><td>FLOAT32
254 </table>
255<tr>
256 <td>GpuAcc
257 <td>
258 <ul>
259 <li>All
260 </ul>
261 <td>
262 <table>
263 <tr><th>
264 <tr><td>QASYMMU8
265 <tr><td>QASYMMS8
266 <tr><td>SIGNED32
267 <tr><td>FLOAT16
268 <tr><td>FLOAT32
269 </table>
270<tr>
271 <td rowspan="3">BatchNormalizationLayer
272 <td rowspan="3" style="width:200px;"> Layer to perform batch normalization.
273 <td rowspan="3">
274 <ul>
275 <li>N/A
276 </ul>
277 <td>CpuRef
278 <td>
279 <ul>
280 <li>All
281 </ul>
282 <td>
283 <table>
284 <tr><th>
285 <tr><td>BFLOAT16
286 <tr><td>FLOAT16
287 <tr><td>FLOAT32
288 <tr><td>QASYMMS8
289 <tr><td>QASYMMU8
290 <tr><td>QSYMMS16
291 </table>
292<tr>
293 <td>CpuAcc
294 <td>
295 <ul>
296 <li>NHWC
297 <li>NCHW
298 </ul>
299 <td>
300 <table>
301 <tr><th>
302 <tr><td>FLOAT32
303 <tr><td>FLOAT16
304 </table>
305<tr>
306 <td>GpuAcc
307 <td>
308 <ul>
309 <li>NHWC
310 <li>NCHW
311 </ul>
312 <td>
313 <table>
314 <tr><th>
315 <tr><td>FLOAT32
316 <tr><td>FLOAT16
317 </table>
318<tr>
319 <td rowspan="3">BatchToSpaceNdLayer
320 <td rowspan="3" style="width:200px;"> Layer to perform a batch to space transformation.
321 <td rowspan="3">
322 <ul>
323 <li>ANEURALNETWORKS_BATCH_TO_SPACE_ND
324 </ul>
325 <td>CpuRef
326 <td>
327 <ul>
328 <li>All
329 </ul>
330 <td>
331 <table>
332 <tr><th>
333 <tr><td>BFLOAT16
334 <tr><td>FLOAT16
335 <tr><td>FLOAT32
336 <tr><td>QASYMMS8
337 <tr><td>QASYMMU8
338 <tr><td>QSYMMS16
339 </table>
340<tr>
341 <td>CpuAcc
342 <td>
343 <ul>
344 <li>NHWC
345 <li>NCHW
346 </ul>
347 <td>
348 <table>
349 <tr><th>
350 <tr><td>All
351 </table>
352<tr>
353 <td>GpuAcc
354 <td>
355 <ul>
356 <li>NHWC
357 <li>NCHW
358 </ul>
359 <td>
360 <table>
361 <tr><th>
362 <tr><td>All
363 </table>
364<tr>
365 <td rowspan="3">CastLayer
366 <td rowspan="3" style="width:200px;"> Layer to cast a tensor to a type.
367 <td rowspan="3">
368 <ul>
369 <li>ANEURALNETWORKS_CAST
370 </ul>
371 <td>CpuRef
372 <td>
373 <ul>
374 <li>All
375 </ul>
376 <td>
377 <table>
378 <tr><th>
379 <tr><td>BFLOAT16
380 <tr><td>FLOAT16
381 <tr><td>FLOAT32
382 <tr><td>QSYMMS8
383 <tr><td>QASYMMS8
384 <tr><td>QASYMMU8
385 <tr><td>QSYMMS16
386 <tr><td>SIGNED32
387 </table>
388<tr>
389 <td>CpuAcc
390 <td>
391 <ul>
392 <li>All
393 </ul>
394 <td>
395 <table>
396 <tr><th>
397 <tr><td>QASYMMS8
398 <tr><td>QASYMMU8
399 <tr><td>FLOAT16
400 <tr><td>SIGNED32
401 <tr><td>FLOAT32
402 </table>
403<tr>
404 <td>GpuAcc
405 <td>
406 <ul>
407 <li>All
408 </ul>
409 <td>
410 <table>
411 <tr><th>
412 <tr><td>QASYMMS8
413 <tr><td>QASYMMU8
414 <tr><td>SIGNED32
415 <tr><td>FLOAT16
416 <tr><td>FLOAT32
417 </table>
418<tr>
Teresa Charlincd203852021-09-24 18:15:39 +0100[diff] [blame]419 <td rowspan="3">ChannelShuffleLayer
420 <td rowspan="3" style="width:200px;"> Layer to reorganize the channels of a tensor.
421 <td rowspan="3">
422 <ul>
423 <li>ANEURALNETWORKS_CHANNEL_SHUFFLE
424 </ul>
425 <td>CpuRef
426 <td>
427 <ul>
428 <li>All
429 </ul>
430 <td>
431 <table>
432 <tr><th>
433 <tr><td>FLOAT16
434 <tr><td>FLOAT32
435 <tr><td>QSYMMS8
436 <tr><td>QASYMMS8
437 <tr><td>QASYMMU8
438 </table>
439<tr>
440 <td>CpuAcc
441 <td>
442 <ul>
443 <li>All
444 </ul>
445 <td>
446 <table>
447 <tr><th>
448 <tr><td>QASYMMS8
449 <tr><td>QASYMMU8
450 <tr><td>FLOAT16
451 <tr><td>FLOAT32
452 </table>
453<tr>
454 <td>GpuAcc
455 <td>
456 <ul>
457 <li>All
458 </ul>
459 <td>
460 <table>
461 <tr><th>
462 <tr><td>QASYMMS8
463 <tr><td>QASYMMU8
464 <tr><td>FLOAT16
465 <tr><td>FLOAT32
466 </table>
467<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]468 <td rowspan="3">ComparisonLayer
469 <td rowspan="3" style="width:200px;"> Layer to compare 2 tensors.
470 <td rowspan="3">
471 <ul>
472 <li>ANEURALNETWORKS_EQUAL
473 <li>ANEURALNETWORKS_GREATER
474 <li>ANEURALNETWORKS_GREATER_EQUAL
475 <li>ANEURALNETWORKS_LESS
476 <li>ANEURALNETWORKS_LESS_EQUAL
477 <li>ANEURALNETWORKS_NOT_EQUAL
478 </ul>
479 <td>CpuRef
480 <td>
481 <ul>
482 <li>All
483 </ul>
484 <td>
485 <table>
486 <tr><th>
487 <tr><td>BFLOAT16
488 <tr><td>FLOAT16
489 <tr><td>FLOAT32
490 <tr><td>BOOLEAN
491 <tr><td>QASYMMS8
492 <tr><td>QASYMMU8
493 <tr><td>QSYMMS16
494 <tr><td>SIGNED32
495 </table>
496<tr>
497 <td>CpuAcc
498 <td>
499 <ul>
500 <li>All
501 </ul>
502 <td>
503 <table>
504 <tr><th>
505 <tr><td>All
506 </table>
507<tr>
508 <td>GpuAcc
509 <td>
510 <ul>
511 <li>All
512 </ul>
513 <td>
514 <table>
515 <tr><th>
516 <tr><td>All
517 </table>
518<tr>
519 <td rowspan="3">ConcatLayer
520 <td rowspan="3" style="width:200px;"> Layer to concatenate tensors along a given axis.
521 <td rowspan="3">
522 <ul>
523 <li>ANEURALNETWORKS_CONCATENATION
524 </ul>
525 <td>CpuRef
526 <td>
527 <ul>
528 <li>All
529 </ul>
530 <td>
531 <table>
532 <tr><th>
533 <tr><td>BFLOAT16
534 <tr><td>FLOAT16
535 <tr><td>FLOAT32
536 <tr><td>QASYMMS8
537 <tr><td>QASYMMU8
538 <tr><td>QSYMMS16
539 </table>
540<tr>
541 <td>CpuAcc
542 <td>
543 <ul>
544 <li>All
545 </ul>
546 <td>
547 <table>
548 <tr><th>
549 <tr><td>QASYMMU8
550 <tr><td>QASYMMS8
551 <tr><td>FLOAT16
552 <tr><td>FLOAT32
553 </table>
554<tr>
555 <td>GpuAcc
556 <td>
557 <ul>
558 <li>All
559 </ul>
560 <td>
561 <table>
562 <tr><th>
563 <tr><td>QASYMMU8
564 <tr><td>QASYMMS8
565 <tr><td>FLOAT16
566 <tr><td>FLOAT32
567 </table>
568<tr>
569 <td rowspan="3">ConstantLayer
570 <td rowspan="3" style="width:200px;"> Layer to provide a constant tensor.
571 <td rowspan="3">
572 <ul>
573 <li>N/A
574 </ul>
575 <td>CpuRef
576 <td>
577 <ul>
578 <li>All
579 </ul>
580 <td>
581 <table>
582 <tr><th>
583 <tr><td>BFLOAT16
584 <tr><td>FLOAT16
585 <tr><td>FLOAT32
586 <tr><td>QASYMMS8
587 <tr><td>QASYMMU8
588 <tr><td>QSYMMS8
589 <tr><td>QSYMMS16
590 <tr><td>SIGNED32
591 </table>
592<tr>
593 <td>CpuAcc
594 <td>
595 <ul>
596 <li>All
597 </ul>
598 <td>
599 <table>
600 <tr><th>
601 <tr><td>All
602 </table>
603<tr>
604 <td>GpuAcc
605 <td>
606 <ul>
607 <li>All
608 </ul>
609 <td>
610 <table>
611 <tr><th>
612 <tr><td>All
613 </table>
614<tr>
615 <td rowspan="3">ConvertBf16ToFp32Layer
616 <td rowspan="3" style="width:200px;"> Layer to convert BFloat16 tensor to Float32 tensor.
617 <td rowspan="3">
618 <ul>
619 <li>N/A
620 </ul>
621 <td>CpuRef
622 <td>
623 <ul>
624 <li>All
625 </ul>
626 <td>
627 <table>
628 <tr><th>
629 <tr><td>BFLOAT16
630 <tr><td>FLOAT32
631 </table>
632<tr>
633 <td>CpuAcc
634 <td>
635 <ul>
636 <li>All
637 </ul>
638 <td>
639 <table>
640 <tr><th>
641 <tr><td>BFLOAT16
642 <tr><td>FLOAT32
643 </table>
644<tr>
645 <td>GpuAcc
646 <td>
647 <ul>
648 <li>All
649 </ul>
650 <td>
651 <table>
652 <tr><th>
653 <tr><td>BFLOAT16
654 <tr><td>FLOAT32
655 </table>
656<tr>
657 <td rowspan="3">ConvertFp16ToFp32Layer
658 <td rowspan="3" style="width:200px;"> Layer to convert Float16 tensor to Float32 tensor.
659 <td rowspan="3">
660 <ul>
661 <li>N/A
662 </ul>
663 <td>CpuRef
664 <td>
665 <ul>
666 <li>All
667 </ul>
668 <td>
669 <table>
670 <tr><th>
671 <tr><td>FLOAT16
672 <tr><td>FLOAT32
673 </table>
674<tr>
675 <td>CpuAcc
676 <td>
677 <ul>
678 <li>All
679 </ul>
680 <td>
681 <table>
682 <tr><th>
683 <tr><td>FLOAT16
684 <tr><td>FLOAT32
685 </table>
686<tr>
687 <td>GpuAcc
688 <td>
689 <ul>
690 <li>All
691 </ul>
692 <td>
693 <table>
694 <tr><th>
695 <tr><td>FLOAT16
696 <tr><td>FLOAT32
697 </table>
698<tr>
699 <td rowspan="3">ConvertFp32ToBf16Layer
700 <td rowspan="3" style="width:200px;"> Layer to convert Float32 tensor to BFloat16 tensor.
701 <td rowspan="3">
702 <ul>
703 <li>N/A
704 </ul>
705 <td>CpuRef
706 <td>
707 <ul>
708 <li>All
709 </ul>
710 <td>
711 <table>
712 <tr><th>
713 <tr><td>BFLOAT16
714 <tr><td>FLOAT32
715 </table>
716<tr>
717 <td>CpuAcc
718 <td>
719 <ul>
720 <li>All
721 </ul>
722 <td>
723 <table>
724 <tr><th>
725 <tr><td>BFLOAT16
726 <tr><td>FLOAT32
727 </table>
728<tr>
729 <td>GpuAcc
730 <td>
731 <ul>
732 <li>All
733 </ul>
734 <td>
735 <table>
736 <tr><th>
737 <tr><td>BFLOAT16
738 <tr><td>FLOAT32
739 </table>
740<tr>
741 <td rowspan="3">ConvertFp32ToFp16Layer
742 <td rowspan="3" style="width:200px;"> Layer to convert Float32 tensor to Float16 tensor.
743 <td rowspan="3">
744 <ul>
745 <li>N/A
746 </ul>
747 <td>CpuRef
748 <td>
749 <ul>
750 <li>All
751 </ul>
752 <td>
753 <table>
754 <tr><th>
755 <tr><td>FLOAT16
756 <tr><td>FLOAT32
757 </table>
758<tr>
759 <td>CpuAcc
760 <td>
761 <ul>
762 <li>All
763 </ul>
764 <td>
765 <table>
766 <tr><th>
767 <tr><td>FLOAT16
768 <tr><td>FLOAT32
769 </table>
770<tr>
771 <td>GpuAcc
772 <td>
773 <ul>
774 <li>All
775 </ul>
776 <td>
777 <table>
778 <tr><th>
779 <tr><td>FLOAT16
780 <tr><td>FLOAT32
781 </table>
782<tr>
783 <td rowspan="3">Convolution2dLayer
784 <td rowspan="3" style="width:200px;"> Layer to compute a convolution operation.
785 <td rowspan="3">
786 <ul>
787 <li>ANEURALNETWORKS_CONV_2D
788 <li>ANEURALNETWORKS_GROUPED_CONV_2D
789 </ul>
790 <td>CpuRef
791 <td>
792 <ul>
793 <li>All
794 </ul>
795 <td>
796 <table>
797 <tr><th>
798 <tr><td>BFLOAT16
799 <tr><td>FLOAT16
800 <tr><td>FLOAT32
801 <tr><td>QASYMMS8
802 <tr><td>QASYMMU8
803 <tr><td>QSYMMS16
804 </table>
805<tr>
806 <td>CpuAcc
807 <td>
808 <ul>
809 <li>NHWC
810 <li>NCHW
811 </ul>
812 <td>
813 <table>
814 <tr><th>
815 <tr><td>SIGNED32
816 <tr><td>FLOAT16
817 <tr><td>FLOAT32
818 <tr><td>QASYMMU8
819 <tr><td>QASYMMS8
820 <tr><td>QUANTIZEDSYMM8PERAXIS
821 </table>
822<tr>
823 <td>GpuAcc
824 <td>
825 <ul>
826 <li>NHWC
827 <li>NCHW
828 </ul>
829 <td>
830 <table>
831 <tr><th>
832 <tr><td>SIGNED32
833 <tr><td>FLOAT16
834 <tr><td>FLOAT32
835 <tr><td>QASYMMU8
836 <tr><td>QASYMMS8
837 <tr><td>QUANTIZEDSYMM8PERAXIS
838 </table>
839<tr>
Matthew Sloyanb63a3112021-09-08 13:05:51 +0100[diff] [blame]840 <td rowspan="3">Convolution3dLayer
841 <td rowspan="3" style="width:200px;"> Layer to compute a 3D convolution operation.
842 <td rowspan="3">
843 <ul>
844 <li>N/A
845 </ul>
846 <td>CpuRef
847 <td>
848 <ul>
849 <li>NDHWC
850 </ul>
851 <td>
852 <table>
853 <tr><th>
854 <tr><td>BFLOAT16
855 <tr><td>FLOAT16
856 <tr><td>FLOAT32
857 <tr><td>QASYMMS8
858 <tr><td>QASYMMU8
859 <tr><td>QSYMMS8
860 <tr><td>QSYMMS16
861 </table>
862<tr>
863 <td>CpuAcc
864 <td>
865 <ul>
866 <li>N/A
867 </ul>
868 <td>
869 <ul>
870 <li>N/A
871 </ul>
872<tr>
873 <td>GpuAcc
874 <td>
875 <ul>
876 <li>N/A
877 </ul>
878 <td>
879 <ul>
880 <li>N/A
881 </ul>
882<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]883 <td rowspan="1">DebugLayer
884 <td rowspan="1" style="width:200px;"> Layer to print out inter layer tensor information.
885 <td rowspan="1">
886 <ul>
887 <li>N/A
888 </ul>
889 <td>CpuRef
890 <td>
891 <ul>
892 <li>All
893 </ul>
894 <td>
895 <table>
896 <tr><th>
897 <tr><td>BFLOAT16
898 <tr><td>FLOAT16
899 <tr><td>FLOAT32
900 <tr><td>QASYMMS8
901 <tr><td>QASYMMU8
902 <tr><td>QSYMMS8
903 <tr><td>QSYMMS16
904 <tr><td>SIGNED32
905 </table>
906<tr>
907 <td rowspan="3">DepthToSpaceLayer
908 <td rowspan="3" style="width:200px;"> Layer to perform Depth to Space transformation.
909 <td rowspan="3">
910 <ul>
911 <li>ANEURALNETWORKS_DEPTH_TO_SPACE
912 </ul>
913 <td>CpuRef
914 <td>
915 <ul>
916 <li>All
917 </ul>
918 <td>
919 <table>
920 <tr><th>
921 <tr><td>BFLOAT16
922 <tr><td>FLOAT16
923 <tr><td>FLOAT32
924 <tr><td>QASYMMS8
925 <tr><td>QASYMMU8
926 <tr><td>QSYMMS16
927 </table>
928<tr>
929 <td>CpuAcc
930 <td>
931 <ul>
932 <li>NHWC
933 <li>NCHW
934 </ul>
935 <td>
936 <table>
937 <tr><th>
938 <tr><td>All
939 </table>
940<tr>
941 <td>GpuAcc
942 <td>
943 <ul>
944 <li>NHWC
945 <li>NCHW
946 </ul>
947 <td>
948 <table>
949 <tr><th>
950 <tr><td>All
951 </table>
952<tr>
953 <td rowspan="3">DepthwiseConvolution2dLayer
954 <td rowspan="3" style="width:200px;"> Layer to compute a deconvolution or transpose convolution.
955 <td rowspan="3">
956 <ul>
957 <li>ANEURALNETWORKS_DEPTHWISE_CONV_2D
958 </ul>
959 <td>CpuRef
960 <td>
961 <ul>
962 <li>All
963 </ul>
964 <td>
965 <table>
966 <tr><th>
967 <tr><td>BFLOAT16
968 <tr><td>FLOAT16
969 <tr><td>FLOAT32
970 <tr><td>QASYMMS8
971 <tr><td>QASYMMU8
972 <tr><td>QSYMMS8
973 <tr><td>QSYMMS16
974 </table>
975<tr>
976 <td>CpuAcc
977 <td>
978 <ul>
979 <li>NHWC
980 <li>NCHW
981 </ul>
982 <td>
983 <table>
984 <tr><th>
985 <tr><td>FLOAT16
986 <tr><td>FLOAT32
987 <tr><td>SIGNED32
988 <tr><td>QASYMMU8
989 <tr><td>QASYMMS8
990 <tr><td>QUANTIZEDSYMM8PERAXIS
991 </table>
992<tr>
993 <td>GpuAcc
994 <td>
995 <ul>
996 <li>NHWC
997 <li>NCHW
998 </ul>
999 <td>
1000 <table>
1001 <tr><th>
1002 <tr><td>FLOAT16
1003 <tr><td>FLOAT32
1004 <tr><td>SIGNED32
1005 <tr><td>QASYMMU8
1006 <tr><td>QASYMMS8
1007 <tr><td>QUANTIZEDSYMM8PERAXIS
1008 </table>
1009<tr>
1010 <td rowspan="3">DequantizeLayer
1011 <td rowspan="3" style="width:200px;"> Layer to dequantize the values in a tensor.
1012 <td rowspan="3">
1013 <ul>
1014 <li>ANEURALNETWORKS_DEQUANTIZE
1015 </ul>
1016 <td>CpuRef
1017 <td>
1018 <ul>
1019 <li>All
1020 </ul>
1021 <td>
1022 <table>
1023 <tr><th>
1024 <tr><td>QASYMMS8
1025 <tr><td>QASYMMU8
1026 <tr><td>QSYMMS8
1027 <tr><td>QSYMMS16
1028 </table>
1029<tr>
1030 <td>CpuAcc
1031 <td>
1032 <ul>
1033 <li>All
1034 </ul>
1035 <td>
1036 <table>
1037 <tr><th>
1038 <tr><td>FLOAT16
1039 <tr><td>FLOAT32
1040 <tr><td>QASYMMU8
1041 <tr><td>QASYMMS8
1042 <tr><td>QUANTIZEDSYMM8PERAXIS
1043 <tr><td>QSYMMS8
1044 <tr><td>QSYMMS16
1045 </table>
1046<tr>
1047 <td>GpuAcc
1048 <td>
1049 <ul>
1050 <li>All
1051 </ul>
1052 <td>
1053 <table>
1054 <tr><th>
1055 <tr><td>FLOAT16
1056 <tr><td>FLOAT32
1057 <tr><td>QASYMMU8
1058 <tr><td>QASYMMS8
1059 <tr><td>QUANTIZEDSYMM8PERAXIS
1060 <tr><td>QSYMMS8
1061 <tr><td>QSYMMS16
1062 </table>
1063<tr>
1064 <td rowspan="2">DetectionPostProcessLayer
1065 <td rowspan="2" style="width:200px;"> Layer to generate the detection output based on center size encoded boxes, class prediction and anchors by doing non maximum suppression (NMS).
1066 <td rowspan="2">
1067 <ul>
1068 <li>ANEURALNETWORKS_DETECTION_POSTPROCESSING
1069 </ul>
1070 <td>CpuRef
1071 <td>
1072 <ul>
1073 <li>All
1074 </ul>
1075 <td>
1076 <table>
1077 <tr><th>
1078 <tr><td>BFLOAT16
1079 <tr><td>FLOAT16
1080 <tr><td>FLOAT32
1081 <tr><td>QASYMMS8
1082 <tr><td>QASYMMU8
1083 <tr><td>QSYMMS16
1084 </table>
1085<tr>
1086 <td>CpuAcc
1087 <td>
1088 <ul>
1089 <li>All
1090 </ul>
1091 <td>
1092 <table>
1093 <tr><th>
1094 <tr><td>QASYMMU8
1095 <tr><td>QASYMMS8
1096 <tr><td>FLOAT32
1097 </table>
1098<tr>
1099 <td rowspan="3">DivisionLayer
1100 <td rowspan="3" style="width:200px;"> Layer to divide 2 tensors.
1101 <td rowspan="3">
1102 <ul>
1103 <li>ANEURALNETWORKS_DIV
1104 </ul>
1105 <td>CpuRef
1106 <td>
1107 <ul>
1108 <li>All
1109 </ul>
1110 <td>
1111 <table>
1112 <tr><th>
1113 <tr><td>BFLOAT16
1114 <tr><td>FLOAT16
1115 <tr><td>FLOAT32
1116 <tr><td>QASYMMS8
1117 <tr><td>QASYMMU8
1118 <tr><td>QSYMMS16
1119 <tr><td>SIGNED32
1120 </table>
1121<tr>
1122 <td>CpuAcc
1123 <td>
1124 <ul>
1125 <li>All
1126 </ul>
1127 <td>
1128 <table>
1129 <tr><th>
1130 <tr><td>FLOAT16
1131 <tr><td>FLOAT32
1132 </table>
1133<tr>
1134 <td>GpuAcc
1135 <td>
1136 <ul>
1137 <li>All
1138 </ul>
1139 <td>
1140 <table>
1141 <tr><th>
1142 <tr><td>FLOAT16
1143 <tr><td>FLOAT32
1144 </table>
1145<tr>
1146 <td rowspan="3">ElementwiseBaseLayer
1147 <td rowspan="3" style="width:200px;"> Layer to perform Add - Div - Max - Min - Mul operations.
1148 <td rowspan="3">
1149 <ul>
1150 <li>ANEURALNETWORKS_ADD
1151 <li>ANEURALNETWORKS_DIV
1152 <li>ANEURALNETWORKS_MAXIMUM
1153 <li>ANEURALNETWORKS_MINIMUM
1154 <li>ANEURALNETWORKS_MUL
1155 </ul>
1156 <td>CpuRef
1157 <td>
1158 <ul>
1159 <li>All
1160 </ul>
1161 <td>
1162 <table>
1163 <tr><th>
1164 <tr><td>BFLOAT16
1165 <tr><td>FLOAT16
1166 <tr><td>FLOAT32
1167 <tr><td>QASYMMS8
1168 <tr><td>QASYMMU8
1169 <tr><td>QSYMMS16
1170 <tr><td>SIGNED32
1171 </table>
1172<tr>
1173 <td>CpuAcc
1174 <td>
1175 <ul>
1176 <li>All
1177 </ul>
1178 <td>
1179 <table>
1180 <tr><th>
1181 <tr><td>QASYMMU8
1182 <tr><td>QASYMMS8
1183 <tr><td>QSYMMS16
1184 <tr><td>SIGNED32
1185 <tr><td>FLOAT16
1186 <tr><td>FLOAT32
1187 </table>
1188<tr>
1189 <td>GpuAcc
1190 <td>
1191 <ul>
1192 <li>All
1193 </ul>
1194 <td>
1195 <table>
1196 <tr><th>
1197 <tr><td>QASYMMU8
1198 <tr><td>QASYMMS8
1199 <tr><td>QSYMMS16
1200 <tr><td>SIGNED32
1201 <tr><td>FLOAT16
1202 <tr><td>FLOAT32
1203 </table>
1204<tr>
1205 <td rowspan="3">ElementwiseUnaryLayer
1206 <td rowspan="3" style="width:200px;"> Layer to perform Rsqrt - Exp - Neg - Log - Abs - Sin - Sqrt operations.
1207 <td rowspan="3">
1208 <ul>
1209 <li>ANEURALNETWORKS_ABS
1210 <li>ANEURALNETWORKS_EXP
1211 <li>ANEURALNETWORKS_LOG
1212 <li>ANEURALNETWORKS_NEG
1213 <li>ANEURALNETWORKS_RSQRT
1214 <li>ANEURALNETWORKS_SIN
1215 <li>ANEURALNETWORKS_SQRT
1216 </ul>
1217 <td>CpuRef
1218 <td>
1219 <ul>
1220 <li>All
1221 </ul>
1222 <td>
1223 <table>
1224 <tr><th>
1225 <tr><td>BFLOAT16
1226 <tr><td>FLOAT16
1227 <tr><td>FLOAT32
1228 <tr><td>QASYMMS8
1229 <tr><td>QASYMMU8
1230 <tr><td>QSYMMS16
1231 </table>
1232<tr>
1233 <td>CpuAcc
1234 <td>
1235 <ul>
1236 <li>All
1237 </ul>
1238 <td>
1239 <table>
1240 <tr><th>
1241 <tr><td>FLOAT16
1242 <tr><td>FLOAT32
1243 <tr><td>SIGNED32
1244 </table>
1245<tr>
1246 <td>GpuAcc
1247 <td>
1248 <ul>
1249 <li>All
1250 </ul>
1251 <td>
1252 <table>
1253 <tr><th>
1254 <tr><td>FLOAT16
1255 <tr><td>FLOAT32
1256 </table>
1257<tr>
1258 <td rowspan="1">FakeQuantizationLayer
1259 <td rowspan="1" style="width:200px;"> Layer to quantize float values and dequantize afterwards. The current implementation does not dequantize the values.
1260 <td rowspan="1">
1261 <ul>
1262 <li>N/A
1263 </ul>
1264 <td>CpuRef
1265 <td>
1266 <ul>
1267 <li>All
1268 </ul>
1269 <td>
1270 <table>
1271 <tr><th>
1272 <tr><td>FLOAT32
1273 </table>
1274<tr>
1275 <td rowspan="3">FillLayer
1276 <td rowspan="3" style="width:200px;"> Layer to set the values of a tensor with a given value.
1277 <td rowspan="3">
1278 <ul>
1279 <li>ANEURALNETWORKS_FILL
1280 </ul>
1281 <td>CpuRef
1282 <td>
1283 <ul>
1284 <li>All
1285 </ul>
1286 <td>
1287 <table>
1288 <tr><th>
1289 <tr><td>FLOAT16
1290 <tr><td>FLOAT32
1291 <tr><td>SIGNED32
1292 </table>
1293<tr>
1294 <td>CpuAcc
1295 <td>
1296 <ul>
1297 <li>All
1298 </ul>
1299 <td>
1300 <table>
1301 <tr><th>
1302 <tr><td>All
1303 </table>
1304<tr>
1305 <td>GpuAcc
1306 <td>
1307 <ul>
1308 <li>All
1309 </ul>
1310 <td>
1311 <table>
1312 <tr><th>
1313 <tr><td>All
1314 </table>
1315<tr>
1316 <td rowspan="3">FloorLayer
1317 <td rowspan="3" style="width:200px;"> Layer to round the value to the lowest whole number.
1318 <td rowspan="3">
1319 <ul>
1320 <li>ANEURALNETWORKS_FLOOR
1321 </ul>
1322 <td>CpuRef
1323 <td>
1324 <ul>
1325 <li>All
1326 </ul>
1327 <td>
1328 <table>
1329 <tr><th>
1330 <tr><td>BFLOAT16
1331 <tr><td>FLOAT16
1332 <tr><td>FLOAT32
1333 </table>
1334<tr>
1335 <td>CpuAcc
1336 <td>
1337 <ul>
1338 <li>All
1339 </ul>
1340 <td>
1341 <table>
1342 <tr><th>
1343 <tr><td>FLOAT32
1344 <tr><td>FLOAT16
1345 </table>
1346<tr>
1347 <td>GpuAcc
1348 <td>
1349 <ul>
1350 <li>All
1351 </ul>
1352 <td>
1353 <table>
1354 <tr><th>
1355 <tr><td>FLOAT32
1356 <tr><td>FLOAT16
1357 </table>
1358<tr>
1359 <td rowspan="3">FullyConnectedLayer
1360 <td rowspan="3" style="width:200px;"> Layer to perform a fully connected / dense operation.
1361 <td rowspan="3">
1362 <ul>
1363 <li>ANEURALNETWORKS_FULLY_CONNECTED
1364 </ul>
1365 <td>CpuRef
1366 <td>
1367 <ul>
1368 <li>All
1369 </ul>
1370 <td>
1371 <table>
1372 <tr><th>
1373 <tr><td>BFLOAT16
1374 <tr><td>FLOAT16
1375 <tr><td>FLOAT32
1376 <tr><td>QASYMMS8
1377 <tr><td>QASYMMU8
1378 <tr><td>QSYMMS16
1379 </table>
1380<tr>
1381 <td>CpuAcc
1382 <td>
1383 <ul>
1384 <li>NHWC
1385 <li>NCHW
1386 </ul>
1387 <td>
1388 <table>
1389 <tr><th>
1390 <tr><td>SIGNED32
1391 <tr><td>FLOAT16
1392 <tr><td>FLOAT32
1393 <tr><td>QASYMMU8
1394 <tr><td>QASYMMS8
1395 </table>
1396<tr>
1397 <td>GpuAcc
1398 <td>
1399 <ul>
1400 <li>NHWC
1401 <li>NCHW
1402 </ul>
1403 <td>
1404 <table>
1405 <tr><th>
1406 <tr><td>SIGNED32
1407 <tr><td>FLOAT16
1408 <tr><td>FLOAT32
1409 <tr><td>QASYMMU8
1410 <tr><td>QASYMMS8
1411 </table>
1412<tr>
1413 <td rowspan="3">GatherLayer
1414 <td rowspan="3" style="width:200px;"> Layer to perform the gather operation along the chosen axis.
1415 <td rowspan="3">
1416 <ul>
1417 <li>ANEURALNETWORKS_GATHER
1418 </ul>
1419 <td>CpuRef
1420 <td>
1421 <ul>
1422 <li>All
1423 </ul>
1424 <td>
1425 <table>
1426 <tr><th>
1427 <tr><td>BFLOAT16
1428 <tr><td>FLOAT16
1429 <tr><td>FLOAT32
1430 <tr><td>QASYMMS8
1431 <tr><td>QASYMMU8
1432 <tr><td>QSYMMS16
1433 <tr><td>SIGNED32
1434 </table>
1435<tr>
1436 <td>CpuAcc
1437 <td>
1438 <ul>
1439 <li>All
1440 </ul>
1441 <td>
1442 <table>
1443 <tr><th>
1444 <tr><td>All
1445 </table>
1446<tr>
1447 <td>GpuAcc
1448 <td>
1449 <ul>
1450 <li>All
1451 </ul>
1452 <td>
1453 <table>
1454 <tr><th>
1455 <tr><td>All
1456 </table>
1457<tr>
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1458 <td rowspan="3">GatherNdLayer
1459 <td rowspan="3" style="width:200px;"> Layer to perform the gatherNd operation.
1460 <td rowspan="3">
1461 <ul>
1462 <li>N/A
1463 </ul>
1464 <td>CpuRef
1465 <td>
1466 <ul>
1467 <li>All
1468 </ul>
1469 <td>
1470 <table>
1471 <tr><th>
1472 <tr><td>BFLOAT16
1473 <tr><td>FLOAT16
1474 <tr><td>FLOAT32
1475 <tr><td>QASYMMS8
1476 <tr><td>QASYMMU8
1477 <tr><td>QSYMMS16
1478 <tr><td>SIGNED32
1479 </table>
1480<tr>
1481 <td>CpuAcc
1482 <td>
1483 <ul>
Teresa Charlinbd22c7d2022-04-26 18:14:12 +0100[diff] [blame]1484 <li>All
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1485 </ul>
1486 <td>
Teresa Charlinbd22c7d2022-04-26 18:14:12 +0100[diff] [blame]1487 <table>
1488 <tr><th>
1489 <tr><td>BFLOAT16
1490 <tr><td>FLOAT16
1491 <tr><td>FLOAT32
1492 <tr><td>QASYMMS8
1493 <tr><td>QASYMMU8
1494 <tr><td>QSYMMS16
1495 <tr><td>SIGNED32
1496 </table>
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1497<tr>
1498 <td>GpuAcc
1499 <td>
1500 <ul>
1501 <li>TBD
1502 </ul>
1503 <td>
1504 <table>
1505 <tr><th>
1506 <tr><td>TBD
1507 </table>
1508<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]1509 <td rowspan="1">InputLayer
1510 <td rowspan="1" style="width:200px;"> Special layer used to provide input data to the computational network.
1511 <td rowspan="1">
1512 <ul>
1513 <li>N/A
1514 </ul>
1515 <td>All
1516 <td>
1517 <ul>
1518 <li>All
1519 </ul>
1520 <td>
1521 <table>
1522 <tr><th>
1523 <tr><td>All
1524 </table>
1525<tr>
1526 <td rowspan="3">InstanceNormalizationLayer
1527 <td rowspan="3" style="width:200px;"> Layer to perform an instance normalization on a given axis.
1528 <td rowspan="3">
1529 <ul>
1530 <li>ANEURALNETWORKS_INSTANCE_NORMALIZATION
1531 </ul>
1532 <td>CpuRef
1533 <td>
1534 <ul>
1535 <li>All
1536 </ul>
1537 <td>
1538 <table>
1539 <tr><th>
1540 <tr><td>BFLOAT16
1541 <tr><td>FLOAT16
1542 <tr><td>FLOAT32
1543 </table>
1544<tr>
1545 <td>CpuAcc
1546 <td>
1547 <ul>
1548 <li>NHWC
1549 <li>NCHW
1550 </ul>
1551 <td>
1552 <table>
1553 <tr><th>
1554 <tr><td>FLOAT16
1555 <tr><td>FLOAT32
1556 </table>
1557<tr>
1558 <td>GpuAcc
1559 <td>
1560 <ul>
1561 <li>NHWC
1562 <li>NCHW
1563 </ul>
1564 <td>
1565 <table>
1566 <tr><th>
1567 <tr><td>FLOAT16
1568 <tr><td>FLOAT32
1569 </table>
1570<tr>
1571 <td rowspan="3">L2NormalizationLayer
1572 <td rowspan="3" style="width:200px;"> Layer to perform an L2 normalization on a given axis.
1573 <td rowspan="3">
1574 <ul>
1575 <li>ANEURALNETWORKS_L2_NORMALIZATION
1576 </ul>
1577 <td>CpuRef
1578 <td>
1579 <ul>
1580 <li>All
1581 </ul>
1582 <td>
1583 <table>
1584 <tr><th>
1585 <tr><td>BFLOAT16
1586 <tr><td>FLOAT16
1587 <tr><td>FLOAT32
1588 <tr><td>QASYMMS8
1589 <tr><td>QASYMMU8
1590 <tr><td>QSYMMS16
1591 </table>
1592<tr>
1593 <td>CpuAcc
1594 <td>
1595 <ul>
1596 <li>NHWC
1597 <li>NCHW
1598 </ul>
1599 <td>
1600 <table>
1601 <tr><th>
1602 <tr><td>FLOAT16
1603 <tr><td>FLOAT32
1604 </table>
1605<tr>
1606 <td>GpuAcc
1607 <td>
1608 <ul>
1609 <li>NHWC
1610 <li>NCHW
1611 </ul>
1612 <td>
1613 <table>
1614 <tr><th>
1615 <tr><td>FLOAT16
1616 <tr><td>FLOAT32
1617 </table>
1618<tr>
1619 <td rowspan="3">LogSoftmaxLayer
1620 <td rowspan="3" style="width:200px;"> Layer to perform the log softmax activations given logits.
1621 <td rowspan="3">
1622 <ul>
1623 <li>N/A
1624 </ul>
1625 <td>CpuRef
1626 <td>
1627 <ul>
1628 <li>All
1629 </ul>
1630 <td>
1631 <table>
1632 <tr><th>
1633 <tr><td>BFLOAT16
1634 <tr><td>FLOAT16
1635 <tr><td>FLOAT32
1636 </table>
1637<tr>
1638 <td>CpuAcc
1639 <td>
1640 <ul>
1641 <li>All
1642 </ul>
1643 <td>
1644 <table>
1645 <tr><th>
1646 <tr><td>QASYMMU8
1647 <tr><td>QASYMMS8
1648 <tr><td>FLOAT16
1649 <tr><td>FLOAT32
1650 </table>
1651<tr>
1652 <td>GpuAcc
1653 <td>
1654 <ul>
1655 <li>All
1656 </ul>
1657 <td>
1658 <table>
1659 <tr><th>
1660 <tr><td>QASYMMU8
1661 <tr><td>QASYMMS8
1662 <tr><td>FLOAT16
1663 <tr><td>FLOAT32
1664 </table>
1665<tr>
1666 <td rowspan="3">LogicalBinaryLayer
1667 <td rowspan="3" style="width:200px;"> Layer to perform Logical AND - Logical NOT - Logical OR operations.
1668 <td rowspan="3">
1669 <ul>
1670 <li>ANEURALNETWORKS_LOGICAL_AND
1671 <li>ANEURALNETWORKS_LOGICAL_NOT
1672 <li>ANEURALNETWORKS_LOGICAL_OR
1673 </ul>
1674 <td>CpuRef
1675 <td>
1676 <ul>
1677 <li>All
1678 </ul>
1679 <td>
1680 <table>
1681 <tr><th>
1682 <tr><td>BOOLEAN
1683 </table>
1684<tr>
1685 <td>CpuAcc
1686 <td>
1687 <ul>
1688 <li>All
1689 </ul>
1690 <td>
1691 <table>
1692 <tr><th>
1693 <tr><td>BOOLEAN
1694 </table>
1695<tr>
1696 <td>GpuAcc
1697 <td>
1698 <ul>
1699 <li>All
1700 </ul>
1701 <td>
1702 <table>
1703 <tr><th>
1704 <tr><td>BOOLEAN
1705 </table>
1706<tr>
1707 <td rowspan="3">LstmLayer
1708 <td rowspan="3" style="width:200px;"> Layer to perform a single time step in a Long Short-Term Memory (LSTM) operation.
1709 <td rowspan="3">
1710 <ul>
1711 <li>ANEURALNETWORKS_LSTM
1712 </ul>
1713 <td>CpuRef
1714 <td>
1715 <ul>
1716 <li>All
1717 </ul>
1718 <td>
1719 <table>
1720 <tr><th>
1721 <tr><td>BFLOAT16
1722 <tr><td>FLOAT16
1723 <tr><td>QSYMMS16
1724 </table>
1725<tr>
1726 <td>CpuAcc
1727 <td>
1728 <ul>
1729 <li>All
1730 </ul>
1731 <td>
1732 <table>
1733 <tr><th>
1734 <tr><td>FLOAT16
1735 <tr><td>FLOAT32
1736 </table>
1737<tr>
1738 <td>GpuAcc
1739 <td>
1740 <ul>
1741 <li>All
1742 </ul>
1743 <td>
1744 <table>
1745 <tr><th>
1746 <tr><td>FLOAT16
1747 <tr><td>FLOAT32
1748 </table>
1749<tr>
1750 <td rowspan="3">MapLayer
1751 <td rowspan="3" style="width:200px;"> Layer to perform map operation on tensor.
1752 <td rowspan="3">
1753 <ul>
1754 <li>N/A
1755 </ul>
1756 <td>CpuRef
1757 <td>
1758 <ul>
1759 <li>All
1760 </ul>
1761 <td>
1762 <table>
1763 <tr><th>
1764 <tr><td>All
1765 </table>
1766<tr>
1767 <td>CpuAcc
1768 <td>
1769 <ul>
1770 <li>All
1771 </ul>
1772 <td>
1773 <table>
1774 <tr><th>
1775 <tr><td>All
1776 </table>
1777<tr>
1778 <td>GpuAcc
1779 <td>
1780 <ul>
1781 <li>All
1782 </ul>
1783 <td>
1784 <table>
1785 <tr><th>
1786 <tr><td>All
1787 </table>
1788<tr>
1789 <td rowspan="3">MaximumLayer
1790 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise maximum of two tensors.
1791 <td rowspan="3">
1792 <ul>
1793 <li>N/A
1794 </ul>
1795 <td>CpuRef
1796 <td>
1797 <ul>
1798 <li>All
1799 </ul>
1800 <td>
1801 <table>
1802 <tr><th>
1803 <tr><td>BFLOAT16
1804 <tr><td>FLOAT16
1805 <tr><td>FLOAT32
1806 <tr><td>QASYMMS8
1807 <tr><td>QASYMMU8
1808 <tr><td>QSYMMS16
1809 <tr><td>SIGNED32
1810 </table>
1811<tr>
1812 <td>CpuAcc
1813 <td>
1814 <ul>
1815 <li>All
1816 </ul>
1817 <td>
1818 <table>
1819 <tr><th>
1820 <tr><td>QASYMMU8
1821 <tr><td>QASYMMS8
1822 <tr><td>FLOAT16
1823 <tr><td>FLOAT32
1824 <tr><td>SIGNED32
1825 </table>
1826<tr>
1827 <td>GpuAcc
1828 <td>
1829 <ul>
1830 <li>All
1831 </ul>
1832 <td>
1833 <table>
1834 <tr><th>
1835 <tr><td>QASYMMU8
1836 <tr><td>QASYMMS8
1837 <tr><td>QSYMMS16
1838 <tr><td>FLOAT16
1839 <tr><td>FLOAT32
1840 <tr><td>SIGNED32
1841 </table>
1842<tr>
1843 <td rowspan="3">MeanLayer
1844 <td rowspan="3" style="width:200px;"> Layer to perform reduce mean operation.
1845 <td rowspan="3">
1846 <ul>
1847 <li>ANEURALNETWORKS_MEAN
1848 </ul>
1849 <td>CpuRef
1850 <td>
1851 <ul>
1852 <li>All
1853 </ul>
1854 <td>
1855 <table>
1856 <tr><th>
1857 <tr><td>BFLOAT16
1858 <tr><td>FLOAT16
1859 <tr><td>FLOAT32
1860 <tr><td>QASYMMS8
1861 <tr><td>QASYMMU8
1862 <tr><td>QSYMMS16
1863 </table>
1864<tr>
1865 <td>CpuAcc
1866 <td>
1867 <ul>
1868 <li>All
1869 </ul>
1870 <td>
1871 <table>
1872 <tr><th>
1873 <tr><td>QASYMMU8
1874 <tr><td>QASYMMS8
1875 <tr><td>FLOAT16
1876 <tr><td>FLOAT32
1877 </table>
1878<tr>
1879 <td>GpuAcc
1880 <td>
1881 <ul>
1882 <li>All
1883 </ul>
1884 <td>
1885 <table>
1886 <tr><th>
1887 <tr><td>QASYMMU8
1888 <tr><td>QASYMMS8
1889 <tr><td>FLOAT16
1890 <tr><td>FLOAT32
1891 </table>
1892<tr>
1893 <td rowspan="3">MemCopyLayer
1894 <td rowspan="3" style="width:200px;"> Layer to perform memory copy operation.
1895 <td rowspan="3">
1896 <ul>
1897 <li>N/A
1898 </ul>
1899 <td>CpuRef
1900 <td>
1901 <ul>
1902 <li>All
1903 </ul>
1904 <td>
1905 <table>
1906 <tr><th>
1907 <tr><td>BFLOAT16
1908 <tr><td>FLOAT16
1909 <tr><td>FLOAT32
1910 <tr><td>QASYMMS8
1911 <tr><td>QASYMMU8
1912 <tr><td>QSYMMS16
1913 <tr><td>BOOLEAN
1914 </table>
1915<tr>
1916 <td>CpuAcc
1917 <td>
1918 <ul>
1919 <li>All
1920 </ul>
1921 <td>
1922 <table>
1923 <tr><th>
1924 <tr><td>All
1925 </table>
1926<tr>
1927 <td>GpuAcc
1928 <td>
1929 <ul>
1930 <li>All
1931 </ul>
1932 <td>
1933 <table>
1934 <tr><th>
1935 <tr><td>All
1936 </table>
1937<tr>
1938 <td rowspan="3">MemImportLayer
1939 <td rowspan="3" style="width:200px;"> Layer to perform memory import operation.
1940 <td rowspan="3">
1941 <ul>
1942 <li>N/A
1943 </ul>
1944 <td>CpuRef
1945 <td>
1946 <ul>
1947 <li>All
1948 </ul>
1949 <td>
1950 <table>
1951 <tr><th>
1952 <tr><td>All
1953 </table>
1954<tr>
1955 <td>CpuAcc
1956 <td>
1957 <ul>
1958 <li>All
1959 </ul>
1960 <td>
1961 <table>
1962 <tr><th>
1963 <tr><td>All
1964 </table>
1965<tr>
1966 <td>GpuAcc
1967 <td>
1968 <ul>
1969 <li>All
1970 </ul>
1971 <td>
1972 <table>
1973 <tr><th>
1974 <tr><td>All
1975 </table>
1976<tr>
1977 <td rowspan="3">MergeLayer
1978 <td rowspan="3" style="width:200px;"> Layer to concatenate tensors along a given axis.
1979 <td rowspan="3">
1980 <ul>
1981 <li>ANEURALNETWORKS_CONCATENATION
1982 </ul>
1983 <td>CpuRef
1984 <td>
1985 <ul>
1986 <li>All
1987 </ul>
1988 <td>
1989 <table>
1990 <tr><th>
1991 <tr><td>BFLOAT16
1992 <tr><td>FLOAT16
1993 <tr><td>FLOAT32
1994 <tr><td>QASYMMS8
1995 <tr><td>QASYMMU8
1996 <tr><td>QSYMMS16
1997 </table>
1998<tr>
1999 <td>CpuAcc
2000 <td>
2001 <ul>
2002 <li>All
2003 </ul>
2004 <td>
2005 <table>
2006 <tr><th>
2007 <tr><td>QASYMMU8
2008 <tr><td>QASYMMS8
2009 <tr><td>FLOAT16
2010 <tr><td>FLOAT32
2011 </table>
2012<tr>
2013 <td>GpuAcc
2014 <td>
2015 <ul>
2016 <li>All
2017 </ul>
2018 <td>
2019 <table>
2020 <tr><th>
2021 <tr><td>QASYMMU8
2022 <tr><td>QASYMMS8
2023 <tr><td>FLOAT16
2024 <tr><td>FLOAT32
2025 </table>
2026<tr>
2027 <td rowspan="3">MinimumLayer
2028 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise minimum of two tensors.
2029 <td rowspan="3">
2030 <ul>
2031 <li>ANEURALNETWORKS_MINIMUM
2032 </ul>
2033 <td>CpuRef
2034 <td>
2035 <ul>
2036 <li>All
2037 </ul>
2038 <td>
2039 <table>
2040 <tr><th>
2041 <tr><td>BFLOAT16
2042 <tr><td>FLOAT16
2043 <tr><td>FLOAT32
2044 <tr><td>QASYMMS8
2045 <tr><td>QASYMMU8
2046 <tr><td>QSYMMS16
2047 <tr><td>SIGNED32
2048 </table>
2049<tr>
2050 <td>CpuAcc
2051 <td>
2052 <ul>
2053 <li>All
2054 </ul>
2055 <td>
2056 <table>
2057 <tr><th>
2058 <tr><td>QASYMMU8
2059 <tr><td>QASYMMS8
2060 <tr><td>QSYMMS16
2061 <tr><td>FLOAT16
2062 <tr><td>FLOAT32
2063 </table>
2064<tr>
2065 <td>GpuAcc
2066 <td>
2067 <ul>
2068 <li>All
2069 </ul>
2070 <td>
2071 <table>
2072 <tr><th>
2073 <tr><td>QASYMMU8
2074 <tr><td>QASYMMS8
2075 <tr><td>QSYMMS16
2076 <tr><td>FLOAT16
2077 <tr><td>FLOAT32
2078 <tr><td>SIGNED32
2079 </table>
2080<tr>
2081 <td rowspan="3">MultiplicationLayer
2082 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise multiplication of two tensors.
2083 <td rowspan="3">
2084 <ul>
2085 <li>ANEURALNETWORKS_MUL
2086 </ul>
2087 <td>CpuRef
2088 <td>
2089 <ul>
2090 <li>All
2091 </ul>
2092 <td>
2093 <table>
2094 <tr><th>
2095 <tr><td>BFLOAT16
2096 <tr><td>FLOAT16
2097 <tr><td>FLOAT32
2098 <tr><td>QASYMMS8
2099 <tr><td>QASYMMU8
2100 <tr><td>QSYMMS16
2101 <tr><td>SIGNED32
2102 </table>
2103<tr>
2104 <td>CpuAcc
2105 <td>
2106 <ul>
2107 <li>All
2108 </ul>
2109 <td>
2110 <table>
2111 <tr><th>
2112 <tr><td>QASYMMU8
2113 <tr><td>QASYMMS8
2114 <tr><td>QSYMMS16
2115 <tr><td>SIGNED32
2116 <tr><td>FLOAT16
2117 <tr><td>FLOAT32
2118 </table>
2119<tr>
2120 <td>GpuAcc
2121 <td>
2122 <ul>
2123 <li>All
2124 </ul>
2125 <td>
2126 <table>
2127 <tr><th>
2128 <tr><td>QASYMMU8
2129 <tr><td>QASYMMS8
2130 <tr><td>QSYMMS16
2131 <tr><td>SIGNED32
2132 <tr><td>FLOAT16
2133 <tr><td>FLOAT32
2134 <tr><td>SIGNED32
2135 </table>
2136<tr>
2137 <td rowspan="3">NormalizationLayer
2138 <td rowspan="3" style="width:200px;"> Layer to compute normalization operation.
2139 <td rowspan="3">
2140 <ul>
2141 <li>ANEURALNETWORKS_LOCAL_RESPONSE_NORMALIZATION
2142 </ul>
2143 <td>CpuRef
2144 <td>
2145 <ul>
2146 <li>All
2147 </ul>
2148 <td>
2149 <table>
2150 <tr><th>
2151 <tr><td>BFLOAT16
2152 <tr><td>FLOAT16
2153 <tr><td>FLOAT32
2154 <tr><td>QASYMMS8
2155 <tr><td>QASYMMU8
2156 <tr><td>QSYMMS16
2157 </table>
2158<tr>
2159 <td>CpuAcc
2160 <td>
2161 <ul>
2162 <li>NHWC
2163 <li>NCHW
2164 </ul>
2165 <td>
2166 <table>
2167 <tr><th>
2168 <tr><td>FLOAT32
2169 <tr><td>FLOAT16
2170 </table>
2171<tr>
2172 <td>GpuAcc
2173 <td>
2174 <ul>
2175 <li>NHWC
2176 <li>NCHW
2177 </ul>
2178 <td>
2179 <table>
2180 <tr><th>
2181 <tr><td>FLOAT32
2182 <tr><td>FLOAT16
2183 </table>
2184<tr>
2185 <td rowspan="1">OutputLayer
2186 <td rowspan="1" style="width:200px;"> A special layer providing access to a user supplied buffer into which the output of a network can be written.
2187 <td rowspan="1">
2188 <ul>
2189 <li>N/A
2190 </ul>
2191 <td>All
2192 <td>
2193 <ul>
2194 <li>All
2195 </ul>
2196 <td>
2197 <table>
2198 <tr><th>
2199 <tr><td>All
2200 </table>
2201<tr>
2202 <td rowspan="3">PadLayer
2203 <td rowspan="3" style="width:200px;"> Layer to pad a tensor.
2204 <td rowspan="3">
2205 <ul>
2206 <li>ANEURALNETWORKS_PAD
2207 <li>ANEURALNETWORKS_PAD_V2
2208 </ul>
2209 <td>CpuRef
2210 <td>
2211 <ul>
2212 <li>All
2213 </ul>
2214 <td>
2215 <table>
2216 <tr><th>
2217 <tr><td>BFLOAT16
2218 <tr><td>FLOAT16
2219 <tr><td>FLOAT32
2220 <tr><td>QASYMMS8
2221 <tr><td>QASYMMU8
2222 <tr><td>QSYMMS16
2223 </table>
2224<tr>
2225 <td>CpuAcc
2226 <td>
2227 <ul>
2228 <li>NHWC
2229 <li>NCHW
2230 </ul>
2231 <td>
2232 <table>
2233 <tr><th>
2234 <tr><td>All
2235 </table>
2236<tr>
2237 <td>GpuAcc
2238 <td>
2239 <ul>
2240 <li>NHWC
2241 <li>NCHW
2242 </ul>
2243 <td>
2244 <table>
2245 <tr><th>
2246 <tr><td>All
2247 </table>
2248<tr>
2249 <td rowspan="3">PermuteLayer
2250 <td rowspan="3" style="width:200px;"> Layer to transpose an ND tensor.
2251 <td rowspan="3">
2252 <ul>
2253 <li>ANEURALNETWORKS_TRANSPOSE
2254 </ul>
2255 <td>CpuRef
2256 <td>
2257 <ul>
2258 <li>All
2259 </ul>
2260 <td>
2261 <table>
2262 <tr><th>
2263 <tr><td>BFLOAT16
2264 <tr><td>FLOAT16
2265 <tr><td>FLOAT32
2266 <tr><td>QASYMMS8
2267 <tr><td>QASYMMU8
2268 <tr><td>QSYMMS16
2269 </table>
2270<tr>
2271 <td>CpuAcc
2272 <td>
2273 <ul>
2274 <li>NHWC
2275 <li>NCHW
2276 </ul>
2277 <td>
2278 <table>
2279 <tr><th>
2280 <tr><td>All
2281 </table>
2282<tr>
2283 <td>GpuAcc
2284 <td>
2285 <ul>
2286 <li>NHWC
2287 <li>NCHW
2288 </ul>
2289 <td>
2290 <table>
2291 <tr><th>
2292 <tr><td>All
2293 </table>
2294<tr>
2295 <td rowspan="3">Pooling2dLayer
Tamás Nyíri7b885b32021-10-26 14:47:57 +0100[diff] [blame]2296 <td rowspan="3" style="width:200px;"> Layer to perform 2D pooling with the specified pooling operation.
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2297 <td rowspan="3">
2298 <ul>
2299 <li>ANEURALNETWORKS_AVERAGE_POOL_2D
2300 <li>ANEURALNETWORKS_L2_POOL_2D
2301 <li>ANEURALNETWORKS_MAX_POOL_2D
2302 </ul>
2303 <td>CpuRef
2304 <td>
2305 <ul>
2306 <li>All
2307 </ul>
2308 <td>
2309 <table>
2310 <tr><th>
2311 <tr><td>BFLOAT16
2312 <tr><td>FLOAT16
2313 <tr><td>FLOAT32
2314 <tr><td>QASYMMS8
2315 <tr><td>QASYMMU8
2316 <tr><td>QSYMMS16
2317 </table>
2318<tr>
2319 <td>CpuAcc
2320 <td>
2321 <ul>
2322 <li>NHWC
2323 <li>NCHW
2324 </ul>
2325 <td>
2326 <table>
2327 <tr><th>
2328 <tr><td>QASYMMU8
2329 <tr><td>QASYMMS8
2330 <tr><td>FLOAT16
2331 <tr><td>FLOAT32
2332 </table>
2333<tr>
2334 <td>GpuAcc
2335 <td>
2336 <ul>
2337 <li>NHWC
2338 <li>NCHW
2339 </ul>
2340 <td>
2341 <table>
2342 <tr><th>
2343 <tr><td>QASYMMU8
2344 <tr><td>QASYMMS8
2345 <tr><td>FLOAT16
2346 <tr><td>FLOAT32
2347 </table>
2348<tr>
Tamás Nyíri7b885b32021-10-26 14:47:57 +0100[diff] [blame]2349 <td rowspan="3">Pooling3dLayer
2350 <td rowspan="3" style="width:200px;"> Layer to perform 3D pooling with the specified pooling operation.
2351 <td rowspan="3">
2352 <ul>
2353 <li>ANEURALNETWORKS_AVERAGE_POOL_3D
2354 <li>ANEURALNETWORKS_L2_POOL_3D
2355 <li>ANEURALNETWORKS_MAX_POOL_3D
2356 </ul>
2357 <td>CpuRef
2358 <td>
2359 <ul>
2360 <li>NDHWC
2361 </ul>
2362 <td>
2363 <table>
2364 <tr><th>
2365 <tr><td>BFLOAT16
2366 <tr><td>FLOAT16
2367 <tr><td>FLOAT32
2368 <tr><td>QASYMMS8
2369 <tr><td>QASYMMU8
2370 <tr><td>QSYMMS16
2371 </table>
2372<tr>
2373 <td>CpuAcc
2374 <td>
2375 <ul>
2376 <li>NA
2377 </ul>
2378 <td>
2379<tr>
2380 <td>GpuAcc
2381 <td>
2382 <ul>
2383 <li>NDHWC
2384 </ul>
2385<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2386 <td rowspan="1">PreCompiledLayer
2387 <td rowspan="1" style="width:200px;"> Opaque layer provided by a backend which provides an executable representation of a subgraph from the original network.
2388 <td rowspan="1">
2389 <ul>
2390 <li>N/A
2391 </ul>
2392 <td>N/A
2393 <td>N/A
2394 <td>N/A
2395<tr>
2396 <td rowspan="3">PreluLayer
2397 <td rowspan="3" style="width:200px;"> Layer to compute the activation layer with the PRELU activation function.
2398 <td rowspan="3">
2399 <ul>
2400 <li>ANEURALNETWORKS_PRELU
2401 </ul>
2402 <td>CpuRef
2403 <td>
2404 <ul>
2405 <li>All
2406 </ul>
2407 <td>
2408 <table>
2409 <tr><th>
2410 <tr><td>BFLOAT16
2411 <tr><td>FLOAT16
2412 <tr><td>FLOAT32
2413 <tr><td>QASYMMS8
2414 <tr><td>QASYMMU8
2415 <tr><td>QSYMMS16
2416 </table>
2417<tr>
2418 <td>CpuAcc
2419 <td>
2420 <ul>
2421 <li>All
2422 </ul>
2423 <td>
2424 <table>
2425 <tr><th>
2426 <tr><td>QASYMMU8
2427 <tr><td>QASYMMS8
2428 <tr><td>FLOAT16
2429 <tr><td>FLOAT32
2430 </table>
2431<tr>
2432 <td>GpuAcc
2433 <td>
2434 <ul>
2435 <li>All
2436 </ul>
2437 <td>
2438 <table>
2439 <tr><th>
2440 <tr><td>QASYMMU8
2441 <tr><td>QASYMMS8
2442 <tr><td>FLOAT16
2443 <tr><td>FLOAT32
2444 </table>
2445<tr>
2446 <td rowspan="3">QLstmLayer
2447 <td rowspan="3" style="width:200px;"> Layer to perform quantized LSTM (Long Short-Term Memory) operation.
2448 <td rowspan="3">
2449 <ul>
2450 <li>ANEURALNETWORKS_QUANTIZED_LSTM
2451 <li>ANEURALNETWORKS_QUANTIZED_16BIT_LSTM
2452 </ul>
2453 <td>CpuRef
2454 <td>
2455 <ul>
2456 <li>All
2457 </ul>
2458 <td>
2459 <table>
2460 <tr><th>
2461 <tr><td>All
2462 </table>
2463<tr>
2464 <td>CpuAcc
2465 <td>
2466 <ul>
2467 <li>All
2468 </ul>
2469 <td>
2470 <table>
2471 <tr><th>
2472 <tr><td>QASYMMS8
2473 <tr><td>QASYMMU8
2474 <tr><td>SIGNED32
2475 <tr><td>QSYMMS16
2476 </table>
2477<tr>
2478 <td>GpuAcc
2479 <td>
2480 <ul>
2481 <li>All
2482 </ul>
2483 <td>
2484 <table>
2485 <tr><th>
2486 <tr><td>QASYMMS8
2487 <tr><td>QASYMMU8
2488 <tr><td>SIGNED32
2489 <tr><td>QSYMMS16
2490 </table>
2491<tr>
2492 <td rowspan="3">QuantizeLayer
2493 <td rowspan="3" style="width:200px;"> Layer to perform quantization operation.
2494 <td rowspan="3">
2495 <ul>
2496 <li>ANEURALNETWORKS_QUANTIZE
2497 </ul>
2498 <td>CpuRef
2499 <td>
2500 <ul>
2501 <li>All
2502 </ul>
2503 <td>
2504 <table>
2505 <tr><th>
2506 <tr><td>BFLOAT16
2507 <tr><td>FLOAT16
2508 <tr><td>FLOAT32
2509 <tr><td>QASYMMS8
2510 <tr><td>QASYMMU8
2511 <tr><td>QSYMMS8
2512 <tr><td>QSYMMS16
2513 </table>
2514<tr>
2515 <td>CpuAcc
2516 <td>
2517 <ul>
2518 <li>All
2519 </ul>
2520 <td>
2521 <table>
2522 <tr><th>
2523 <tr><td>QASYMMU8
2524 <tr><td>QASYMMS8
2525 <tr><td>QASYMM16
2526 <tr><td>FLOAT16
2527 <tr><td>FLOAT32
2528 </table>
2529<tr>
2530 <td>GpuAcc
2531 <td>
2532 <ul>
2533 <li>All
2534 </ul>
2535 <td>
2536 <table>
2537 <tr><th>
2538 <tr><td>QASYMMU8
2539 <tr><td>QASYMMS8
2540 <tr><td>QASYMM16
2541 <tr><td>FLOAT16
2542 <tr><td>FLOAT32
2543 </table>
2544<tr>
2545 <td rowspan="3">QuantizedLstmLayer
2546 <td rowspan="3" style="width:200px;"> Layer to perform quantized LSTM (Long Short-Term Memory) operation.
2547 <td rowspan="3">
2548 <ul>
2549 <li>ANEURALNETWORKS_QUANTIZED_LSTM
2550 <li>ANEURALNETWORKS_QUANTIZED_16BIT_LSTM
2551 </ul>
2552 <td>CpuRef
2553 <td>
2554 <ul>
2555 <li>All
2556 </ul>
2557 <td>
2558 <table>
2559 <tr><th>
2560 <tr><td>All
2561 </table>
2562<tr>
2563 <td>CpuAcc
2564 <td>
2565 <ul>
2566 <li>All
2567 </ul>
2568 <td>
2569 <table>
2570 <tr><th>
2571 <tr><td>SIGNED32
2572 <tr><td>QASYMMU8
2573 <tr><td>QSYMMS16
2574 </table>
2575<tr>
2576 <td>GpuAcc
2577 <td>
2578 <ul>
2579 <li>All
2580 </ul>
2581 <td>
2582 <table>
2583 <tr><th>
2584 <tr><td>SIGNED32
2585 <tr><td>QASYMMU8
2586 <tr><td>QSYMMS16
2587 </table>
2588<tr>
2589 <td rowspan="3">RankLayer
2590 <td rowspan="3" style="width:200px;"> Layer to perform a rank operation.
2591 <td rowspan="3">
2592 <ul>
2593 <li>ANEURALNETWORKS_RANK
2594 </ul>
2595 <td>CpuRef
2596 <td>
2597 <ul>
2598 <li>All
2599 </ul>
2600 <td>
2601 <table>
2602 <tr><th>
2603 <tr><td>All
2604 </table>
2605<tr>
2606 <td>CpuAcc
2607 <td>
2608 <ul>
2609 <li>All
2610 </ul>
2611 <td>
2612 <table>
2613 <tr><th>
2614 <tr><td>All
2615 </table>
2616<tr>
2617 <td>GpuAcc
2618 <td>
2619 <ul>
2620 <li>All
2621 </ul>
2622 <td>
2623 <table>
2624 <tr><th>
2625 <tr><td>All
2626 </table>
2627<tr>
2628 <td rowspan="3">ReduceLayer
2629 <td rowspan="3" style="width:200px;"> Layer to perform reduce with the following operations - ARG_IDX_MAX: Index of the max value - ARG_IDX_MIN: Index of the min value - MEAN_SUM: Mean of sum - PROD: Product - SUM_SQUARE: Sum of squares - SUM: Sum - MIN: Min - MAX: Max
2630 <td rowspan="3">
2631 <ul>
2632 <li>ANEURALNETWORKS_REDUCE_MAX
2633 <li>ANEURALNETWORKS_REDUCE_MIN
2634 <li>ANEURALNETWORKS_REDUCE_SUM
Teresa Charlin32b78702021-09-03 11:25:54 +0100[diff] [blame]2635 <li>ANEURALNETWORKS_REDUCE_PROD
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2636 </ul>
2637 <td>CpuRef
2638 <td>
2639 <ul>
2640 <li>All
2641 </ul>
2642 <td>
2643 <table>
2644 <tr><th>
2645 <tr><td>BFLOAT16
2646 <tr><td>FLOAT16
2647 <tr><td>FLOAT32
2648 <tr><td>QASYMMS8
2649 <tr><td>QASYMMU8
2650 <tr><td>QSYMMS16
2651 <tr><td>SIGNED32
2652 </table>
2653<tr>
2654 <td>CpuAcc
2655 <td>
2656 <ul>
2657 <li>All
2658 </ul>
2659 <td>
2660 <table>
2661 <tr><th>
2662 <tr><td>QASYMMU8
2663 <tr><td>QASYMMS8
2664 <tr><td>FLOAT16
2665 <tr><td>FLOAT32
2666 <tr><td>SIGNED32
2667 </table>
2668<tr>
2669 <td>GpuAcc
2670 <td>
2671 <ul>
2672 <li>All
2673 </ul>
2674 <td>
2675 <table>
2676 <tr><th>
2677 <tr><td>QASYMMU8
2678 <tr><td>QASYMMS8
2679 <tr><td>FLOAT16
2680 <tr><td>FLOAT32
2681 <tr><td>SIGNED32
2682 </table>
2683<tr>
2684 <td rowspan="3">ReshapeLayer
2685 <td rowspan="3" style="width:200px;"> Layer to reshape a tensor.
2686 <td rowspan="3">
2687 <ul>
2688 <li>ANEURALNETWORKS_RESHAPE
2689 <li>ANEURALNETWORKS_SQUEEZE
2690 <li>ANEURALNETWORKS_EXPAND_DIMS
2691 </ul>
2692 <td>CpuRef
2693 <td>
2694 <ul>
2695 <li>All
2696 </ul>
2697 <td>
2698 <table>
2699 <tr><th>
2700 <tr><td>BFLOAT16
2701 <tr><td>FLOAT16
2702 <tr><td>FLOAT32
2703 <tr><td>QASYMMS8
2704 <tr><td>QASYMMU8
2705 <tr><td>QSYMMS16
2706 <tr><td>SIGNED32
2707 <tr><td>BOOLEAN
2708 </table>
2709<tr>
2710 <td>CpuAcc
2711 <td>
2712 <ul>
2713 <li>All
2714 </ul>
2715 <td>
2716 <table>
2717 <tr><th>
2718 <tr><td>All
2719 </table>
2720<tr>
2721 <td>GpuAcc
2722 <td>
2723 <ul>
2724 <li>All
2725 </ul>
2726 <td>
2727 <table>
2728 <tr><th>
2729 <tr><td>All
2730 </table>
2731<tr>
2732 <td rowspan="3">ResizeLayer
2733 <td rowspan="3" style="width:200px;"> Layer to perform resize of a tensor using one of the interpolation methods: - Bilinear - Nearest Neighbor.
2734 <td rowspan="3">
2735 <ul>
2736 <li>ANEURALNETWORKS_RESIZE_BILINEAR
2737 <li>ANEURALNETWORKS_RESIZE_NEAREST_NEIGHBOR
2738 </ul>
2739 <td>CpuRef
2740 <td>
2741 <ul>
2742 <li>All
2743 </ul>
2744 <td>
2745 <table>
2746 <tr><th>
2747 <tr><td>BFLOAT16
2748 <tr><td>FLOAT16
2749 <tr><td>FLOAT32
2750 <tr><td>QASYMMS8
2751 <tr><td>QASYMMU8
2752 <tr><td>QSYMMS16
2753 </table>
2754<tr>
2755 <td>CpuAcc
2756 <td>
2757 <ul>
2758 <li>NHWC
2759 <li>NCHW
2760 </ul>
2761 <td>
2762 <table>
2763 <tr><th>
2764 <tr><td>QASYMMU8
2765 <tr><td>QASYMMS8
2766 <tr><td>FLOAT16
2767 <tr><td>FLOAT32
2768 </table>
2769<tr>
2770 <td>GpuAcc
2771 <td>
2772 <ul>
2773 <li>NHWC
2774 <li>NCHW
2775 </ul>
2776 <td>
2777 <table>
2778 <tr><th>
2779 <tr><td>QASYMMU8
2780 <tr><td>QASYMMS8
2781 <tr><td>FLOAT16
2782 <tr><td>FLOAT32
2783 </table>
2784<tr>
2785 <td rowspan="3">RsqrtLayer
2786 <td rowspan="3" style="width:200px;"> Layer to perform Rsqrt operation.
2787 <td rowspan="3">
2788 <ul>
2789 <li>ANEURALNETWORKS_RSQRT
2790 </ul>
2791 <td>CpuRef
2792 <td>
2793 <ul>
2794 <li>All
2795 </ul>
2796 <td>
2797 <table>
2798 <tr><th>
2799 <tr><td>BFLOAT16
2800 <tr><td>FLOAT16
2801 <tr><td>FLOAT32
2802 <tr><td>QASYMMS8
2803 <tr><td>QASYMMU8
2804 <tr><td>QSYMMS16
2805 <tr><td>SIGNED32
2806 </table>
2807<tr>
2808 <td>CpuAcc
2809 <td>
2810 <ul>
2811 <li>All
2812 </ul>
2813 <td>
2814 <table>
2815 <tr><th>
2816 <tr><td>FLOAT16
2817 <tr><td>FLOAT32
2818 <tr><td>SIGNED32
2819 </table>
2820<tr>
2821 <td>GpuAcc
2822 <td>
2823 <ul>
2824 <li>All
2825 </ul>
2826 <td>
2827 <table>
2828 <tr><th>
2829 <tr><td>FLOAT16
2830 <tr><td>FLOAT32
2831 </table>
2832<tr>
2833 <td rowspan="3">ShapeLayer
2834 <td rowspan="3" style="width:200px;"> Layer to return the shape of the input tensor.
2835 <td rowspan="3">
2836 <ul>
2837 <li>N/A
2838 </ul>
2839 <td>CpuRef
2840 <td>
2841 <ul>
2842 <li>All
2843 </ul>
2844 <td>
2845 <table>
2846 <tr><th>
2847 <tr><td>All
2848 </table>
2849<tr>
2850 <td>CpuAcc
2851 <td>
2852 <ul>
2853 <li>All
2854 </ul>
2855 <td>
2856 <table>
2857 <tr><th>
2858 <tr><td>All
2859 </table>
2860<tr>
2861 <td>GpuAcc
2862 <td>
2863 <ul>
2864 <li>All
2865 </ul>
2866 <td>
2867 <table>
2868 <tr><th>
2869 <tr><td>All
2870 </table>
2871<tr>
2872 <td rowspan="3">SliceLayer
2873 <td rowspan="3" style="width:200px;"> Layer to perform tensor slicing.
2874 <td rowspan="3">
2875 <ul>
2876 <li>ANEURALNETWORKS_SLICE
2877 </ul>
2878 <td>CpuRef
2879 <td>
2880 <ul>
2881 <li>All
2882 </ul>
2883 <td>
2884 <table>
2885 <tr><th>
2886 <tr><td>BFLOAT16
2887 <tr><td>FLOAT32
2888 <tr><td>QASYMMS8
2889 <tr><td>QASYMMU8
2890 <tr><td>QSYMMS16
2891 </table>
2892<tr>
2893 <td>CpuAcc
2894 <td>
2895 <ul>
2896 <li>All
2897 </ul>
2898 <td>
2899 <table>
2900 <tr><th>
2901 <tr><td>All
2902 </table>
2903<tr>
2904 <td>GpuAcc
2905 <td>
2906 <ul>
2907 <li>All
2908 </ul>
2909 <td>
2910 <table>
2911 <tr><th>
2912 <tr><td>All
2913 </table>
2914<tr>
2915 <td rowspan="3">SoftmaxLayer
2916 <td rowspan="3" style="width:200px;"> Layer to perform softmax, log-softmax operation over the specified axis.
2917 <td rowspan="3">
2918 <ul>
2919 <li>ANEURALNETWORKS_LOG_SOFTMAX
2920 <li>ANEURALNETWORKS_SOFTMAX
2921 </ul>
2922 <td>CpuRef
2923 <td>
2924 <ul>
2925 <li>All
2926 </ul>
2927 <td>
2928 <table>
2929 <tr><th>
2930 <tr><td>BFLOAT16
2931 <tr><td>FLOAT16
2932 <tr><td>FLOAT32
2933 <tr><td>QASYMMS8
2934 <tr><td>QASYMMU8
2935 <tr><td>QSYMMS8
2936 <tr><td>QSYMMS16
2937 </table>
2938<tr>
2939 <td>CpuAcc
2940 <td>
2941 <ul>
2942 <li>All
2943 </ul>
2944 <td>
2945 <table>
2946 <tr><th>
2947 <tr><td>QASYMMU8
2948 <tr><td>QASYMMS8
2949 <tr><td>FLOAT16
2950 <tr><td>FLOAT32
2951 </table>
2952<tr>
2953 <td>GpuAcc
2954 <td>
2955 <ul>
2956 <li>All
2957 </ul>
2958 <td>
2959 <table>
2960 <tr><th>
2961 <tr><td>QASYMMU8
2962 <tr><td>QASYMMS8
2963 <tr><td>FLOAT16
2964 <tr><td>FLOAT32
2965 </table>
2966<tr>
2967 <td rowspan="3">SpaceToBatchNdLayer
2968 <td rowspan="3" style="width:200px;"> Layer to divide spatial dimensions of the tensor into a grid of blocks and interleaves these blocks with the batch dimension.
2969 <td rowspan="3">
2970 <ul>
2971 <li>ANEURALNETWORKS_SPACE_TO_BATCH_ND
2972 </ul>
2973 <td>CpuRef
2974 <td>
2975 <ul>
2976 <li>All
2977 </ul>
2978 <td>
2979 <table>
2980 <tr><th>
2981 <tr><td>BFLOAT16
2982 <tr><td>FLOAT16
2983 <tr><td>FLOAT32
2984 <tr><td>QASYMMS8
2985 <tr><td>QASYMMU8
2986 <tr><td>QSYMMS16
2987 </table>
2988<tr>
2989 <td>CpuAcc
2990 <td>
2991 <ul>
2992 <li>NHWC
2993 <li>NCHW
2994 </ul>
2995 <td>
2996 <table>
2997 <tr><th>
2998 <tr><td>All
2999 </table>
3000<tr>
3001 <td>GpuAcc
3002 <td>
3003 <ul>
3004 <li>NHWC
3005 <li>NCHW
3006 </ul>
3007 <td>
3008 <table>
3009 <tr><th>
3010 <tr><td>All
3011 </table>
3012<tr>
3013 <td rowspan="3">SpaceToDepthLayer
3014 <td rowspan="3" style="width:200px;"> Layer to rearrange blocks of spatial data into depth.
3015 <td rowspan="3">
3016 <ul>
3017 <li>ANEURALNETWORKS_SPACE_TO_DEPTH
3018 </ul>
3019 <td>CpuRef
3020 <td>
3021 <ul>
3022 <li>All
3023 </ul>
3024 <td>
3025 <table>
3026 <tr><th>
3027 <tr><td>BFLOAT16
3028 <tr><td>FLOAT16
3029 <tr><td>FLOAT32
3030 <tr><td>QASYMMS8
3031 <tr><td>QASYMMU8
3032 <tr><td>QSYMMS16
3033 </table>
3034<tr>
3035 <td>CpuAcc
3036 <td>
3037 <ul>
3038 <li>NHWC
3039 <li>NCHW
3040 </ul>
3041 <td>
3042 <table>
3043 <tr><th>
3044 <tr><td>All
3045 </table>
3046<tr>
3047 <td>GpuAcc
3048 <td>
3049 <ul>
3050 <li>NHWC
3051 <li>NCHW
3052 </ul>
3053 <td>
3054 <table>
3055 <tr><th>
3056 <tr><td>All
3057 </table>
3058<tr>
3059 <td rowspan="3">SplitterLayer
3060 <td rowspan="3" style="width:200px;"> Layer to split a tensor along a given axis.
3061 <td rowspan="3">
3062 <ul>
3063 <li>ANEURALNETWORKS_SPLIT
3064 </ul>
3065 <td>CpuRef
3066 <td>
3067 <ul>
3068 <li>All
3069 </ul>
3070 <td>
3071 <table>
3072 <tr><th>
3073 <tr><td>BFLOAT16
3074 <tr><td>FLOAT16
3075 <tr><td>FLOAT32
3076 <tr><td>QASYMMS8
3077 <tr><td>QASYMMU8
3078 <tr><td>QSYMMS16
3079 </table>
3080<tr>
3081 <td>CpuAcc
3082 <td>
3083 <ul>
3084 <li>All
3085 </ul>
3086 <td>
3087 <table>
3088 <tr><th>
3089 <tr><td>All
3090 </table>
3091<tr>
3092 <td>GpuAcc
3093 <td>
3094 <ul>
3095 <li>All
3096 </ul>
3097 <td>
3098 <table>
3099 <tr><th>
3100 <tr><td>All
3101 </table>
3102<tr>
3103 <td rowspan="3">StackLayer
3104 <td rowspan="3" style="width:200px;"> Layer to stack tensors along an axis.
3105 <td rowspan="3">
3106 <ul>
3107 <li>N/A
3108 </ul>
3109 <td>CpuRef
3110 <td>
3111 <ul>
3112 <li>All
3113 </ul>
3114 <td>
3115 <table>
3116 <tr><th>
3117 <tr><td>BFLOAT16
3118 <tr><td>FLOAT16
3119 <tr><td>FLOAT32
3120 <tr><td>QASYMMS8
3121 <tr><td>QASYMMU8
3122 <tr><td>QSYMMS16
3123 </table>
3124<tr>
3125 <td>CpuAcc
3126 <td>
3127 <ul>
3128 <li>All
3129 </ul>
3130 <td>
3131 <table>
3132 <tr><th>
3133 <tr><td>All
3134 </table>
3135<tr>
3136 <td>GpuAcc
3137 <td>
3138 <ul>
3139 <li>All
3140 </ul>
3141 <td>
3142 <table>
3143 <tr><th>
3144 <tr><td>All
3145 </table>
3146<tr>
3147 <td rowspan="1">StandInLayer
3148 <td rowspan="1" style="width:200px;"> A layer to represent "unknown" or "unsupported" operations in the input graph. It has a configurable number of input and output slots and an optional name.
3149 <td rowspan="1">
3150 <ul>
3151 <li>N/A
3152 </ul>
3153 <td>N/A
3154 <td>N/A
3155 <td>N/A
3156<tr>
3157 <td rowspan="3">StridedSliceLayer
3158 <td rowspan="3" style="width:200px;"> Layer to extract a strided slice of a tensor.
3159 <td rowspan="3">
3160 <ul>
3161 <li>ANEURALNETWORKS_STRIDED_SLICE
3162 </ul>
3163 <td>CpuRef
3164 <td>
3165 <ul>
3166 <li>All
3167 </ul>
3168 <td>
3169 <table>
3170 <tr><th>
3171 <tr><td>BFLOAT16
3172 <tr><td>FLOAT32
3173 <tr><td>QASYMMS8
3174 <tr><td>QASYMMU8
3175 <tr><td>QSYMMS16
3176 </table>
3177<tr>
3178 <td>CpuAcc
3179 <td>
3180 <ul>
3181 <li>All
3182 </ul>
3183 <td>
3184 <table>
3185 <tr><th>
3186 <tr><td>All
3187 </table>
3188<tr>
3189 <td>GpuAcc
3190 <td>
3191 <ul>
3192 <li>All
3193 </ul>
3194 <td>
3195 <table>
3196 <tr><th>
3197 <tr><td>All
3198 </table>
3199<tr>
3200 <td rowspan="3">SubtractionLayer
3201 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise subtract of 2 tensors.
3202 <td rowspan="3">
3203 <ul>
3204 <li>ANEURALNETWORKS_SUB
3205 </ul>
3206 <td>CpuRef
3207 <td>
3208 <ul>
3209 <li>All
3210 </ul>
3211 <td>
3212 <table>
3213 <tr><th>
3214 <tr><td>BFLOAT16
3215 <tr><td>FLOAT16
3216 <tr><td>FLOAT32
3217 <tr><td>QASYMMS8
3218 <tr><td>QASYMMU8
3219 <tr><td>QSYMMS16
3220 <tr><td>SIGNED32
3221 </table>
3222<tr>
3223 <td>CpuAcc
3224 <td>
3225 <ul>
3226 <li>All
3227 </ul>
3228 <td>
3229 <table>
3230 <tr><th>
3231 <tr><td>QASYMMU8
3232 <tr><td>QASYMMS8
3233 <tr><td>QSYMMS16
3234 <tr><td>SIGNED32
3235 <tr><td>FLOAT16
3236 <tr><td>FLOAT32
3237 </table>
3238<tr>
3239 <td>GpuAcc
3240 <td>
3241 <ul>
3242 <li>All
3243 </ul>
3244 <td>
3245 <table>
3246 <tr><th>
3247 <tr><td>QASYMMU8
3248 <tr><td>QASYMMS8
3249 <tr><td>QSYMMS16
3250 <tr><td>SIGNED32
3251 <tr><td>FLOAT16
3252 <tr><td>FLOAT32
3253 </table>
3254<tr>
3255 <td rowspan="3">TransposeConvolution2dLayer
3256 <td rowspan="3" style="width:200px;"> Layer to perform 2D transpose convolution (deconvolution) operation.
3257 <td rowspan="3">
3258 <ul>
3259 <li>ANEURALNETWORKS_TRANSPOSE_CONV_2D
3260 </ul>
3261 <td>CpuRef
3262 <td>
3263 <ul>
3264 <li>All
3265 </ul>
3266 <td>
3267 <table>
3268 <tr><th>
3269 <tr><td>BFLOAT16
3270 <tr><td>FLOAT16
3271 <tr><td>FLOAT32
3272 <tr><td>QASYMMS8
3273 <tr><td>QASYMMU8
3274 <tr><td>QSYMMS8
3275 <tr><td>QSYMMS16
3276 </table>
3277<tr>
3278 <td>CpuAcc
3279 <td>
3280 <ul>
3281 <li>NHWC
3282 <li>NCHW
3283 </ul>
3284 <td>
3285 <table>
3286 <tr><th>
3287 <tr><td>SIGNED32
3288 <tr><td>FLOAT16
3289 <tr><td>FLOAT32
3290 <tr><td>QASYMMU8
3291 <tr><td>QASYMMS8
3292 <tr><td>QUANTIZEDSYMM8PERAXIS
3293 </table>
3294<tr>
3295 <td>GpuAcc
3296 <td>
3297 <ul>
3298 <li>NHWC
3299 <li>NCHW
3300 </ul>
3301 <td>
3302 <table>
3303 <tr><th>
3304 <tr><td>SIGNED32
3305 <tr><td>FLOAT16
3306 <tr><td>FLOAT32
3307 <tr><td>QASYMMU8
3308 <tr><td>QASYMMS8
3309 <tr><td>QUANTIZEDSYMM8PERAXIS
3310 </table>
3311<tr>
3312 <td rowspan="3">TransposeLayer
3313 <td rowspan="3" style="width:200px;"> Layer to transpose a tensor.
3314 <td rowspan="3">
3315 <ul>
3316 <li>ANEURALNETWORKS_TRANSPOSE
3317 </ul>
3318 <td>CpuRef
3319 <td>
3320 <ul>
3321 <li>All
3322 </ul>
3323 <td>
3324 <table>
3325 <tr><th>
3326 <tr><td>BFLOAT16
3327 <tr><td>FLOAT16
3328 <tr><td>FLOAT32
3329 <tr><td>QASYMMS8
3330 <tr><td>QASYMMU8
3331 <tr><td>QSYMMS16
3332 </table>
3333<tr>
3334 <td>CpuAcc
3335 <td>
3336 <ul>
3337 <li>All
3338 </ul>
3339 <td>
3340 <table>
3341 <tr><th>
3342 <tr><td>All
3343 </table>
3344<tr>
3345 <td>GpuAcc
3346 <td>
3347 <ul>
3348 <li>All
3349 </ul>
3350 <td>
3351 <table>
3352 <tr><th>
3353 <tr><td>All
3354 </table>
3355<tr>
3356 <td rowspan="3">UnidirectionalSquenceLstmLayer
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3357 <td rowspan="3" style="width:200px;"> Layer to perform unidirectional sequence LSTM operation.
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3358 <td rowspan="3">
3359 <ul>
3360 <li>ANEURALNETWORKS_UNIDIRECTIONAL_SEQUENCE_LSTM
3361 </ul>
3362 <td>CpuRef
3363 <td>
3364 <ul>
3365 <li>All
3366 </ul>
3367 <td>
3368 <table>
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3369 <tr><th>Input Types
3370 <tr><td>FLOAT32
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3371 </table>
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3372 <table>
3373 <tr><th>Weight Types
3374 <tr><td>FLOAT32
3375 <tr><td>QASYMMS8
3376 </table>
Cathal Corbettfd5bec42022-03-03 15:13:23 +0000[diff] [blame]3377 <td>CpuAcc
3378 <td>
3379 <ul>
3380 <li>All
3381 </ul>
3382 <td>
3383 <table>
3384 <tr><th>Input Types
3385 <tr><td>FLOAT32
3386 </table>
3387 <table>
3388 <tr><th>Weight Types
3389 <tr><td>FLOAT32
3390 </table>
Cathal Corbett4952a3e2022-03-03 15:14:18 +0000[diff] [blame]3391 <td>GpuAcc
3392 <td>
3393 <ul>
3394 <li>All
3395 </ul>
3396 <td>
3397 <table>
3398 <tr><th>Input Types
3399 <tr><td>FLOAT32
3400 </table>
3401 <table>
3402 <tr><th>Weight Types
3403 <tr><td>FLOAT32
3404 </table>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3405<tr>
3406 <td rowspan="3">UnmapLayer
3407 <td rowspan="3" style="width:200px;"> Layer to perform unmap operation on tensor.
3408 <td rowspan="3">
3409 <ul>
3410 <li>N/A
3411 </ul>
3412 <td>CpuRef
3413 <td>
3414 <ul>
3415 <li>All
3416 </ul>
3417 <td>
3418 <table>
3419 <tr><th>
3420 <tr><td>All
3421 </table>
3422<tr>
3423 <td>CpuAcc
3424 <td>
3425 <ul>
3426 <li>NHWC
3427 <li>NCHW
3428 </ul>
3429 <td>
3430 <table>
3431 <tr><th>
3432 <tr><td>All
3433 </table>
3434<tr>
3435 <td>GpuAcc
3436 <td>
3437 <ul>
3438 <li>NHWC
3439 <li>NCHW
3440 </ul>
3441 <td>
3442 <table>
3443 <tr><th>
3444 <tr><td>All
3445 </table>
3446</table>
3447
3448*/
3449} // namespace