blob: b2aa52edb284963a6869800177246209d47101db [file] [log] [blame]
telsoa014fcda012018-03-09 14:13:49 +00001//
2// Copyright © 2017 Arm Ltd. All rights reserved.
David Beckecb56cd2018-09-05 12:52:57 +01003// SPDX-License-Identifier: MIT
telsoa014fcda012018-03-09 14:13:49 +00004//
5#pragma once
6
7#include <array>
Matthew Bentham47bfac42019-03-25 12:30:56 +00008#include <functional>
David Beckdcb751f2018-10-03 11:42:42 +01009#include <memory>
janeil01c4946c72019-11-07 09:32:28 +000010#include <stdint.h>
Jim Flynn44db7c32019-03-22 15:58:39 +000011#include "BackendId.hpp"
12#include "Exceptions.hpp"
telsoa014fcda012018-03-09 14:13:49 +000013
14namespace armnn
15{
16
Matthew Jacksondba634f2019-08-15 15:14:18 +010017constexpr unsigned int MaxNumOfTensorDimensions = 5U;
telsoa014fcda012018-03-09 14:13:49 +000018
19/// @enum Status enumeration
20/// @var Status::Successful
21/// @var Status::Failure
22enum class Status
23{
24 Success = 0,
25 Failure = 1
26};
27
28enum class DataType
29{
telsoa01c577f2c2018-08-31 09:22:23 +010030 Float16 = 0,
ruoyan0120e984f2018-12-12 18:11:25 +000031 Float32 = 1,
telsoa01c577f2c2018-08-31 09:22:23 +010032 QuantisedAsymm8 = 2,
ruoyan0120e984f2018-12-12 18:11:25 +000033 Signed32 = 3,
Nattapat Chaimanowongcd5ac232019-03-19 12:26:36 +000034 Boolean = 4,
Keith Davis5236e1d2019-11-04 08:58:33 +000035 QuantisedSymm16 = 5,
36 QuantizedSymm8PerAxis = 6
telsoa014fcda012018-03-09 14:13:49 +000037};
38
Derek Lamberti0cff1632018-09-18 16:02:25 +010039enum class DataLayout
40{
41 NCHW = 1,
42 NHWC = 2
43};
44
telsoa014fcda012018-03-09 14:13:49 +000045enum class ActivationFunction
46{
47 Sigmoid = 0,
48 TanH = 1,
49 Linear = 2,
50 ReLu = 3,
telsoa01c577f2c2018-08-31 09:22:23 +010051 BoundedReLu = 4, ///< min(a, max(b, input))
telsoa014fcda012018-03-09 14:13:49 +000052 SoftReLu = 5,
53 LeakyReLu = 6,
54 Abs = 7,
55 Sqrt = 8,
56 Square = 9
57};
58
Narumol Prangnawarat8d001d42019-09-09 15:01:18 +010059enum class ArgMinMaxFunction
60{
61 Min = 0,
62 Max = 1
63};
64
Aron Virginas-Tar77bfb5e2019-10-16 17:45:38 +010065enum class ComparisonOperation
66{
67 Equal = 0,
68 Greater = 1,
69 GreaterOrEqual = 2,
70 Less = 3,
71 LessOrEqual = 4,
72 NotEqual = 5
73};
74
telsoa014fcda012018-03-09 14:13:49 +000075enum class PoolingAlgorithm
76{
77 Max = 0,
78 Average = 1,
79 L2 = 2
80};
81
Teresa Charlina9075df2019-06-27 15:41:57 +010082enum class ResizeMethod
83{
84 Bilinear = 0,
85 NearestNeighbor = 1
86};
87
telsoa014fcda012018-03-09 14:13:49 +000088///
89/// The padding method modifies the output of pooling layers.
90/// In both supported methods, the values are ignored (they are
telsoa01c577f2c2018-08-31 09:22:23 +010091/// not even zeroes, which would make a difference for max pooling
telsoa014fcda012018-03-09 14:13:49 +000092/// a tensor with negative values). The difference between
telsoa01c577f2c2018-08-31 09:22:23 +010093/// IgnoreValue and Exclude is that the former counts the padding
telsoa014fcda012018-03-09 14:13:49 +000094/// fields in the divisor of Average and L2 pooling, while
95/// Exclude does not.
96///
97enum class PaddingMethod
98{
telsoa01c577f2c2018-08-31 09:22:23 +010099 /// The padding fields count, but are ignored
David Beckdcb751f2018-10-03 11:42:42 +0100100 IgnoreValue = 0,
telsoa01c577f2c2018-08-31 09:22:23 +0100101 /// The padding fields don't count and are ignored
David Beckdcb751f2018-10-03 11:42:42 +0100102 Exclude = 1
telsoa014fcda012018-03-09 14:13:49 +0000103};
104
105enum class NormalizationAlgorithmChannel
106{
107 Across = 0,
108 Within = 1
109};
110
111enum class NormalizationAlgorithmMethod
112{
David Beckdcb751f2018-10-03 11:42:42 +0100113 /// Krichevsky 2012: Local Brightness Normalization
114 LocalBrightness = 0,
115 /// Jarret 2009: Local Contrast Normalization
telsoa01c577f2c2018-08-31 09:22:23 +0100116 LocalContrast = 1
telsoa014fcda012018-03-09 14:13:49 +0000117};
118
119enum class OutputShapeRounding
120{
121 Floor = 0,
122 Ceiling = 1
123};
124
David Beck9efb57d2018-11-05 13:40:33 +0000125/// Each backend should implement an IBackend.
126class IBackend
127{
128protected:
129 IBackend() {}
130 virtual ~IBackend() {}
131
132public:
133 virtual const BackendId& GetId() const = 0;
134};
135
136using IBackendSharedPtr = std::shared_ptr<IBackend>;
137using IBackendUniquePtr = std::unique_ptr<IBackend, void(*)(IBackend* backend)>;
138
David Beckdcb751f2018-10-03 11:42:42 +0100139/// Device specific knowledge to be passed to the optimizer.
telsoa01c577f2c2018-08-31 09:22:23 +0100140class IDeviceSpec
telsoa014fcda012018-03-09 14:13:49 +0000141{
telsoa01c577f2c2018-08-31 09:22:23 +0100142protected:
Matteo Martincigh9c5d33a2019-02-07 17:52:41 +0000143 IDeviceSpec() {}
144 virtual ~IDeviceSpec() {}
Narumol Prangnawarat87106762019-05-03 15:54:39 +0100145public:
146 virtual const BackendIdSet& GetSupportedBackends() const = 0;
telsoa014fcda012018-03-09 14:13:49 +0000147};
148
149/// Type of identifiers for bindable layers (inputs, outputs).
150using LayerBindingId = int;
151
152class PermutationVector
153{
154public:
155 using ValueType = unsigned int;
156 using SizeType = unsigned int;
157 using ArrayType = std::array<ValueType, MaxNumOfTensorDimensions>;
158 using ConstIterator = typename ArrayType::const_iterator;
159
telsoa01c577f2c2018-08-31 09:22:23 +0100160 /// @param dimMappings - Indicates how to translate tensor elements from a given source into the target destination,
telsoa014fcda012018-03-09 14:13:49 +0000161 /// when source and target potentially have different memory layouts.
162 ///
telsoa01c577f2c2018-08-31 09:22:23 +0100163 /// E.g. For a 4-d tensor laid out in a memory with the format (Batch Element, Height, Width, Channels),
telsoa014fcda012018-03-09 14:13:49 +0000164 /// which is to be passed as an input to ArmNN, each source dimension is mapped to the corresponding
165 /// ArmNN dimension. The Batch dimension remains the same (0 -> 0). The source Height dimension is mapped
166 /// to the location of the ArmNN Height dimension (1 -> 2). Similar arguments are made for the Width and
167 /// Channels (2 -> 3 and 3 -> 1). This will lead to @ref m_DimMappings pointing to the following array:
168 /// [ 0, 2, 3, 1 ].
169 ///
170 /// Note that the mapping should be reversed if considering the case of ArmNN 4-d outputs (Batch Element,
171 /// Channels, Height, Width) being written to a destination with the format mentioned above. We now have
172 /// 0 -> 0, 2 -> 1, 3 -> 2, 1 -> 3, which, when reordered, lead to the following @ref m_DimMappings contents:
173 /// [ 0, 3, 1, 2 ].
174 ///
175 PermutationVector(const ValueType *dimMappings, SizeType numDimMappings);
176
177 PermutationVector(std::initializer_list<ValueType> dimMappings);
178
179 ValueType operator[](SizeType i) const { return m_DimMappings.at(i); }
180
181 SizeType GetSize() const { return m_NumDimMappings; }
182
183 ConstIterator begin() const { return m_DimMappings.begin(); }
184 ConstIterator end() const { return m_DimMappings.end(); }
185
186 bool IsEqual(const PermutationVector& other) const
187 {
Matthew Jacksondba634f2019-08-15 15:14:18 +0100188 if (m_NumDimMappings != other.m_NumDimMappings) return false;
189 for (unsigned int i = 0; i < m_NumDimMappings; ++i)
190 {
191 if (m_DimMappings[i] != other.m_DimMappings[i]) return false;
192 }
193 return true;
telsoa014fcda012018-03-09 14:13:49 +0000194 }
195
196 bool IsInverse(const PermutationVector& other) const
197 {
198 bool isInverse = (GetSize() == other.GetSize());
199 for (SizeType i = 0; isInverse && (i < GetSize()); ++i)
200 {
201 isInverse = (m_DimMappings[other.m_DimMappings[i]] == i);
202 }
203 return isInverse;
204 }
205
206private:
207 ArrayType m_DimMappings;
208 /// Number of valid entries in @ref m_DimMappings
209 SizeType m_NumDimMappings;
210};
211
telsoa01c577f2c2018-08-31 09:22:23 +0100212/// Define LayerGuid type.
surmeh01bceff2f2018-03-29 16:29:27 +0100213using LayerGuid = unsigned int;
214
Nattapat Chaimanowong6e948202019-03-22 14:01:46 +0000215class ITensorHandle;
216
Nattapat Chaimanowong317cae52019-03-28 10:29:12 +0000217/// Define the type of callback for the Debug layer to call
218/// @param guid - guid of layer connected to the input of the Debug layer
219/// @param slotIndex - index of the output slot connected to the input of the Debug layer
220/// @param tensorHandle - TensorHandle for the input tensor to the Debug layer
221using DebugCallbackFunction = std::function<void(LayerGuid guid, unsigned int slotIndex, ITensorHandle* tensorHandle)>;
Nattapat Chaimanowong6e948202019-03-22 14:01:46 +0000222
janeil01c4946c72019-11-07 09:32:28 +0000223
224namespace profiling
225{
226
227class ProfilingGuid
228{
229public:
230 ProfilingGuid(uint64_t guid) : m_Guid(guid) {}
231
232 operator uint64_t() const { return m_Guid; }
233
234 bool operator==(const ProfilingGuid& other) const
235 {
236 return m_Guid == other.m_Guid;
237 }
238
239 bool operator!=(const ProfilingGuid& other) const
240 {
241 return m_Guid != other.m_Guid;
242 }
243
244 bool operator<(const ProfilingGuid& other) const
245 {
246 return m_Guid < other.m_Guid;
247 }
248
249 bool operator<=(const ProfilingGuid& other) const
250 {
251 return m_Guid <= other.m_Guid;
252 }
253
254 bool operator>(const ProfilingGuid& other) const
255 {
256 return m_Guid > other.m_Guid;
257 }
258
259 bool operator>=(const ProfilingGuid& other) const
260 {
261 return m_Guid >= other.m_Guid;
262 }
263
264protected:
265 uint64_t m_Guid;
266};
267
268/// Strongly typed guids to distinguish between those generated at runtime, and those that are statically defined.
269struct ProfilingDynamicGuid : public ProfilingGuid
270{
271 using ProfilingGuid::ProfilingGuid;
272};
273
274struct ProfilingStaticGuid : public ProfilingGuid
275{
276 using ProfilingGuid::ProfilingGuid;
277};
278
279} // namespace profiling
280
David Beck9df2d952018-10-10 15:11:44 +0100281} // namespace armnn
janeil01c4946c72019-11-07 09:32:28 +0000282
283
284namespace std
285{
286// make ProfilingGuid hashable
287template<>
288struct hash<armnn::profiling::ProfilingGuid>
289{
290 std::size_t operator()(armnn::profiling::ProfilingGuid const& guid) const noexcept
291 {
292 return hash<uint64_t>()(uint64_t(guid));
293 }
294};
295
296// make ProfilingDynamicGuid hashable
297template<>
298struct hash<armnn::profiling::ProfilingDynamicGuid>
299{
300 std::size_t operator()(armnn::profiling::ProfilingDynamicGuid const& guid) const noexcept
301 {
302 return hash<uint64_t>()(uint64_t(guid));
303 }
304};
305
306// make ProfilingStaticGuid hashable
307template<>
308struct hash<armnn::profiling::ProfilingStaticGuid>
309{
310 std::size_t operator()(armnn::profiling::ProfilingStaticGuid const& guid) const noexcept
311 {
312 return hash<uint64_t>()(uint64_t(guid));
313 }
314};
315}