Gitiles
Code Review Sign In
review.mlplatform.org / ml / armnn / refs/tags/v23.05 / . / docs / 02_operator_list.dox
blob: 53e37e2b4eba012e9bc3df55fe37c6ceffdcf8b9 [file] [log] [blame]
Teresa Charlin1fe6c812022-11-01 15:59:50 +0000[diff] [blame]1/// Copyright (c) 2021, 2023 ARM Limited and Contributors. All rights reserved.
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2///
3/// SPDX-License-Identifier: MIT
4///
5
6namespace armnn
7{
8/**
9@page operator_list Arm NN Operators
10
11@tableofcontents
12
13@section S5_1_operator_list Arm NN Operators
14
15Arm NN supports operators that are listed in below table.
16
17Arm NN supports a wide list of data-types.
18The main data-types that the Machine Learning functions support are the following:
19 <ul>
20 <li><b>BFLOAT16:</b> 16-bit non-standard brain floating point
21 <li><b>QASYMMU8:</b> 8-bit unsigned asymmetric quantized
22 <li><b>QASYMMS8:</b> 8-bit signed asymmetric quantized
23 <li><b>QUANTIZEDSYMM8PERAXIS:</b> 8-bit signed symmetric quantized
Cathal Corbettb85113e2022-02-22 11:51:43 +0000[diff] [blame]24 <li><b>QSYMMS8:</b> 8-bit signed symmetric quantized
25 <li><b>QSYMMS16:</b> 16-bit signed symmetric quantized
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]26 <li><b>FLOAT32:</b> 32-bit single precision floating point
27 <li><b>FLOAT16:</b> 16-bit half precision floating point
28 <li><b>SIGNED32:</b> 32-bit signed integer
29 <li><b>BOOLEAN:</b> 8-bit unsigned char
30 <li><b>All:</b> Agnostic to any specific data type
31 </ul>
32
33Arm NN supports the following data layouts (fast changing dimension from right to left):
34 <ul>
35 <li><b>NHWC:</b> Layout where channels are in the fastest changing dimension
36 <li><b>NCHW:</b> Layout where width is in the fastest changing dimension
37 <li><b>All:</b> Agnostic to any specific data layout
38 </ul>
39where N = batches, C = channels, H = height, W = width
40
41<table>
42<caption id="multi_row"></caption>
43<tr>
44 <th>Operator
45 <th>Description
46 <th>Equivalent Android NNAPI Operator
47 <th>Backends
48 <th>Data Layouts
49 <th>Data Types
50<tr>
51 <td rowspan="3">AbsLayer
52 <td rowspan="3"> Layer to perform absolute operation.
53 <td rowspan="3">
54 <ul>
55 <li>ANEURALNETWORKS_ABS
56 </ul>
57 <td>CpuRef
58 <td>
59 <ul>
60 <li>All
61 </ul>
62 <td>
63 <table>
64 <tr><th>
65 <tr><td>BFLOAT16
66 <tr><td>FLOAT16
67 <tr><td>FLOAT32
68 <tr><td>QASYMMS8
69 <tr><td>QASYMMU8
70 <tr><td>QSYMMS16
71 <tr><td>SIGNED32
72 </table>
73<tr>
74 <td>CpuAcc
75 <td>
76 <ul>
77 <li>All
78 </ul>
79 <td>
80 <table>
81 <tr><th>
82 <tr><td>FLOAT16
83 <tr><td>FLOAT32
84 <tr><td>SIGNED32
85 </table>
86<tr>
87 <td>GpuAcc
88 <td>
89 <ul>
90 <li>All
91 </ul>
92 <td>
93 <table>
94 <tr><th>
95 <tr><td>FLOAT16
96 <tr><td>FLOAT32
97 </table>
98<tr>
99 <td rowspan="3">ActivationLayer
100 <td rowspan="3" style="width:200px;"> Layer to simulate an activation layer with the specified activation function.
101 <td rowspan="3">
102 <ul>
103 <li>ANEURALNETWORKS_ABS
104 <li>ANEURALNETWORKS_ELU
105 <li>ANEURALNETWORKS_HARD_SWISH
106 <li>ANEURALNETWORKS_LOGISTIC
107 <li>ANEURALNETWORKS_PRELU
108 <li>ANEURALNETWORKS_RELU
109 <li>ANEURALNETWORKS_RELU1
110 <li>ANEURALNETWORKS_RELU6
111 <li>ANEURALNETWORKS_SQRT
112 <li>ANEURALNETWORKS_TANH
113 </ul>
114 <td>CpuRef
115 <td>
116 <ul>
117 <li>All
118 </ul>
119 <td>
120 <table>
121 <tr><th>
122 <tr><td>BFLOAT16
123 <tr><td>FLOAT16
124 <tr><td>FLOAT32
125 <tr><td>QASYMMS8
126 <tr><td>QASYMMU8
127 <tr><td>QSYMMS16
128 </table>
129<tr>
130 <td>CpuAcc
131 <td>
132 <ul>
133 <li>All
134 </ul>
135 <td>
136 <table>
137 <tr><th>
138 <tr><td>QASYMMU8
139 <tr><td>QASYMMS8
140 <tr><td>QSYMMS16
141 <tr><td>FLOAT16
142 <tr><td>FLOAT32
143 </table>
144<tr>
145 <td>GpuAcc
146 <td>
147 <ul>
148 <li>All
149 </ul>
150 <td>
151 <table>
152 <tr><th>
153 <tr><td>QASYMMU8
154 <tr><td>QASYMMS8
155 <tr><td>QSYMMS16
156 <tr><td>FLOAT16
157 <tr><td>FLOAT32
158 </table>
159<tr>
160 <td rowspan="3">AdditionLayer
161 <td rowspan="3" style="width:200px;"> Layer to add 2 tensors.
162 <td rowspan="3">
163 <ul>
164 <li>ANEURALNETWORKS_ADD
165 </ul>
166 <td>CpuRef
167 <td>
168 <ul>
169 <li>All
170 </ul>
171 <td>
172 <table>
173 <tr><th>
174 <tr><td>BFLOAT16
175 <tr><td>FLOAT16
176 <tr><td>FLOAT32
177 <tr><td>QASYMMS8
178 <tr><td>QASYMMU8
179 <tr><td>QSYMMS16
180 <tr><td>SIGNED32
181 </table>
182<tr>
183 <td>CpuAcc
184 <td>
185 <ul>
186 <li>All
187 </ul>
188 <td>
189 <table>
190 <tr><th>
191 <tr><td>QASYMMU8
192 <tr><td>QASYMMS8
193 <tr><td>QSYMMS16
194 <tr><td>SIGNED32
195 <tr><td>FLOAT16
196 <tr><td>FLOAT32
197 </table>
198<tr>
199 <td>GpuAcc
200 <td>
201 <ul>
202 <li>All
203 </ul>
204 <td>
205 <table>
206 <tr><th>
207 <tr><td>QASYMMU8
208 <tr><td>QASYMMS8
209 <tr><td>QSYMMS16
210 <tr><td>SIGNED32
211 <tr><td>FLOAT16
212 <tr><td>FLOAT32
213 </table>
214<tr>
215 <td rowspan="3">ArgMinMaxLayer
216 <td rowspan="3" style="width:200px;"> Layer to calculate the index of the minimum or maximum values in a tensor
217 based on an axis.
218 <td rowspan="3">
219 <ul>
220 <li>ANEURALNETWORKS_ARGMAX
221 <li>ANEURALNETWORKS_ARGMIN
222 </ul>
223 <td>CpuRef
224 <td>
225 <ul>
226 <li>All
227 </ul>
228 <td>
229 <table>
230 <tr><th>
231 <tr><td>BFLOAT16
232 <tr><td>FLOAT16
233 <tr><td>FLOAT32
234 <tr><td>QASYMMS8
235 <tr><td>QASYMMU8
236 <tr><td>QSYMMS16
237 <tr><td>SIGNED32
238 <tr><td>SIGNED64
239 </table>
240<tr>
241 <td>CpuAcc
242 <td>
243 <ul>
244 <li>All
245 </ul>
246 <td>
247 <table>
248 <tr><th>
249 <tr><td>QASYMMU8
250 <tr><td>QASYMMS8
251 <tr><td>SIGNED32
252 <tr><td>FLOAT16
253 <tr><td>FLOAT32
254 </table>
255<tr>
256 <td>GpuAcc
257 <td>
258 <ul>
259 <li>All
260 </ul>
261 <td>
262 <table>
263 <tr><th>
264 <tr><td>QASYMMU8
265 <tr><td>QASYMMS8
266 <tr><td>SIGNED32
267 <tr><td>FLOAT16
268 <tr><td>FLOAT32
269 </table>
270<tr>
Samuel Yap6b478092022-07-06 15:36:03 +0100[diff] [blame]271 <td rowspan="3">BatchMatMulLayer
272 <td rowspan="3" style="width:200px;"> Layer to perform batch matrix multiplication.
273 <td rowspan="3">
274 <ul>
275 <li>N/A
276 </ul>
277 <td>CpuRef
278 <td>
279 <ul>
280 <li>All
281 </ul>
282 <td>
283 <table>
284 <tr><th>
285 <tr><td>BFLOAT16
286 <tr><td>FLOAT16
287 <tr><td>FLOAT32
288 <tr><td>QASYMMS8
289 <tr><td>QASYMMU8
290 <tr><td>QSYMMS16
291 </table>
292<tr>
293 <td>CpuAcc
294 <td>
295 <ul>
Teresa Charlin0f86ecf2022-10-13 15:47:08 +0100[diff] [blame]296 <li>All
Samuel Yap6b478092022-07-06 15:36:03 +0100[diff] [blame]297 </ul>
298 <td>
Teresa Charlin0f86ecf2022-10-13 15:47:08 +0100[diff] [blame]299 <table>
300 <tr><th>
301 <tr><td>FLOAT32
Teresa Charlin1fe6c812022-11-01 15:59:50 +0000[diff] [blame]302 <tr><td>QASYMMS8
Teresa Charlin0f86ecf2022-10-13 15:47:08 +0100[diff] [blame]303 </table>
Samuel Yap6b478092022-07-06 15:36:03 +0100[diff] [blame]304<tr>
305 <td>GpuAcc
306 <td>
307 <ul>
Teresa Charlin94916a52022-10-19 08:48:07 +0100[diff] [blame]308 <li>All
Samuel Yap6b478092022-07-06 15:36:03 +0100[diff] [blame]309 </ul>
310 <td>
Teresa Charlin94916a52022-10-19 08:48:07 +0100[diff] [blame]311 <table>
312 <tr><th>
313 <tr><td>FLOAT32
Teresa Charlin97a3aef2023-01-10 10:32:51 +0000[diff] [blame]314 <tr><td>QASYMMS8
Teresa Charlin94916a52022-10-19 08:48:07 +0100[diff] [blame]315 </table>
Samuel Yap6b478092022-07-06 15:36:03 +0100[diff] [blame]316<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]317 <td rowspan="3">BatchNormalizationLayer
318 <td rowspan="3" style="width:200px;"> Layer to perform batch normalization.
319 <td rowspan="3">
320 <ul>
321 <li>N/A
322 </ul>
323 <td>CpuRef
324 <td>
325 <ul>
326 <li>All
327 </ul>
328 <td>
329 <table>
330 <tr><th>
331 <tr><td>BFLOAT16
332 <tr><td>FLOAT16
333 <tr><td>FLOAT32
334 <tr><td>QASYMMS8
335 <tr><td>QASYMMU8
336 <tr><td>QSYMMS16
337 </table>
338<tr>
339 <td>CpuAcc
340 <td>
341 <ul>
342 <li>NHWC
343 <li>NCHW
344 </ul>
345 <td>
346 <table>
347 <tr><th>
348 <tr><td>FLOAT32
349 <tr><td>FLOAT16
350 </table>
351<tr>
352 <td>GpuAcc
353 <td>
354 <ul>
355 <li>NHWC
356 <li>NCHW
357 </ul>
358 <td>
359 <table>
360 <tr><th>
361 <tr><td>FLOAT32
362 <tr><td>FLOAT16
363 </table>
364<tr>
365 <td rowspan="3">BatchToSpaceNdLayer
366 <td rowspan="3" style="width:200px;"> Layer to perform a batch to space transformation.
367 <td rowspan="3">
368 <ul>
369 <li>ANEURALNETWORKS_BATCH_TO_SPACE_ND
370 </ul>
371 <td>CpuRef
372 <td>
373 <ul>
374 <li>All
375 </ul>
376 <td>
377 <table>
378 <tr><th>
379 <tr><td>BFLOAT16
380 <tr><td>FLOAT16
381 <tr><td>FLOAT32
382 <tr><td>QASYMMS8
383 <tr><td>QASYMMU8
384 <tr><td>QSYMMS16
385 </table>
386<tr>
387 <td>CpuAcc
388 <td>
389 <ul>
390 <li>NHWC
391 <li>NCHW
392 </ul>
393 <td>
394 <table>
395 <tr><th>
396 <tr><td>All
397 </table>
398<tr>
399 <td>GpuAcc
400 <td>
401 <ul>
402 <li>NHWC
403 <li>NCHW
404 </ul>
405 <td>
406 <table>
407 <tr><th>
408 <tr><td>All
409 </table>
410<tr>
411 <td rowspan="3">CastLayer
412 <td rowspan="3" style="width:200px;"> Layer to cast a tensor to a type.
413 <td rowspan="3">
414 <ul>
415 <li>ANEURALNETWORKS_CAST
416 </ul>
417 <td>CpuRef
418 <td>
419 <ul>
420 <li>All
421 </ul>
422 <td>
423 <table>
424 <tr><th>
425 <tr><td>BFLOAT16
426 <tr><td>FLOAT16
427 <tr><td>FLOAT32
428 <tr><td>QSYMMS8
429 <tr><td>QASYMMS8
430 <tr><td>QASYMMU8
431 <tr><td>QSYMMS16
432 <tr><td>SIGNED32
433 </table>
434<tr>
435 <td>CpuAcc
436 <td>
437 <ul>
438 <li>All
439 </ul>
440 <td>
441 <table>
442 <tr><th>
443 <tr><td>QASYMMS8
444 <tr><td>QASYMMU8
445 <tr><td>FLOAT16
446 <tr><td>SIGNED32
447 <tr><td>FLOAT32
448 </table>
449<tr>
450 <td>GpuAcc
451 <td>
452 <ul>
453 <li>All
454 </ul>
455 <td>
456 <table>
457 <tr><th>
458 <tr><td>QASYMMS8
459 <tr><td>QASYMMU8
460 <tr><td>SIGNED32
461 <tr><td>FLOAT16
462 <tr><td>FLOAT32
463 </table>
464<tr>
Teresa Charlincd203852021-09-24 18:15:39 +0100[diff] [blame]465 <td rowspan="3">ChannelShuffleLayer
466 <td rowspan="3" style="width:200px;"> Layer to reorganize the channels of a tensor.
467 <td rowspan="3">
468 <ul>
469 <li>ANEURALNETWORKS_CHANNEL_SHUFFLE
470 </ul>
471 <td>CpuRef
472 <td>
473 <ul>
474 <li>All
475 </ul>
476 <td>
477 <table>
478 <tr><th>
479 <tr><td>FLOAT16
480 <tr><td>FLOAT32
481 <tr><td>QSYMMS8
482 <tr><td>QASYMMS8
483 <tr><td>QASYMMU8
484 </table>
485<tr>
486 <td>CpuAcc
487 <td>
488 <ul>
489 <li>All
490 </ul>
491 <td>
492 <table>
493 <tr><th>
494 <tr><td>QASYMMS8
495 <tr><td>QASYMMU8
496 <tr><td>FLOAT16
497 <tr><td>FLOAT32
498 </table>
499<tr>
500 <td>GpuAcc
501 <td>
502 <ul>
503 <li>All
504 </ul>
505 <td>
506 <table>
507 <tr><th>
508 <tr><td>QASYMMS8
509 <tr><td>QASYMMU8
510 <tr><td>FLOAT16
511 <tr><td>FLOAT32
512 </table>
513<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]514 <td rowspan="3">ComparisonLayer
515 <td rowspan="3" style="width:200px;"> Layer to compare 2 tensors.
516 <td rowspan="3">
517 <ul>
518 <li>ANEURALNETWORKS_EQUAL
519 <li>ANEURALNETWORKS_GREATER
520 <li>ANEURALNETWORKS_GREATER_EQUAL
521 <li>ANEURALNETWORKS_LESS
522 <li>ANEURALNETWORKS_LESS_EQUAL
523 <li>ANEURALNETWORKS_NOT_EQUAL
524 </ul>
525 <td>CpuRef
526 <td>
527 <ul>
528 <li>All
529 </ul>
530 <td>
531 <table>
532 <tr><th>
533 <tr><td>BFLOAT16
534 <tr><td>FLOAT16
535 <tr><td>FLOAT32
536 <tr><td>BOOLEAN
537 <tr><td>QASYMMS8
538 <tr><td>QASYMMU8
539 <tr><td>QSYMMS16
540 <tr><td>SIGNED32
541 </table>
542<tr>
543 <td>CpuAcc
544 <td>
545 <ul>
546 <li>All
547 </ul>
548 <td>
549 <table>
550 <tr><th>
551 <tr><td>All
552 </table>
553<tr>
554 <td>GpuAcc
555 <td>
556 <ul>
557 <li>All
558 </ul>
559 <td>
560 <table>
561 <tr><th>
562 <tr><td>All
563 </table>
564<tr>
565 <td rowspan="3">ConcatLayer
566 <td rowspan="3" style="width:200px;"> Layer to concatenate tensors along a given axis.
567 <td rowspan="3">
568 <ul>
569 <li>ANEURALNETWORKS_CONCATENATION
570 </ul>
571 <td>CpuRef
572 <td>
573 <ul>
574 <li>All
575 </ul>
576 <td>
577 <table>
578 <tr><th>
579 <tr><td>BFLOAT16
580 <tr><td>FLOAT16
581 <tr><td>FLOAT32
582 <tr><td>QASYMMS8
583 <tr><td>QASYMMU8
584 <tr><td>QSYMMS16
585 </table>
586<tr>
587 <td>CpuAcc
588 <td>
589 <ul>
590 <li>All
591 </ul>
592 <td>
593 <table>
594 <tr><th>
595 <tr><td>QASYMMU8
596 <tr><td>QASYMMS8
597 <tr><td>FLOAT16
598 <tr><td>FLOAT32
599 </table>
600<tr>
601 <td>GpuAcc
602 <td>
603 <ul>
604 <li>All
605 </ul>
606 <td>
607 <table>
608 <tr><th>
609 <tr><td>QASYMMU8
610 <tr><td>QASYMMS8
611 <tr><td>FLOAT16
612 <tr><td>FLOAT32
613 </table>
614<tr>
615 <td rowspan="3">ConstantLayer
616 <td rowspan="3" style="width:200px;"> Layer to provide a constant tensor.
617 <td rowspan="3">
618 <ul>
619 <li>N/A
620 </ul>
621 <td>CpuRef
622 <td>
623 <ul>
624 <li>All
625 </ul>
626 <td>
627 <table>
628 <tr><th>
629 <tr><td>BFLOAT16
630 <tr><td>FLOAT16
631 <tr><td>FLOAT32
632 <tr><td>QASYMMS8
633 <tr><td>QASYMMU8
634 <tr><td>QSYMMS8
635 <tr><td>QSYMMS16
636 <tr><td>SIGNED32
637 </table>
638<tr>
639 <td>CpuAcc
640 <td>
641 <ul>
642 <li>All
643 </ul>
644 <td>
645 <table>
646 <tr><th>
647 <tr><td>All
648 </table>
649<tr>
650 <td>GpuAcc
651 <td>
652 <ul>
653 <li>All
654 </ul>
655 <td>
656 <table>
657 <tr><th>
658 <tr><td>All
659 </table>
660<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]661 <td rowspan="3">ConvertFp16ToFp32Layer
662 <td rowspan="3" style="width:200px;"> Layer to convert Float16 tensor to Float32 tensor.
663 <td rowspan="3">
664 <ul>
665 <li>N/A
666 </ul>
667 <td>CpuRef
668 <td>
669 <ul>
670 <li>All
671 </ul>
672 <td>
673 <table>
674 <tr><th>
675 <tr><td>FLOAT16
676 <tr><td>FLOAT32
677 </table>
678<tr>
679 <td>CpuAcc
680 <td>
681 <ul>
682 <li>All
683 </ul>
684 <td>
685 <table>
686 <tr><th>
687 <tr><td>FLOAT16
688 <tr><td>FLOAT32
689 </table>
690<tr>
691 <td>GpuAcc
692 <td>
693 <ul>
694 <li>All
695 </ul>
696 <td>
697 <table>
698 <tr><th>
699 <tr><td>FLOAT16
700 <tr><td>FLOAT32
701 </table>
702<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]703 <td rowspan="3">ConvertFp32ToFp16Layer
704 <td rowspan="3" style="width:200px;"> Layer to convert Float32 tensor to Float16 tensor.
705 <td rowspan="3">
706 <ul>
707 <li>N/A
708 </ul>
709 <td>CpuRef
710 <td>
711 <ul>
712 <li>All
713 </ul>
714 <td>
715 <table>
716 <tr><th>
717 <tr><td>FLOAT16
718 <tr><td>FLOAT32
719 </table>
720<tr>
721 <td>CpuAcc
722 <td>
723 <ul>
724 <li>All
725 </ul>
726 <td>
727 <table>
728 <tr><th>
729 <tr><td>FLOAT16
730 <tr><td>FLOAT32
731 </table>
732<tr>
733 <td>GpuAcc
734 <td>
735 <ul>
736 <li>All
737 </ul>
738 <td>
739 <table>
740 <tr><th>
741 <tr><td>FLOAT16
742 <tr><td>FLOAT32
743 </table>
744<tr>
745 <td rowspan="3">Convolution2dLayer
746 <td rowspan="3" style="width:200px;"> Layer to compute a convolution operation.
747 <td rowspan="3">
748 <ul>
749 <li>ANEURALNETWORKS_CONV_2D
750 <li>ANEURALNETWORKS_GROUPED_CONV_2D
751 </ul>
752 <td>CpuRef
753 <td>
754 <ul>
755 <li>All
756 </ul>
757 <td>
758 <table>
759 <tr><th>
760 <tr><td>BFLOAT16
761 <tr><td>FLOAT16
762 <tr><td>FLOAT32
763 <tr><td>QASYMMS8
764 <tr><td>QASYMMU8
765 <tr><td>QSYMMS16
766 </table>
767<tr>
768 <td>CpuAcc
769 <td>
770 <ul>
771 <li>NHWC
772 <li>NCHW
773 </ul>
774 <td>
775 <table>
776 <tr><th>
777 <tr><td>SIGNED32
778 <tr><td>FLOAT16
779 <tr><td>FLOAT32
780 <tr><td>QASYMMU8
781 <tr><td>QASYMMS8
782 <tr><td>QUANTIZEDSYMM8PERAXIS
783 </table>
784<tr>
785 <td>GpuAcc
786 <td>
787 <ul>
788 <li>NHWC
789 <li>NCHW
790 </ul>
791 <td>
792 <table>
793 <tr><th>
794 <tr><td>SIGNED32
795 <tr><td>FLOAT16
796 <tr><td>FLOAT32
797 <tr><td>QASYMMU8
798 <tr><td>QASYMMS8
799 <tr><td>QUANTIZEDSYMM8PERAXIS
800 </table>
801<tr>
Matthew Sloyanb63a3112021-09-08 13:05:51 +0100[diff] [blame]802 <td rowspan="3">Convolution3dLayer
803 <td rowspan="3" style="width:200px;"> Layer to compute a 3D convolution operation.
804 <td rowspan="3">
805 <ul>
806 <li>N/A
807 </ul>
808 <td>CpuRef
809 <td>
810 <ul>
811 <li>NDHWC
812 </ul>
813 <td>
814 <table>
815 <tr><th>
816 <tr><td>BFLOAT16
817 <tr><td>FLOAT16
818 <tr><td>FLOAT32
819 <tr><td>QASYMMS8
820 <tr><td>QASYMMU8
821 <tr><td>QSYMMS8
822 <tr><td>QSYMMS16
823 </table>
824<tr>
825 <td>CpuAcc
826 <td>
827 <ul>
828 <li>N/A
829 </ul>
830 <td>
831 <ul>
832 <li>N/A
833 </ul>
834<tr>
835 <td>GpuAcc
836 <td>
837 <ul>
838 <li>N/A
839 </ul>
840 <td>
841 <ul>
842 <li>N/A
843 </ul>
844<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]845 <td rowspan="1">DebugLayer
846 <td rowspan="1" style="width:200px;"> Layer to print out inter layer tensor information.
847 <td rowspan="1">
848 <ul>
849 <li>N/A
850 </ul>
851 <td>CpuRef
852 <td>
853 <ul>
854 <li>All
855 </ul>
856 <td>
857 <table>
858 <tr><th>
859 <tr><td>BFLOAT16
860 <tr><td>FLOAT16
861 <tr><td>FLOAT32
862 <tr><td>QASYMMS8
863 <tr><td>QASYMMU8
864 <tr><td>QSYMMS8
865 <tr><td>QSYMMS16
866 <tr><td>SIGNED32
867 </table>
868<tr>
869 <td rowspan="3">DepthToSpaceLayer
870 <td rowspan="3" style="width:200px;"> Layer to perform Depth to Space transformation.
871 <td rowspan="3">
872 <ul>
873 <li>ANEURALNETWORKS_DEPTH_TO_SPACE
874 </ul>
875 <td>CpuRef
876 <td>
877 <ul>
878 <li>All
879 </ul>
880 <td>
881 <table>
882 <tr><th>
883 <tr><td>BFLOAT16
884 <tr><td>FLOAT16
885 <tr><td>FLOAT32
886 <tr><td>QASYMMS8
887 <tr><td>QASYMMU8
888 <tr><td>QSYMMS16
889 </table>
890<tr>
891 <td>CpuAcc
892 <td>
893 <ul>
894 <li>NHWC
895 <li>NCHW
896 </ul>
897 <td>
898 <table>
899 <tr><th>
900 <tr><td>All
901 </table>
902<tr>
903 <td>GpuAcc
904 <td>
905 <ul>
906 <li>NHWC
907 <li>NCHW
908 </ul>
909 <td>
910 <table>
911 <tr><th>
912 <tr><td>All
913 </table>
914<tr>
915 <td rowspan="3">DepthwiseConvolution2dLayer
916 <td rowspan="3" style="width:200px;"> Layer to compute a deconvolution or transpose convolution.
917 <td rowspan="3">
918 <ul>
919 <li>ANEURALNETWORKS_DEPTHWISE_CONV_2D
920 </ul>
921 <td>CpuRef
922 <td>
923 <ul>
924 <li>All
925 </ul>
926 <td>
927 <table>
928 <tr><th>
929 <tr><td>BFLOAT16
930 <tr><td>FLOAT16
931 <tr><td>FLOAT32
932 <tr><td>QASYMMS8
933 <tr><td>QASYMMU8
934 <tr><td>QSYMMS8
935 <tr><td>QSYMMS16
936 </table>
937<tr>
938 <td>CpuAcc
939 <td>
940 <ul>
941 <li>NHWC
942 <li>NCHW
943 </ul>
944 <td>
945 <table>
946 <tr><th>
947 <tr><td>FLOAT16
948 <tr><td>FLOAT32
949 <tr><td>SIGNED32
950 <tr><td>QASYMMU8
951 <tr><td>QASYMMS8
952 <tr><td>QUANTIZEDSYMM8PERAXIS
953 </table>
954<tr>
955 <td>GpuAcc
956 <td>
957 <ul>
958 <li>NHWC
959 <li>NCHW
960 </ul>
961 <td>
962 <table>
963 <tr><th>
964 <tr><td>FLOAT16
965 <tr><td>FLOAT32
966 <tr><td>SIGNED32
967 <tr><td>QASYMMU8
968 <tr><td>QASYMMS8
969 <tr><td>QUANTIZEDSYMM8PERAXIS
970 </table>
971<tr>
972 <td rowspan="3">DequantizeLayer
973 <td rowspan="3" style="width:200px;"> Layer to dequantize the values in a tensor.
974 <td rowspan="3">
975 <ul>
976 <li>ANEURALNETWORKS_DEQUANTIZE
977 </ul>
978 <td>CpuRef
979 <td>
980 <ul>
981 <li>All
982 </ul>
983 <td>
984 <table>
985 <tr><th>
986 <tr><td>QASYMMS8
987 <tr><td>QASYMMU8
988 <tr><td>QSYMMS8
989 <tr><td>QSYMMS16
990 </table>
991<tr>
992 <td>CpuAcc
993 <td>
994 <ul>
995 <li>All
996 </ul>
997 <td>
998 <table>
999 <tr><th>
1000 <tr><td>FLOAT16
1001 <tr><td>FLOAT32
1002 <tr><td>QASYMMU8
1003 <tr><td>QASYMMS8
1004 <tr><td>QUANTIZEDSYMM8PERAXIS
1005 <tr><td>QSYMMS8
1006 <tr><td>QSYMMS16
1007 </table>
1008<tr>
1009 <td>GpuAcc
1010 <td>
1011 <ul>
1012 <li>All
1013 </ul>
1014 <td>
1015 <table>
1016 <tr><th>
1017 <tr><td>FLOAT16
1018 <tr><td>FLOAT32
1019 <tr><td>QASYMMU8
1020 <tr><td>QASYMMS8
1021 <tr><td>QUANTIZEDSYMM8PERAXIS
1022 <tr><td>QSYMMS8
1023 <tr><td>QSYMMS16
1024 </table>
1025<tr>
1026 <td rowspan="2">DetectionPostProcessLayer
1027 <td rowspan="2" style="width:200px;"> Layer to generate the detection output based on center size encoded boxes, class prediction and anchors by doing non maximum suppression (NMS).
1028 <td rowspan="2">
1029 <ul>
1030 <li>ANEURALNETWORKS_DETECTION_POSTPROCESSING
1031 </ul>
1032 <td>CpuRef
1033 <td>
1034 <ul>
1035 <li>All
1036 </ul>
1037 <td>
1038 <table>
1039 <tr><th>
1040 <tr><td>BFLOAT16
1041 <tr><td>FLOAT16
1042 <tr><td>FLOAT32
1043 <tr><td>QASYMMS8
1044 <tr><td>QASYMMU8
1045 <tr><td>QSYMMS16
1046 </table>
1047<tr>
1048 <td>CpuAcc
1049 <td>
1050 <ul>
1051 <li>All
1052 </ul>
1053 <td>
1054 <table>
1055 <tr><th>
1056 <tr><td>QASYMMU8
1057 <tr><td>QASYMMS8
1058 <tr><td>FLOAT32
1059 </table>
1060<tr>
1061 <td rowspan="3">DivisionLayer
1062 <td rowspan="3" style="width:200px;"> Layer to divide 2 tensors.
1063 <td rowspan="3">
1064 <ul>
1065 <li>ANEURALNETWORKS_DIV
1066 </ul>
1067 <td>CpuRef
1068 <td>
1069 <ul>
1070 <li>All
1071 </ul>
1072 <td>
1073 <table>
1074 <tr><th>
1075 <tr><td>BFLOAT16
1076 <tr><td>FLOAT16
1077 <tr><td>FLOAT32
1078 <tr><td>QASYMMS8
1079 <tr><td>QASYMMU8
1080 <tr><td>QSYMMS16
1081 <tr><td>SIGNED32
1082 </table>
1083<tr>
1084 <td>CpuAcc
1085 <td>
1086 <ul>
1087 <li>All
1088 </ul>
1089 <td>
1090 <table>
1091 <tr><th>
1092 <tr><td>FLOAT16
1093 <tr><td>FLOAT32
1094 </table>
1095<tr>
1096 <td>GpuAcc
1097 <td>
1098 <ul>
1099 <li>All
1100 </ul>
1101 <td>
1102 <table>
1103 <tr><th>
1104 <tr><td>FLOAT16
1105 <tr><td>FLOAT32
1106 </table>
1107<tr>
1108 <td rowspan="3">ElementwiseBaseLayer
1109 <td rowspan="3" style="width:200px;"> Layer to perform Add - Div - Max - Min - Mul operations.
1110 <td rowspan="3">
1111 <ul>
1112 <li>ANEURALNETWORKS_ADD
1113 <li>ANEURALNETWORKS_DIV
1114 <li>ANEURALNETWORKS_MAXIMUM
1115 <li>ANEURALNETWORKS_MINIMUM
1116 <li>ANEURALNETWORKS_MUL
1117 </ul>
1118 <td>CpuRef
1119 <td>
1120 <ul>
1121 <li>All
1122 </ul>
1123 <td>
1124 <table>
1125 <tr><th>
1126 <tr><td>BFLOAT16
1127 <tr><td>FLOAT16
1128 <tr><td>FLOAT32
1129 <tr><td>QASYMMS8
1130 <tr><td>QASYMMU8
1131 <tr><td>QSYMMS16
1132 <tr><td>SIGNED32
1133 </table>
1134<tr>
1135 <td>CpuAcc
1136 <td>
1137 <ul>
1138 <li>All
1139 </ul>
1140 <td>
1141 <table>
1142 <tr><th>
1143 <tr><td>QASYMMU8
1144 <tr><td>QASYMMS8
1145 <tr><td>QSYMMS16
1146 <tr><td>SIGNED32
1147 <tr><td>FLOAT16
1148 <tr><td>FLOAT32
1149 </table>
1150<tr>
1151 <td>GpuAcc
1152 <td>
1153 <ul>
1154 <li>All
1155 </ul>
1156 <td>
1157 <table>
1158 <tr><th>
1159 <tr><td>QASYMMU8
1160 <tr><td>QASYMMS8
1161 <tr><td>QSYMMS16
1162 <tr><td>SIGNED32
1163 <tr><td>FLOAT16
1164 <tr><td>FLOAT32
1165 </table>
1166<tr>
1167 <td rowspan="3">ElementwiseUnaryLayer
1168 <td rowspan="3" style="width:200px;"> Layer to perform Rsqrt - Exp - Neg - Log - Abs - Sin - Sqrt operations.
1169 <td rowspan="3">
1170 <ul>
1171 <li>ANEURALNETWORKS_ABS
1172 <li>ANEURALNETWORKS_EXP
1173 <li>ANEURALNETWORKS_LOG
1174 <li>ANEURALNETWORKS_NEG
1175 <li>ANEURALNETWORKS_RSQRT
1176 <li>ANEURALNETWORKS_SIN
1177 <li>ANEURALNETWORKS_SQRT
1178 </ul>
1179 <td>CpuRef
1180 <td>
1181 <ul>
1182 <li>All
1183 </ul>
1184 <td>
1185 <table>
1186 <tr><th>
1187 <tr><td>BFLOAT16
1188 <tr><td>FLOAT16
1189 <tr><td>FLOAT32
1190 <tr><td>QASYMMS8
1191 <tr><td>QASYMMU8
1192 <tr><td>QSYMMS16
1193 </table>
1194<tr>
1195 <td>CpuAcc
1196 <td>
1197 <ul>
1198 <li>All
1199 </ul>
1200 <td>
1201 <table>
1202 <tr><th>
1203 <tr><td>FLOAT16
1204 <tr><td>FLOAT32
1205 <tr><td>SIGNED32
1206 </table>
1207<tr>
1208 <td>GpuAcc
1209 <td>
1210 <ul>
1211 <li>All
1212 </ul>
1213 <td>
1214 <table>
1215 <tr><th>
1216 <tr><td>FLOAT16
1217 <tr><td>FLOAT32
1218 </table>
1219<tr>
1220 <td rowspan="1">FakeQuantizationLayer
1221 <td rowspan="1" style="width:200px;"> Layer to quantize float values and dequantize afterwards. The current implementation does not dequantize the values.
1222 <td rowspan="1">
1223 <ul>
1224 <li>N/A
1225 </ul>
1226 <td>CpuRef
1227 <td>
1228 <ul>
1229 <li>All
1230 </ul>
1231 <td>
1232 <table>
1233 <tr><th>
1234 <tr><td>FLOAT32
1235 </table>
1236<tr>
1237 <td rowspan="3">FillLayer
1238 <td rowspan="3" style="width:200px;"> Layer to set the values of a tensor with a given value.
1239 <td rowspan="3">
1240 <ul>
1241 <li>ANEURALNETWORKS_FILL
1242 </ul>
1243 <td>CpuRef
1244 <td>
1245 <ul>
1246 <li>All
1247 </ul>
1248 <td>
1249 <table>
1250 <tr><th>
1251 <tr><td>FLOAT16
1252 <tr><td>FLOAT32
1253 <tr><td>SIGNED32
1254 </table>
1255<tr>
1256 <td>CpuAcc
1257 <td>
1258 <ul>
1259 <li>All
1260 </ul>
1261 <td>
1262 <table>
1263 <tr><th>
1264 <tr><td>All
1265 </table>
1266<tr>
1267 <td>GpuAcc
1268 <td>
1269 <ul>
1270 <li>All
1271 </ul>
1272 <td>
1273 <table>
1274 <tr><th>
1275 <tr><td>All
1276 </table>
1277<tr>
1278 <td rowspan="3">FloorLayer
1279 <td rowspan="3" style="width:200px;"> Layer to round the value to the lowest whole number.
1280 <td rowspan="3">
1281 <ul>
1282 <li>ANEURALNETWORKS_FLOOR
1283 </ul>
1284 <td>CpuRef
1285 <td>
1286 <ul>
1287 <li>All
1288 </ul>
1289 <td>
1290 <table>
1291 <tr><th>
1292 <tr><td>BFLOAT16
1293 <tr><td>FLOAT16
1294 <tr><td>FLOAT32
1295 </table>
1296<tr>
1297 <td>CpuAcc
1298 <td>
1299 <ul>
1300 <li>All
1301 </ul>
1302 <td>
1303 <table>
1304 <tr><th>
1305 <tr><td>FLOAT32
1306 <tr><td>FLOAT16
1307 </table>
1308<tr>
1309 <td>GpuAcc
1310 <td>
1311 <ul>
1312 <li>All
1313 </ul>
1314 <td>
1315 <table>
1316 <tr><th>
1317 <tr><td>FLOAT32
1318 <tr><td>FLOAT16
1319 </table>
1320<tr>
1321 <td rowspan="3">FullyConnectedLayer
1322 <td rowspan="3" style="width:200px;"> Layer to perform a fully connected / dense operation.
1323 <td rowspan="3">
1324 <ul>
1325 <li>ANEURALNETWORKS_FULLY_CONNECTED
1326 </ul>
1327 <td>CpuRef
1328 <td>
1329 <ul>
1330 <li>All
1331 </ul>
1332 <td>
1333 <table>
1334 <tr><th>
1335 <tr><td>BFLOAT16
1336 <tr><td>FLOAT16
1337 <tr><td>FLOAT32
1338 <tr><td>QASYMMS8
1339 <tr><td>QASYMMU8
1340 <tr><td>QSYMMS16
1341 </table>
1342<tr>
1343 <td>CpuAcc
1344 <td>
1345 <ul>
1346 <li>NHWC
1347 <li>NCHW
1348 </ul>
1349 <td>
1350 <table>
1351 <tr><th>
1352 <tr><td>SIGNED32
1353 <tr><td>FLOAT16
1354 <tr><td>FLOAT32
1355 <tr><td>QASYMMU8
1356 <tr><td>QASYMMS8
1357 </table>
1358<tr>
1359 <td>GpuAcc
1360 <td>
1361 <ul>
1362 <li>NHWC
1363 <li>NCHW
1364 </ul>
1365 <td>
1366 <table>
1367 <tr><th>
1368 <tr><td>SIGNED32
1369 <tr><td>FLOAT16
1370 <tr><td>FLOAT32
1371 <tr><td>QASYMMU8
1372 <tr><td>QASYMMS8
1373 </table>
1374<tr>
1375 <td rowspan="3">GatherLayer
1376 <td rowspan="3" style="width:200px;"> Layer to perform the gather operation along the chosen axis.
1377 <td rowspan="3">
1378 <ul>
1379 <li>ANEURALNETWORKS_GATHER
1380 </ul>
1381 <td>CpuRef
1382 <td>
1383 <ul>
1384 <li>All
1385 </ul>
1386 <td>
1387 <table>
1388 <tr><th>
1389 <tr><td>BFLOAT16
1390 <tr><td>FLOAT16
1391 <tr><td>FLOAT32
1392 <tr><td>QASYMMS8
1393 <tr><td>QASYMMU8
1394 <tr><td>QSYMMS16
1395 <tr><td>SIGNED32
1396 </table>
1397<tr>
1398 <td>CpuAcc
1399 <td>
1400 <ul>
1401 <li>All
1402 </ul>
1403 <td>
1404 <table>
1405 <tr><th>
1406 <tr><td>All
1407 </table>
1408<tr>
1409 <td>GpuAcc
1410 <td>
1411 <ul>
1412 <li>All
1413 </ul>
1414 <td>
1415 <table>
1416 <tr><th>
1417 <tr><td>All
1418 </table>
1419<tr>
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1420 <td rowspan="3">GatherNdLayer
1421 <td rowspan="3" style="width:200px;"> Layer to perform the gatherNd operation.
1422 <td rowspan="3">
1423 <ul>
1424 <li>N/A
1425 </ul>
1426 <td>CpuRef
1427 <td>
1428 <ul>
1429 <li>All
1430 </ul>
1431 <td>
1432 <table>
1433 <tr><th>
1434 <tr><td>BFLOAT16
1435 <tr><td>FLOAT16
1436 <tr><td>FLOAT32
1437 <tr><td>QASYMMS8
1438 <tr><td>QASYMMU8
1439 <tr><td>QSYMMS16
1440 <tr><td>SIGNED32
1441 </table>
1442<tr>
1443 <td>CpuAcc
1444 <td>
1445 <ul>
Teresa Charlinbd22c7d2022-04-26 18:14:12 +0100[diff] [blame]1446 <li>All
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1447 </ul>
1448 <td>
Teresa Charlinbd22c7d2022-04-26 18:14:12 +0100[diff] [blame]1449 <table>
1450 <tr><th>
1451 <tr><td>BFLOAT16
1452 <tr><td>FLOAT16
1453 <tr><td>FLOAT32
1454 <tr><td>QASYMMS8
1455 <tr><td>QASYMMU8
1456 <tr><td>QSYMMS16
1457 <tr><td>SIGNED32
1458 </table>
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1459<tr>
1460 <td>GpuAcc
1461 <td>
1462 <ul>
Teresa Charlin989e2f62022-04-27 16:26:11 +0100[diff] [blame]1463 <li>All
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1464 </ul>
1465 <td>
Teresa Charlin989e2f62022-04-27 16:26:11 +0100[diff] [blame]1466 <table>
1467 <tr><th>
1468 <tr><td>BFLOAT16
1469 <tr><td>FLOAT16
1470 <tr><td>FLOAT32
1471 <tr><td>QASYMMS8
1472 <tr><td>QASYMMU8
1473 <tr><td>QSYMMS16
1474 <tr><td>SIGNED32
1475 </table>
Teresa Charlinb2d3ec52022-04-12 22:07:09 +0100[diff] [blame]1476<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]1477 <td rowspan="1">InputLayer
1478 <td rowspan="1" style="width:200px;"> Special layer used to provide input data to the computational network.
1479 <td rowspan="1">
1480 <ul>
1481 <li>N/A
1482 </ul>
1483 <td>All
1484 <td>
1485 <ul>
1486 <li>All
1487 </ul>
1488 <td>
1489 <table>
1490 <tr><th>
1491 <tr><td>All
1492 </table>
1493<tr>
1494 <td rowspan="3">InstanceNormalizationLayer
1495 <td rowspan="3" style="width:200px;"> Layer to perform an instance normalization on a given axis.
1496 <td rowspan="3">
1497 <ul>
1498 <li>ANEURALNETWORKS_INSTANCE_NORMALIZATION
1499 </ul>
1500 <td>CpuRef
1501 <td>
1502 <ul>
1503 <li>All
1504 </ul>
1505 <td>
1506 <table>
1507 <tr><th>
1508 <tr><td>BFLOAT16
1509 <tr><td>FLOAT16
1510 <tr><td>FLOAT32
1511 </table>
1512<tr>
1513 <td>CpuAcc
1514 <td>
1515 <ul>
1516 <li>NHWC
1517 <li>NCHW
1518 </ul>
1519 <td>
1520 <table>
1521 <tr><th>
1522 <tr><td>FLOAT16
1523 <tr><td>FLOAT32
1524 </table>
1525<tr>
1526 <td>GpuAcc
1527 <td>
1528 <ul>
1529 <li>NHWC
1530 <li>NCHW
1531 </ul>
1532 <td>
1533 <table>
1534 <tr><th>
1535 <tr><td>FLOAT16
1536 <tr><td>FLOAT32
1537 </table>
1538<tr>
1539 <td rowspan="3">L2NormalizationLayer
1540 <td rowspan="3" style="width:200px;"> Layer to perform an L2 normalization on a given axis.
1541 <td rowspan="3">
1542 <ul>
1543 <li>ANEURALNETWORKS_L2_NORMALIZATION
1544 </ul>
1545 <td>CpuRef
1546 <td>
1547 <ul>
1548 <li>All
1549 </ul>
1550 <td>
1551 <table>
1552 <tr><th>
1553 <tr><td>BFLOAT16
1554 <tr><td>FLOAT16
1555 <tr><td>FLOAT32
1556 <tr><td>QASYMMS8
1557 <tr><td>QASYMMU8
1558 <tr><td>QSYMMS16
1559 </table>
1560<tr>
1561 <td>CpuAcc
1562 <td>
1563 <ul>
1564 <li>NHWC
1565 <li>NCHW
1566 </ul>
1567 <td>
1568 <table>
1569 <tr><th>
1570 <tr><td>FLOAT16
1571 <tr><td>FLOAT32
1572 </table>
1573<tr>
1574 <td>GpuAcc
1575 <td>
1576 <ul>
1577 <li>NHWC
1578 <li>NCHW
1579 </ul>
1580 <td>
1581 <table>
1582 <tr><th>
1583 <tr><td>FLOAT16
1584 <tr><td>FLOAT32
1585 </table>
1586<tr>
1587 <td rowspan="3">LogSoftmaxLayer
1588 <td rowspan="3" style="width:200px;"> Layer to perform the log softmax activations given logits.
1589 <td rowspan="3">
1590 <ul>
1591 <li>N/A
1592 </ul>
1593 <td>CpuRef
1594 <td>
1595 <ul>
1596 <li>All
1597 </ul>
1598 <td>
1599 <table>
1600 <tr><th>
1601 <tr><td>BFLOAT16
1602 <tr><td>FLOAT16
1603 <tr><td>FLOAT32
1604 </table>
1605<tr>
1606 <td>CpuAcc
1607 <td>
1608 <ul>
1609 <li>All
1610 </ul>
1611 <td>
1612 <table>
1613 <tr><th>
1614 <tr><td>QASYMMU8
1615 <tr><td>QASYMMS8
1616 <tr><td>FLOAT16
1617 <tr><td>FLOAT32
1618 </table>
1619<tr>
1620 <td>GpuAcc
1621 <td>
1622 <ul>
1623 <li>All
1624 </ul>
1625 <td>
1626 <table>
1627 <tr><th>
1628 <tr><td>QASYMMU8
1629 <tr><td>QASYMMS8
1630 <tr><td>FLOAT16
1631 <tr><td>FLOAT32
1632 </table>
1633<tr>
1634 <td rowspan="3">LogicalBinaryLayer
1635 <td rowspan="3" style="width:200px;"> Layer to perform Logical AND - Logical NOT - Logical OR operations.
1636 <td rowspan="3">
1637 <ul>
1638 <li>ANEURALNETWORKS_LOGICAL_AND
1639 <li>ANEURALNETWORKS_LOGICAL_NOT
1640 <li>ANEURALNETWORKS_LOGICAL_OR
1641 </ul>
1642 <td>CpuRef
1643 <td>
1644 <ul>
1645 <li>All
1646 </ul>
1647 <td>
1648 <table>
1649 <tr><th>
1650 <tr><td>BOOLEAN
1651 </table>
1652<tr>
1653 <td>CpuAcc
1654 <td>
1655 <ul>
1656 <li>All
1657 </ul>
1658 <td>
1659 <table>
1660 <tr><th>
1661 <tr><td>BOOLEAN
1662 </table>
1663<tr>
1664 <td>GpuAcc
1665 <td>
1666 <ul>
1667 <li>All
1668 </ul>
1669 <td>
1670 <table>
1671 <tr><th>
1672 <tr><td>BOOLEAN
1673 </table>
1674<tr>
1675 <td rowspan="3">LstmLayer
1676 <td rowspan="3" style="width:200px;"> Layer to perform a single time step in a Long Short-Term Memory (LSTM) operation.
1677 <td rowspan="3">
1678 <ul>
1679 <li>ANEURALNETWORKS_LSTM
1680 </ul>
1681 <td>CpuRef
1682 <td>
1683 <ul>
1684 <li>All
1685 </ul>
1686 <td>
1687 <table>
1688 <tr><th>
1689 <tr><td>BFLOAT16
1690 <tr><td>FLOAT16
1691 <tr><td>QSYMMS16
1692 </table>
1693<tr>
1694 <td>CpuAcc
1695 <td>
1696 <ul>
1697 <li>All
1698 </ul>
1699 <td>
1700 <table>
1701 <tr><th>
1702 <tr><td>FLOAT16
1703 <tr><td>FLOAT32
1704 </table>
1705<tr>
1706 <td>GpuAcc
1707 <td>
1708 <ul>
1709 <li>All
1710 </ul>
1711 <td>
1712 <table>
1713 <tr><th>
1714 <tr><td>FLOAT16
1715 <tr><td>FLOAT32
1716 </table>
1717<tr>
1718 <td rowspan="3">MapLayer
1719 <td rowspan="3" style="width:200px;"> Layer to perform map operation on tensor.
1720 <td rowspan="3">
1721 <ul>
1722 <li>N/A
1723 </ul>
1724 <td>CpuRef
1725 <td>
1726 <ul>
1727 <li>All
1728 </ul>
1729 <td>
1730 <table>
1731 <tr><th>
1732 <tr><td>All
1733 </table>
1734<tr>
1735 <td>CpuAcc
1736 <td>
1737 <ul>
1738 <li>All
1739 </ul>
1740 <td>
1741 <table>
1742 <tr><th>
1743 <tr><td>All
1744 </table>
1745<tr>
1746 <td>GpuAcc
1747 <td>
1748 <ul>
1749 <li>All
1750 </ul>
1751 <td>
1752 <table>
1753 <tr><th>
1754 <tr><td>All
1755 </table>
1756<tr>
1757 <td rowspan="3">MaximumLayer
1758 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise maximum of two tensors.
1759 <td rowspan="3">
1760 <ul>
1761 <li>N/A
1762 </ul>
1763 <td>CpuRef
1764 <td>
1765 <ul>
1766 <li>All
1767 </ul>
1768 <td>
1769 <table>
1770 <tr><th>
1771 <tr><td>BFLOAT16
1772 <tr><td>FLOAT16
1773 <tr><td>FLOAT32
1774 <tr><td>QASYMMS8
1775 <tr><td>QASYMMU8
1776 <tr><td>QSYMMS16
1777 <tr><td>SIGNED32
1778 </table>
1779<tr>
1780 <td>CpuAcc
1781 <td>
1782 <ul>
1783 <li>All
1784 </ul>
1785 <td>
1786 <table>
1787 <tr><th>
1788 <tr><td>QASYMMU8
1789 <tr><td>QASYMMS8
1790 <tr><td>FLOAT16
1791 <tr><td>FLOAT32
1792 <tr><td>SIGNED32
1793 </table>
1794<tr>
1795 <td>GpuAcc
1796 <td>
1797 <ul>
1798 <li>All
1799 </ul>
1800 <td>
1801 <table>
1802 <tr><th>
1803 <tr><td>QASYMMU8
1804 <tr><td>QASYMMS8
1805 <tr><td>QSYMMS16
1806 <tr><td>FLOAT16
1807 <tr><td>FLOAT32
1808 <tr><td>SIGNED32
1809 </table>
1810<tr>
1811 <td rowspan="3">MeanLayer
1812 <td rowspan="3" style="width:200px;"> Layer to perform reduce mean operation.
1813 <td rowspan="3">
1814 <ul>
1815 <li>ANEURALNETWORKS_MEAN
1816 </ul>
1817 <td>CpuRef
1818 <td>
1819 <ul>
1820 <li>All
1821 </ul>
1822 <td>
1823 <table>
1824 <tr><th>
1825 <tr><td>BFLOAT16
1826 <tr><td>FLOAT16
1827 <tr><td>FLOAT32
1828 <tr><td>QASYMMS8
1829 <tr><td>QASYMMU8
1830 <tr><td>QSYMMS16
1831 </table>
1832<tr>
1833 <td>CpuAcc
1834 <td>
1835 <ul>
1836 <li>All
1837 </ul>
1838 <td>
1839 <table>
1840 <tr><th>
1841 <tr><td>QASYMMU8
1842 <tr><td>QASYMMS8
1843 <tr><td>FLOAT16
1844 <tr><td>FLOAT32
1845 </table>
1846<tr>
1847 <td>GpuAcc
1848 <td>
1849 <ul>
1850 <li>All
1851 </ul>
1852 <td>
1853 <table>
1854 <tr><th>
1855 <tr><td>QASYMMU8
1856 <tr><td>QASYMMS8
1857 <tr><td>FLOAT16
1858 <tr><td>FLOAT32
1859 </table>
1860<tr>
1861 <td rowspan="3">MemCopyLayer
1862 <td rowspan="3" style="width:200px;"> Layer to perform memory copy operation.
1863 <td rowspan="3">
1864 <ul>
1865 <li>N/A
1866 </ul>
1867 <td>CpuRef
1868 <td>
1869 <ul>
1870 <li>All
1871 </ul>
1872 <td>
1873 <table>
1874 <tr><th>
1875 <tr><td>BFLOAT16
1876 <tr><td>FLOAT16
1877 <tr><td>FLOAT32
1878 <tr><td>QASYMMS8
1879 <tr><td>QASYMMU8
1880 <tr><td>QSYMMS16
1881 <tr><td>BOOLEAN
1882 </table>
1883<tr>
1884 <td>CpuAcc
1885 <td>
1886 <ul>
1887 <li>All
1888 </ul>
1889 <td>
1890 <table>
1891 <tr><th>
1892 <tr><td>All
1893 </table>
1894<tr>
1895 <td>GpuAcc
1896 <td>
1897 <ul>
1898 <li>All
1899 </ul>
1900 <td>
1901 <table>
1902 <tr><th>
1903 <tr><td>All
1904 </table>
1905<tr>
1906 <td rowspan="3">MemImportLayer
1907 <td rowspan="3" style="width:200px;"> Layer to perform memory import operation.
1908 <td rowspan="3">
1909 <ul>
1910 <li>N/A
1911 </ul>
1912 <td>CpuRef
1913 <td>
1914 <ul>
1915 <li>All
1916 </ul>
1917 <td>
1918 <table>
1919 <tr><th>
1920 <tr><td>All
1921 </table>
1922<tr>
1923 <td>CpuAcc
1924 <td>
1925 <ul>
1926 <li>All
1927 </ul>
1928 <td>
1929 <table>
1930 <tr><th>
1931 <tr><td>All
1932 </table>
1933<tr>
1934 <td>GpuAcc
1935 <td>
1936 <ul>
1937 <li>All
1938 </ul>
1939 <td>
1940 <table>
1941 <tr><th>
1942 <tr><td>All
1943 </table>
1944<tr>
1945 <td rowspan="3">MergeLayer
1946 <td rowspan="3" style="width:200px;"> Layer to concatenate tensors along a given axis.
1947 <td rowspan="3">
1948 <ul>
1949 <li>ANEURALNETWORKS_CONCATENATION
1950 </ul>
1951 <td>CpuRef
1952 <td>
1953 <ul>
1954 <li>All
1955 </ul>
1956 <td>
1957 <table>
1958 <tr><th>
1959 <tr><td>BFLOAT16
1960 <tr><td>FLOAT16
1961 <tr><td>FLOAT32
1962 <tr><td>QASYMMS8
1963 <tr><td>QASYMMU8
1964 <tr><td>QSYMMS16
1965 </table>
1966<tr>
1967 <td>CpuAcc
1968 <td>
1969 <ul>
1970 <li>All
1971 </ul>
1972 <td>
1973 <table>
1974 <tr><th>
1975 <tr><td>QASYMMU8
1976 <tr><td>QASYMMS8
1977 <tr><td>FLOAT16
1978 <tr><td>FLOAT32
1979 </table>
1980<tr>
1981 <td>GpuAcc
1982 <td>
1983 <ul>
1984 <li>All
1985 </ul>
1986 <td>
1987 <table>
1988 <tr><th>
1989 <tr><td>QASYMMU8
1990 <tr><td>QASYMMS8
1991 <tr><td>FLOAT16
1992 <tr><td>FLOAT32
1993 </table>
1994<tr>
1995 <td rowspan="3">MinimumLayer
1996 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise minimum of two tensors.
1997 <td rowspan="3">
1998 <ul>
1999 <li>ANEURALNETWORKS_MINIMUM
2000 </ul>
2001 <td>CpuRef
2002 <td>
2003 <ul>
2004 <li>All
2005 </ul>
2006 <td>
2007 <table>
2008 <tr><th>
2009 <tr><td>BFLOAT16
2010 <tr><td>FLOAT16
2011 <tr><td>FLOAT32
2012 <tr><td>QASYMMS8
2013 <tr><td>QASYMMU8
2014 <tr><td>QSYMMS16
2015 <tr><td>SIGNED32
2016 </table>
2017<tr>
2018 <td>CpuAcc
2019 <td>
2020 <ul>
2021 <li>All
2022 </ul>
2023 <td>
2024 <table>
2025 <tr><th>
2026 <tr><td>QASYMMU8
2027 <tr><td>QASYMMS8
2028 <tr><td>QSYMMS16
2029 <tr><td>FLOAT16
2030 <tr><td>FLOAT32
2031 </table>
2032<tr>
2033 <td>GpuAcc
2034 <td>
2035 <ul>
2036 <li>All
2037 </ul>
2038 <td>
2039 <table>
2040 <tr><th>
2041 <tr><td>QASYMMU8
2042 <tr><td>QASYMMS8
2043 <tr><td>QSYMMS16
2044 <tr><td>FLOAT16
2045 <tr><td>FLOAT32
2046 <tr><td>SIGNED32
2047 </table>
2048<tr>
2049 <td rowspan="3">MultiplicationLayer
2050 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise multiplication of two tensors.
2051 <td rowspan="3">
2052 <ul>
2053 <li>ANEURALNETWORKS_MUL
2054 </ul>
2055 <td>CpuRef
2056 <td>
2057 <ul>
2058 <li>All
2059 </ul>
2060 <td>
2061 <table>
2062 <tr><th>
2063 <tr><td>BFLOAT16
2064 <tr><td>FLOAT16
2065 <tr><td>FLOAT32
2066 <tr><td>QASYMMS8
2067 <tr><td>QASYMMU8
2068 <tr><td>QSYMMS16
2069 <tr><td>SIGNED32
2070 </table>
2071<tr>
2072 <td>CpuAcc
2073 <td>
2074 <ul>
2075 <li>All
2076 </ul>
2077 <td>
2078 <table>
2079 <tr><th>
2080 <tr><td>QASYMMU8
2081 <tr><td>QASYMMS8
2082 <tr><td>QSYMMS16
2083 <tr><td>SIGNED32
2084 <tr><td>FLOAT16
2085 <tr><td>FLOAT32
2086 </table>
2087<tr>
2088 <td>GpuAcc
2089 <td>
2090 <ul>
2091 <li>All
2092 </ul>
2093 <td>
2094 <table>
2095 <tr><th>
2096 <tr><td>QASYMMU8
2097 <tr><td>QASYMMS8
2098 <tr><td>QSYMMS16
2099 <tr><td>SIGNED32
2100 <tr><td>FLOAT16
2101 <tr><td>FLOAT32
2102 <tr><td>SIGNED32
2103 </table>
2104<tr>
2105 <td rowspan="3">NormalizationLayer
2106 <td rowspan="3" style="width:200px;"> Layer to compute normalization operation.
2107 <td rowspan="3">
2108 <ul>
2109 <li>ANEURALNETWORKS_LOCAL_RESPONSE_NORMALIZATION
2110 </ul>
2111 <td>CpuRef
2112 <td>
2113 <ul>
2114 <li>All
2115 </ul>
2116 <td>
2117 <table>
2118 <tr><th>
2119 <tr><td>BFLOAT16
2120 <tr><td>FLOAT16
2121 <tr><td>FLOAT32
2122 <tr><td>QASYMMS8
2123 <tr><td>QASYMMU8
2124 <tr><td>QSYMMS16
2125 </table>
2126<tr>
2127 <td>CpuAcc
2128 <td>
2129 <ul>
2130 <li>NHWC
2131 <li>NCHW
2132 </ul>
2133 <td>
2134 <table>
2135 <tr><th>
2136 <tr><td>FLOAT32
2137 <tr><td>FLOAT16
2138 </table>
2139<tr>
2140 <td>GpuAcc
2141 <td>
2142 <ul>
2143 <li>NHWC
2144 <li>NCHW
2145 </ul>
2146 <td>
2147 <table>
2148 <tr><th>
2149 <tr><td>FLOAT32
2150 <tr><td>FLOAT16
2151 </table>
2152<tr>
2153 <td rowspan="1">OutputLayer
2154 <td rowspan="1" style="width:200px;"> A special layer providing access to a user supplied buffer into which the output of a network can be written.
2155 <td rowspan="1">
2156 <ul>
2157 <li>N/A
2158 </ul>
2159 <td>All
2160 <td>
2161 <ul>
2162 <li>All
2163 </ul>
2164 <td>
2165 <table>
2166 <tr><th>
2167 <tr><td>All
2168 </table>
2169<tr>
2170 <td rowspan="3">PadLayer
2171 <td rowspan="3" style="width:200px;"> Layer to pad a tensor.
2172 <td rowspan="3">
2173 <ul>
2174 <li>ANEURALNETWORKS_PAD
2175 <li>ANEURALNETWORKS_PAD_V2
2176 </ul>
2177 <td>CpuRef
2178 <td>
2179 <ul>
2180 <li>All
2181 </ul>
2182 <td>
2183 <table>
2184 <tr><th>
2185 <tr><td>BFLOAT16
2186 <tr><td>FLOAT16
2187 <tr><td>FLOAT32
2188 <tr><td>QASYMMS8
2189 <tr><td>QASYMMU8
2190 <tr><td>QSYMMS16
2191 </table>
2192<tr>
2193 <td>CpuAcc
2194 <td>
2195 <ul>
2196 <li>NHWC
2197 <li>NCHW
2198 </ul>
2199 <td>
2200 <table>
2201 <tr><th>
2202 <tr><td>All
2203 </table>
2204<tr>
2205 <td>GpuAcc
2206 <td>
2207 <ul>
2208 <li>NHWC
2209 <li>NCHW
2210 </ul>
2211 <td>
2212 <table>
2213 <tr><th>
2214 <tr><td>All
2215 </table>
2216<tr>
2217 <td rowspan="3">PermuteLayer
2218 <td rowspan="3" style="width:200px;"> Layer to transpose an ND tensor.
2219 <td rowspan="3">
2220 <ul>
2221 <li>ANEURALNETWORKS_TRANSPOSE
2222 </ul>
2223 <td>CpuRef
2224 <td>
2225 <ul>
2226 <li>All
2227 </ul>
2228 <td>
2229 <table>
2230 <tr><th>
2231 <tr><td>BFLOAT16
2232 <tr><td>FLOAT16
2233 <tr><td>FLOAT32
2234 <tr><td>QASYMMS8
2235 <tr><td>QASYMMU8
2236 <tr><td>QSYMMS16
2237 </table>
2238<tr>
2239 <td>CpuAcc
2240 <td>
2241 <ul>
2242 <li>NHWC
2243 <li>NCHW
2244 </ul>
2245 <td>
2246 <table>
2247 <tr><th>
2248 <tr><td>All
2249 </table>
2250<tr>
2251 <td>GpuAcc
2252 <td>
2253 <ul>
2254 <li>NHWC
2255 <li>NCHW
2256 </ul>
2257 <td>
2258 <table>
2259 <tr><th>
2260 <tr><td>All
2261 </table>
2262<tr>
2263 <td rowspan="3">Pooling2dLayer
Tamás Nyíri7b885b32021-10-26 14:47:57 +0100[diff] [blame]2264 <td rowspan="3" style="width:200px;"> Layer to perform 2D pooling with the specified pooling operation.
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2265 <td rowspan="3">
2266 <ul>
2267 <li>ANEURALNETWORKS_AVERAGE_POOL_2D
2268 <li>ANEURALNETWORKS_L2_POOL_2D
2269 <li>ANEURALNETWORKS_MAX_POOL_2D
2270 </ul>
2271 <td>CpuRef
2272 <td>
2273 <ul>
2274 <li>All
2275 </ul>
2276 <td>
2277 <table>
2278 <tr><th>
2279 <tr><td>BFLOAT16
2280 <tr><td>FLOAT16
2281 <tr><td>FLOAT32
2282 <tr><td>QASYMMS8
2283 <tr><td>QASYMMU8
2284 <tr><td>QSYMMS16
2285 </table>
2286<tr>
2287 <td>CpuAcc
2288 <td>
2289 <ul>
2290 <li>NHWC
2291 <li>NCHW
2292 </ul>
2293 <td>
2294 <table>
2295 <tr><th>
2296 <tr><td>QASYMMU8
2297 <tr><td>QASYMMS8
2298 <tr><td>FLOAT16
2299 <tr><td>FLOAT32
2300 </table>
2301<tr>
2302 <td>GpuAcc
2303 <td>
2304 <ul>
2305 <li>NHWC
2306 <li>NCHW
2307 </ul>
2308 <td>
2309 <table>
2310 <tr><th>
2311 <tr><td>QASYMMU8
2312 <tr><td>QASYMMS8
2313 <tr><td>FLOAT16
2314 <tr><td>FLOAT32
2315 </table>
2316<tr>
Tamás Nyíri7b885b32021-10-26 14:47:57 +0100[diff] [blame]2317 <td rowspan="3">Pooling3dLayer
2318 <td rowspan="3" style="width:200px;"> Layer to perform 3D pooling with the specified pooling operation.
2319 <td rowspan="3">
2320 <ul>
2321 <li>ANEURALNETWORKS_AVERAGE_POOL_3D
2322 <li>ANEURALNETWORKS_L2_POOL_3D
2323 <li>ANEURALNETWORKS_MAX_POOL_3D
2324 </ul>
2325 <td>CpuRef
2326 <td>
2327 <ul>
2328 <li>NDHWC
2329 </ul>
2330 <td>
2331 <table>
2332 <tr><th>
2333 <tr><td>BFLOAT16
2334 <tr><td>FLOAT16
2335 <tr><td>FLOAT32
2336 <tr><td>QASYMMS8
2337 <tr><td>QASYMMU8
2338 <tr><td>QSYMMS16
2339 </table>
2340<tr>
2341 <td>CpuAcc
2342 <td>
2343 <ul>
2344 <li>NA
2345 </ul>
2346 <td>
2347<tr>
2348 <td>GpuAcc
2349 <td>
2350 <ul>
2351 <li>NDHWC
2352 </ul>
2353<tr>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2354 <td rowspan="1">PreCompiledLayer
2355 <td rowspan="1" style="width:200px;"> Opaque layer provided by a backend which provides an executable representation of a subgraph from the original network.
2356 <td rowspan="1">
2357 <ul>
2358 <li>N/A
2359 </ul>
2360 <td>N/A
2361 <td>N/A
2362 <td>N/A
2363<tr>
2364 <td rowspan="3">PreluLayer
2365 <td rowspan="3" style="width:200px;"> Layer to compute the activation layer with the PRELU activation function.
2366 <td rowspan="3">
2367 <ul>
2368 <li>ANEURALNETWORKS_PRELU
2369 </ul>
2370 <td>CpuRef
2371 <td>
2372 <ul>
2373 <li>All
2374 </ul>
2375 <td>
2376 <table>
2377 <tr><th>
2378 <tr><td>BFLOAT16
2379 <tr><td>FLOAT16
2380 <tr><td>FLOAT32
2381 <tr><td>QASYMMS8
2382 <tr><td>QASYMMU8
2383 <tr><td>QSYMMS16
2384 </table>
2385<tr>
2386 <td>CpuAcc
2387 <td>
2388 <ul>
2389 <li>All
2390 </ul>
2391 <td>
2392 <table>
2393 <tr><th>
2394 <tr><td>QASYMMU8
2395 <tr><td>QASYMMS8
2396 <tr><td>FLOAT16
2397 <tr><td>FLOAT32
2398 </table>
2399<tr>
2400 <td>GpuAcc
2401 <td>
2402 <ul>
2403 <li>All
2404 </ul>
2405 <td>
2406 <table>
2407 <tr><th>
2408 <tr><td>QASYMMU8
2409 <tr><td>QASYMMS8
2410 <tr><td>FLOAT16
2411 <tr><td>FLOAT32
2412 </table>
2413<tr>
2414 <td rowspan="3">QLstmLayer
2415 <td rowspan="3" style="width:200px;"> Layer to perform quantized LSTM (Long Short-Term Memory) operation.
2416 <td rowspan="3">
2417 <ul>
2418 <li>ANEURALNETWORKS_QUANTIZED_LSTM
2419 <li>ANEURALNETWORKS_QUANTIZED_16BIT_LSTM
2420 </ul>
2421 <td>CpuRef
2422 <td>
2423 <ul>
2424 <li>All
2425 </ul>
2426 <td>
2427 <table>
2428 <tr><th>
2429 <tr><td>All
2430 </table>
2431<tr>
2432 <td>CpuAcc
2433 <td>
2434 <ul>
2435 <li>All
2436 </ul>
2437 <td>
2438 <table>
2439 <tr><th>
2440 <tr><td>QASYMMS8
2441 <tr><td>QASYMMU8
2442 <tr><td>SIGNED32
2443 <tr><td>QSYMMS16
2444 </table>
2445<tr>
2446 <td>GpuAcc
2447 <td>
2448 <ul>
2449 <li>All
2450 </ul>
2451 <td>
2452 <table>
2453 <tr><th>
2454 <tr><td>QASYMMS8
2455 <tr><td>QASYMMU8
2456 <tr><td>SIGNED32
2457 <tr><td>QSYMMS16
2458 </table>
2459<tr>
2460 <td rowspan="3">QuantizeLayer
2461 <td rowspan="3" style="width:200px;"> Layer to perform quantization operation.
2462 <td rowspan="3">
2463 <ul>
2464 <li>ANEURALNETWORKS_QUANTIZE
2465 </ul>
2466 <td>CpuRef
2467 <td>
2468 <ul>
2469 <li>All
2470 </ul>
2471 <td>
2472 <table>
2473 <tr><th>
2474 <tr><td>BFLOAT16
2475 <tr><td>FLOAT16
2476 <tr><td>FLOAT32
2477 <tr><td>QASYMMS8
2478 <tr><td>QASYMMU8
2479 <tr><td>QSYMMS8
2480 <tr><td>QSYMMS16
2481 </table>
2482<tr>
2483 <td>CpuAcc
2484 <td>
2485 <ul>
2486 <li>All
2487 </ul>
2488 <td>
2489 <table>
2490 <tr><th>
2491 <tr><td>QASYMMU8
2492 <tr><td>QASYMMS8
2493 <tr><td>QASYMM16
2494 <tr><td>FLOAT16
2495 <tr><td>FLOAT32
2496 </table>
2497<tr>
2498 <td>GpuAcc
2499 <td>
2500 <ul>
2501 <li>All
2502 </ul>
2503 <td>
2504 <table>
2505 <tr><th>
2506 <tr><td>QASYMMU8
2507 <tr><td>QASYMMS8
2508 <tr><td>QASYMM16
2509 <tr><td>FLOAT16
2510 <tr><td>FLOAT32
2511 </table>
2512<tr>
2513 <td rowspan="3">QuantizedLstmLayer
2514 <td rowspan="3" style="width:200px;"> Layer to perform quantized LSTM (Long Short-Term Memory) operation.
2515 <td rowspan="3">
2516 <ul>
2517 <li>ANEURALNETWORKS_QUANTIZED_LSTM
2518 <li>ANEURALNETWORKS_QUANTIZED_16BIT_LSTM
2519 </ul>
2520 <td>CpuRef
2521 <td>
2522 <ul>
2523 <li>All
2524 </ul>
2525 <td>
2526 <table>
2527 <tr><th>
2528 <tr><td>All
2529 </table>
2530<tr>
2531 <td>CpuAcc
2532 <td>
2533 <ul>
2534 <li>All
2535 </ul>
2536 <td>
2537 <table>
2538 <tr><th>
2539 <tr><td>SIGNED32
2540 <tr><td>QASYMMU8
2541 <tr><td>QSYMMS16
2542 </table>
2543<tr>
2544 <td>GpuAcc
2545 <td>
2546 <ul>
2547 <li>All
2548 </ul>
2549 <td>
2550 <table>
2551 <tr><th>
2552 <tr><td>SIGNED32
2553 <tr><td>QASYMMU8
2554 <tr><td>QSYMMS16
2555 </table>
2556<tr>
2557 <td rowspan="3">RankLayer
2558 <td rowspan="3" style="width:200px;"> Layer to perform a rank operation.
2559 <td rowspan="3">
2560 <ul>
2561 <li>ANEURALNETWORKS_RANK
2562 </ul>
2563 <td>CpuRef
2564 <td>
2565 <ul>
2566 <li>All
2567 </ul>
2568 <td>
2569 <table>
2570 <tr><th>
2571 <tr><td>All
2572 </table>
2573<tr>
2574 <td>CpuAcc
2575 <td>
2576 <ul>
2577 <li>All
2578 </ul>
2579 <td>
2580 <table>
2581 <tr><th>
2582 <tr><td>All
2583 </table>
2584<tr>
2585 <td>GpuAcc
2586 <td>
2587 <ul>
2588 <li>All
2589 </ul>
2590 <td>
2591 <table>
2592 <tr><th>
2593 <tr><td>All
2594 </table>
2595<tr>
2596 <td rowspan="3">ReduceLayer
2597 <td rowspan="3" style="width:200px;"> Layer to perform reduce with the following operations - ARG_IDX_MAX: Index of the max value - ARG_IDX_MIN: Index of the min value - MEAN_SUM: Mean of sum - PROD: Product - SUM_SQUARE: Sum of squares - SUM: Sum - MIN: Min - MAX: Max
2598 <td rowspan="3">
2599 <ul>
2600 <li>ANEURALNETWORKS_REDUCE_MAX
2601 <li>ANEURALNETWORKS_REDUCE_MIN
2602 <li>ANEURALNETWORKS_REDUCE_SUM
Teresa Charlin32b78702021-09-03 11:25:54 +0100[diff] [blame]2603 <li>ANEURALNETWORKS_REDUCE_PROD
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]2604 </ul>
2605 <td>CpuRef
2606 <td>
2607 <ul>
2608 <li>All
2609 </ul>
2610 <td>
2611 <table>
2612 <tr><th>
2613 <tr><td>BFLOAT16
2614 <tr><td>FLOAT16
2615 <tr><td>FLOAT32
2616 <tr><td>QASYMMS8
2617 <tr><td>QASYMMU8
2618 <tr><td>QSYMMS16
2619 <tr><td>SIGNED32
2620 </table>
2621<tr>
2622 <td>CpuAcc
2623 <td>
2624 <ul>
2625 <li>All
2626 </ul>
2627 <td>
2628 <table>
2629 <tr><th>
2630 <tr><td>QASYMMU8
2631 <tr><td>QASYMMS8
2632 <tr><td>FLOAT16
2633 <tr><td>FLOAT32
2634 <tr><td>SIGNED32
2635 </table>
2636<tr>
2637 <td>GpuAcc
2638 <td>
2639 <ul>
2640 <li>All
2641 </ul>
2642 <td>
2643 <table>
2644 <tr><th>
2645 <tr><td>QASYMMU8
2646 <tr><td>QASYMMS8
2647 <tr><td>FLOAT16
2648 <tr><td>FLOAT32
2649 <tr><td>SIGNED32
2650 </table>
2651<tr>
2652 <td rowspan="3">ReshapeLayer
2653 <td rowspan="3" style="width:200px;"> Layer to reshape a tensor.
2654 <td rowspan="3">
2655 <ul>
2656 <li>ANEURALNETWORKS_RESHAPE
2657 <li>ANEURALNETWORKS_SQUEEZE
2658 <li>ANEURALNETWORKS_EXPAND_DIMS
2659 </ul>
2660 <td>CpuRef
2661 <td>
2662 <ul>
2663 <li>All
2664 </ul>
2665 <td>
2666 <table>
2667 <tr><th>
2668 <tr><td>BFLOAT16
2669 <tr><td>FLOAT16
2670 <tr><td>FLOAT32
2671 <tr><td>QASYMMS8
2672 <tr><td>QASYMMU8
2673 <tr><td>QSYMMS16
2674 <tr><td>SIGNED32
2675 <tr><td>BOOLEAN
2676 </table>
2677<tr>
2678 <td>CpuAcc
2679 <td>
2680 <ul>
2681 <li>All
2682 </ul>
2683 <td>
2684 <table>
2685 <tr><th>
2686 <tr><td>All
2687 </table>
2688<tr>
2689 <td>GpuAcc
2690 <td>
2691 <ul>
2692 <li>All
2693 </ul>
2694 <td>
2695 <table>
2696 <tr><th>
2697 <tr><td>All
2698 </table>
2699<tr>
2700 <td rowspan="3">ResizeLayer
2701 <td rowspan="3" style="width:200px;"> Layer to perform resize of a tensor using one of the interpolation methods: - Bilinear - Nearest Neighbor.
2702 <td rowspan="3">
2703 <ul>
2704 <li>ANEURALNETWORKS_RESIZE_BILINEAR
2705 <li>ANEURALNETWORKS_RESIZE_NEAREST_NEIGHBOR
2706 </ul>
2707 <td>CpuRef
2708 <td>
2709 <ul>
2710 <li>All
2711 </ul>
2712 <td>
2713 <table>
2714 <tr><th>
2715 <tr><td>BFLOAT16
2716 <tr><td>FLOAT16
2717 <tr><td>FLOAT32
2718 <tr><td>QASYMMS8
2719 <tr><td>QASYMMU8
2720 <tr><td>QSYMMS16
2721 </table>
2722<tr>
2723 <td>CpuAcc
2724 <td>
2725 <ul>
2726 <li>NHWC
2727 <li>NCHW
2728 </ul>
2729 <td>
2730 <table>
2731 <tr><th>
2732 <tr><td>QASYMMU8
2733 <tr><td>QASYMMS8
2734 <tr><td>FLOAT16
2735 <tr><td>FLOAT32
2736 </table>
2737<tr>
2738 <td>GpuAcc
2739 <td>
2740 <ul>
2741 <li>NHWC
2742 <li>NCHW
2743 </ul>
2744 <td>
2745 <table>
2746 <tr><th>
2747 <tr><td>QASYMMU8
2748 <tr><td>QASYMMS8
2749 <tr><td>FLOAT16
2750 <tr><td>FLOAT32
2751 </table>
2752<tr>
2753 <td rowspan="3">RsqrtLayer
2754 <td rowspan="3" style="width:200px;"> Layer to perform Rsqrt operation.
2755 <td rowspan="3">
2756 <ul>
2757 <li>ANEURALNETWORKS_RSQRT
2758 </ul>
2759 <td>CpuRef
2760 <td>
2761 <ul>
2762 <li>All
2763 </ul>
2764 <td>
2765 <table>
2766 <tr><th>
2767 <tr><td>BFLOAT16
2768 <tr><td>FLOAT16
2769 <tr><td>FLOAT32
2770 <tr><td>QASYMMS8
2771 <tr><td>QASYMMU8
2772 <tr><td>QSYMMS16
2773 <tr><td>SIGNED32
2774 </table>
2775<tr>
2776 <td>CpuAcc
2777 <td>
2778 <ul>
2779 <li>All
2780 </ul>
2781 <td>
2782 <table>
2783 <tr><th>
2784 <tr><td>FLOAT16
2785 <tr><td>FLOAT32
2786 <tr><td>SIGNED32
2787 </table>
2788<tr>
2789 <td>GpuAcc
2790 <td>
2791 <ul>
2792 <li>All
2793 </ul>
2794 <td>
2795 <table>
2796 <tr><th>
2797 <tr><td>FLOAT16
2798 <tr><td>FLOAT32
2799 </table>
2800<tr>
2801 <td rowspan="3">ShapeLayer
2802 <td rowspan="3" style="width:200px;"> Layer to return the shape of the input tensor.
2803 <td rowspan="3">
2804 <ul>
2805 <li>N/A
2806 </ul>
2807 <td>CpuRef
2808 <td>
2809 <ul>
2810 <li>All
2811 </ul>
2812 <td>
2813 <table>
2814 <tr><th>
2815 <tr><td>All
2816 </table>
2817<tr>
2818 <td>CpuAcc
2819 <td>
2820 <ul>
2821 <li>All
2822 </ul>
2823 <td>
2824 <table>
2825 <tr><th>
2826 <tr><td>All
2827 </table>
2828<tr>
2829 <td>GpuAcc
2830 <td>
2831 <ul>
2832 <li>All
2833 </ul>
2834 <td>
2835 <table>
2836 <tr><th>
2837 <tr><td>All
2838 </table>
2839<tr>
2840 <td rowspan="3">SliceLayer
2841 <td rowspan="3" style="width:200px;"> Layer to perform tensor slicing.
2842 <td rowspan="3">
2843 <ul>
2844 <li>ANEURALNETWORKS_SLICE
2845 </ul>
2846 <td>CpuRef
2847 <td>
2848 <ul>
2849 <li>All
2850 </ul>
2851 <td>
2852 <table>
2853 <tr><th>
2854 <tr><td>BFLOAT16
2855 <tr><td>FLOAT32
2856 <tr><td>QASYMMS8
2857 <tr><td>QASYMMU8
2858 <tr><td>QSYMMS16
2859 </table>
2860<tr>
2861 <td>CpuAcc
2862 <td>
2863 <ul>
2864 <li>All
2865 </ul>
2866 <td>
2867 <table>
2868 <tr><th>
2869 <tr><td>All
2870 </table>
2871<tr>
2872 <td>GpuAcc
2873 <td>
2874 <ul>
2875 <li>All
2876 </ul>
2877 <td>
2878 <table>
2879 <tr><th>
2880 <tr><td>All
2881 </table>
2882<tr>
2883 <td rowspan="3">SoftmaxLayer
2884 <td rowspan="3" style="width:200px;"> Layer to perform softmax, log-softmax operation over the specified axis.
2885 <td rowspan="3">
2886 <ul>
2887 <li>ANEURALNETWORKS_LOG_SOFTMAX
2888 <li>ANEURALNETWORKS_SOFTMAX
2889 </ul>
2890 <td>CpuRef
2891 <td>
2892 <ul>
2893 <li>All
2894 </ul>
2895 <td>
2896 <table>
2897 <tr><th>
2898 <tr><td>BFLOAT16
2899 <tr><td>FLOAT16
2900 <tr><td>FLOAT32
2901 <tr><td>QASYMMS8
2902 <tr><td>QASYMMU8
2903 <tr><td>QSYMMS8
2904 <tr><td>QSYMMS16
2905 </table>
2906<tr>
2907 <td>CpuAcc
2908 <td>
2909 <ul>
2910 <li>All
2911 </ul>
2912 <td>
2913 <table>
2914 <tr><th>
2915 <tr><td>QASYMMU8
2916 <tr><td>QASYMMS8
2917 <tr><td>FLOAT16
2918 <tr><td>FLOAT32
2919 </table>
2920<tr>
2921 <td>GpuAcc
2922 <td>
2923 <ul>
2924 <li>All
2925 </ul>
2926 <td>
2927 <table>
2928 <tr><th>
2929 <tr><td>QASYMMU8
2930 <tr><td>QASYMMS8
2931 <tr><td>FLOAT16
2932 <tr><td>FLOAT32
2933 </table>
2934<tr>
2935 <td rowspan="3">SpaceToBatchNdLayer
2936 <td rowspan="3" style="width:200px;"> Layer to divide spatial dimensions of the tensor into a grid of blocks and interleaves these blocks with the batch dimension.
2937 <td rowspan="3">
2938 <ul>
2939 <li>ANEURALNETWORKS_SPACE_TO_BATCH_ND
2940 </ul>
2941 <td>CpuRef
2942 <td>
2943 <ul>
2944 <li>All
2945 </ul>
2946 <td>
2947 <table>
2948 <tr><th>
2949 <tr><td>BFLOAT16
2950 <tr><td>FLOAT16
2951 <tr><td>FLOAT32
2952 <tr><td>QASYMMS8
2953 <tr><td>QASYMMU8
2954 <tr><td>QSYMMS16
2955 </table>
2956<tr>
2957 <td>CpuAcc
2958 <td>
2959 <ul>
2960 <li>NHWC
2961 <li>NCHW
2962 </ul>
2963 <td>
2964 <table>
2965 <tr><th>
2966 <tr><td>All
2967 </table>
2968<tr>
2969 <td>GpuAcc
2970 <td>
2971 <ul>
2972 <li>NHWC
2973 <li>NCHW
2974 </ul>
2975 <td>
2976 <table>
2977 <tr><th>
2978 <tr><td>All
2979 </table>
2980<tr>
2981 <td rowspan="3">SpaceToDepthLayer
2982 <td rowspan="3" style="width:200px;"> Layer to rearrange blocks of spatial data into depth.
2983 <td rowspan="3">
2984 <ul>
2985 <li>ANEURALNETWORKS_SPACE_TO_DEPTH
2986 </ul>
2987 <td>CpuRef
2988 <td>
2989 <ul>
2990 <li>All
2991 </ul>
2992 <td>
2993 <table>
2994 <tr><th>
2995 <tr><td>BFLOAT16
2996 <tr><td>FLOAT16
2997 <tr><td>FLOAT32
2998 <tr><td>QASYMMS8
2999 <tr><td>QASYMMU8
3000 <tr><td>QSYMMS16
3001 </table>
3002<tr>
3003 <td>CpuAcc
3004 <td>
3005 <ul>
3006 <li>NHWC
3007 <li>NCHW
3008 </ul>
3009 <td>
3010 <table>
3011 <tr><th>
3012 <tr><td>All
3013 </table>
3014<tr>
3015 <td>GpuAcc
3016 <td>
3017 <ul>
3018 <li>NHWC
3019 <li>NCHW
3020 </ul>
3021 <td>
3022 <table>
3023 <tr><th>
3024 <tr><td>All
3025 </table>
3026<tr>
3027 <td rowspan="3">SplitterLayer
3028 <td rowspan="3" style="width:200px;"> Layer to split a tensor along a given axis.
3029 <td rowspan="3">
3030 <ul>
3031 <li>ANEURALNETWORKS_SPLIT
3032 </ul>
3033 <td>CpuRef
3034 <td>
3035 <ul>
3036 <li>All
3037 </ul>
3038 <td>
3039 <table>
3040 <tr><th>
3041 <tr><td>BFLOAT16
3042 <tr><td>FLOAT16
3043 <tr><td>FLOAT32
3044 <tr><td>QASYMMS8
3045 <tr><td>QASYMMU8
3046 <tr><td>QSYMMS16
3047 </table>
3048<tr>
3049 <td>CpuAcc
3050 <td>
3051 <ul>
3052 <li>All
3053 </ul>
3054 <td>
3055 <table>
3056 <tr><th>
3057 <tr><td>All
3058 </table>
3059<tr>
3060 <td>GpuAcc
3061 <td>
3062 <ul>
3063 <li>All
3064 </ul>
3065 <td>
3066 <table>
3067 <tr><th>
3068 <tr><td>All
3069 </table>
3070<tr>
3071 <td rowspan="3">StackLayer
3072 <td rowspan="3" style="width:200px;"> Layer to stack tensors along an axis.
3073 <td rowspan="3">
3074 <ul>
3075 <li>N/A
3076 </ul>
3077 <td>CpuRef
3078 <td>
3079 <ul>
3080 <li>All
3081 </ul>
3082 <td>
3083 <table>
3084 <tr><th>
3085 <tr><td>BFLOAT16
3086 <tr><td>FLOAT16
3087 <tr><td>FLOAT32
3088 <tr><td>QASYMMS8
3089 <tr><td>QASYMMU8
3090 <tr><td>QSYMMS16
3091 </table>
3092<tr>
3093 <td>CpuAcc
3094 <td>
3095 <ul>
3096 <li>All
3097 </ul>
3098 <td>
3099 <table>
3100 <tr><th>
3101 <tr><td>All
3102 </table>
3103<tr>
3104 <td>GpuAcc
3105 <td>
3106 <ul>
3107 <li>All
3108 </ul>
3109 <td>
3110 <table>
3111 <tr><th>
3112 <tr><td>All
3113 </table>
3114<tr>
3115 <td rowspan="1">StandInLayer
3116 <td rowspan="1" style="width:200px;"> A layer to represent "unknown" or "unsupported" operations in the input graph. It has a configurable number of input and output slots and an optional name.
3117 <td rowspan="1">
3118 <ul>
3119 <li>N/A
3120 </ul>
3121 <td>N/A
3122 <td>N/A
3123 <td>N/A
3124<tr>
3125 <td rowspan="3">StridedSliceLayer
3126 <td rowspan="3" style="width:200px;"> Layer to extract a strided slice of a tensor.
3127 <td rowspan="3">
3128 <ul>
3129 <li>ANEURALNETWORKS_STRIDED_SLICE
3130 </ul>
3131 <td>CpuRef
3132 <td>
3133 <ul>
3134 <li>All
3135 </ul>
3136 <td>
3137 <table>
3138 <tr><th>
3139 <tr><td>BFLOAT16
3140 <tr><td>FLOAT32
3141 <tr><td>QASYMMS8
3142 <tr><td>QASYMMU8
3143 <tr><td>QSYMMS16
3144 </table>
3145<tr>
3146 <td>CpuAcc
3147 <td>
3148 <ul>
3149 <li>All
3150 </ul>
3151 <td>
3152 <table>
3153 <tr><th>
3154 <tr><td>All
3155 </table>
3156<tr>
3157 <td>GpuAcc
3158 <td>
3159 <ul>
3160 <li>All
3161 </ul>
3162 <td>
3163 <table>
3164 <tr><th>
3165 <tr><td>All
3166 </table>
3167<tr>
3168 <td rowspan="3">SubtractionLayer
3169 <td rowspan="3" style="width:200px;"> Layer to perform an elementwise subtract of 2 tensors.
3170 <td rowspan="3">
3171 <ul>
3172 <li>ANEURALNETWORKS_SUB
3173 </ul>
3174 <td>CpuRef
3175 <td>
3176 <ul>
3177 <li>All
3178 </ul>
3179 <td>
3180 <table>
3181 <tr><th>
3182 <tr><td>BFLOAT16
3183 <tr><td>FLOAT16
3184 <tr><td>FLOAT32
3185 <tr><td>QASYMMS8
3186 <tr><td>QASYMMU8
3187 <tr><td>QSYMMS16
3188 <tr><td>SIGNED32
3189 </table>
3190<tr>
3191 <td>CpuAcc
3192 <td>
3193 <ul>
3194 <li>All
3195 </ul>
3196 <td>
3197 <table>
3198 <tr><th>
3199 <tr><td>QASYMMU8
3200 <tr><td>QASYMMS8
3201 <tr><td>QSYMMS16
3202 <tr><td>SIGNED32
3203 <tr><td>FLOAT16
3204 <tr><td>FLOAT32
3205 </table>
3206<tr>
3207 <td>GpuAcc
3208 <td>
3209 <ul>
3210 <li>All
3211 </ul>
3212 <td>
3213 <table>
3214 <tr><th>
3215 <tr><td>QASYMMU8
3216 <tr><td>QASYMMS8
3217 <tr><td>QSYMMS16
3218 <tr><td>SIGNED32
3219 <tr><td>FLOAT16
3220 <tr><td>FLOAT32
3221 </table>
3222<tr>
3223 <td rowspan="3">TransposeConvolution2dLayer
3224 <td rowspan="3" style="width:200px;"> Layer to perform 2D transpose convolution (deconvolution) operation.
3225 <td rowspan="3">
3226 <ul>
3227 <li>ANEURALNETWORKS_TRANSPOSE_CONV_2D
3228 </ul>
3229 <td>CpuRef
3230 <td>
3231 <ul>
3232 <li>All
3233 </ul>
3234 <td>
3235 <table>
3236 <tr><th>
3237 <tr><td>BFLOAT16
3238 <tr><td>FLOAT16
3239 <tr><td>FLOAT32
3240 <tr><td>QASYMMS8
3241 <tr><td>QASYMMU8
3242 <tr><td>QSYMMS8
3243 <tr><td>QSYMMS16
3244 </table>
3245<tr>
3246 <td>CpuAcc
3247 <td>
3248 <ul>
3249 <li>NHWC
3250 <li>NCHW
3251 </ul>
3252 <td>
3253 <table>
3254 <tr><th>
3255 <tr><td>SIGNED32
3256 <tr><td>FLOAT16
3257 <tr><td>FLOAT32
3258 <tr><td>QASYMMU8
3259 <tr><td>QASYMMS8
3260 <tr><td>QUANTIZEDSYMM8PERAXIS
3261 </table>
3262<tr>
3263 <td>GpuAcc
3264 <td>
3265 <ul>
3266 <li>NHWC
3267 <li>NCHW
3268 </ul>
3269 <td>
3270 <table>
3271 <tr><th>
3272 <tr><td>SIGNED32
3273 <tr><td>FLOAT16
3274 <tr><td>FLOAT32
3275 <tr><td>QASYMMU8
3276 <tr><td>QASYMMS8
3277 <tr><td>QUANTIZEDSYMM8PERAXIS
3278 </table>
3279<tr>
3280 <td rowspan="3">TransposeLayer
3281 <td rowspan="3" style="width:200px;"> Layer to transpose a tensor.
3282 <td rowspan="3">
3283 <ul>
3284 <li>ANEURALNETWORKS_TRANSPOSE
3285 </ul>
3286 <td>CpuRef
3287 <td>
3288 <ul>
3289 <li>All
3290 </ul>
3291 <td>
3292 <table>
3293 <tr><th>
3294 <tr><td>BFLOAT16
3295 <tr><td>FLOAT16
3296 <tr><td>FLOAT32
3297 <tr><td>QASYMMS8
3298 <tr><td>QASYMMU8
3299 <tr><td>QSYMMS16
3300 </table>
3301<tr>
3302 <td>CpuAcc
3303 <td>
3304 <ul>
3305 <li>All
3306 </ul>
3307 <td>
3308 <table>
3309 <tr><th>
3310 <tr><td>All
3311 </table>
3312<tr>
3313 <td>GpuAcc
3314 <td>
3315 <ul>
3316 <li>All
3317 </ul>
3318 <td>
3319 <table>
3320 <tr><th>
3321 <tr><td>All
3322 </table>
3323<tr>
3324 <td rowspan="3">UnidirectionalSquenceLstmLayer
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3325 <td rowspan="3" style="width:200px;"> Layer to perform unidirectional sequence LSTM operation.
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3326 <td rowspan="3">
3327 <ul>
3328 <li>ANEURALNETWORKS_UNIDIRECTIONAL_SEQUENCE_LSTM
3329 </ul>
3330 <td>CpuRef
3331 <td>
3332 <ul>
3333 <li>All
3334 </ul>
3335 <td>
3336 <table>
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3337 <tr><th>Input Types
3338 <tr><td>FLOAT32
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3339 </table>
Narumol Prangnawaratbd575b22021-08-31 16:53:54 +0100[diff] [blame]3340 <table>
3341 <tr><th>Weight Types
3342 <tr><td>FLOAT32
3343 <tr><td>QASYMMS8
3344 </table>
Cathal Corbettfd5bec42022-03-03 15:13:23 +0000[diff] [blame]3345 <td>CpuAcc
3346 <td>
3347 <ul>
3348 <li>All
3349 </ul>
3350 <td>
3351 <table>
3352 <tr><th>Input Types
3353 <tr><td>FLOAT32
3354 </table>
3355 <table>
3356 <tr><th>Weight Types
3357 <tr><td>FLOAT32
3358 </table>
Cathal Corbett4952a3e2022-03-03 15:14:18 +0000[diff] [blame]3359 <td>GpuAcc
3360 <td>
3361 <ul>
3362 <li>All
3363 </ul>
3364 <td>
3365 <table>
3366 <tr><th>Input Types
3367 <tr><td>FLOAT32
3368 </table>
3369 <table>
3370 <tr><th>Weight Types
3371 <tr><td>FLOAT32
3372 </table>
Sadik Armagan1a9c9f62021-08-05 09:25:15 +0100[diff] [blame]3373<tr>
3374 <td rowspan="3">UnmapLayer
3375 <td rowspan="3" style="width:200px;"> Layer to perform unmap operation on tensor.
3376 <td rowspan="3">
3377 <ul>
3378 <li>N/A
3379 </ul>
3380 <td>CpuRef
3381 <td>
3382 <ul>
3383 <li>All
3384 </ul>
3385 <td>
3386 <table>
3387 <tr><th>
3388 <tr><td>All
3389 </table>
3390<tr>
3391 <td>CpuAcc
3392 <td>
3393 <ul>
3394 <li>NHWC
3395 <li>NCHW
3396 </ul>
3397 <td>
3398 <table>
3399 <tr><th>
3400 <tr><td>All
3401 </table>
3402<tr>
3403 <td>GpuAcc
3404 <td>
3405 <ul>
3406 <li>NHWC
3407 <li>NCHW
3408 </ul>
3409 <td>
3410 <table>
3411 <tr><th>
3412 <tr><td>All
3413 </table>
3414</table>
3415
3416*/
3417} // namespace